THE ELECTRONICS SYSTEM FOR THE CUORE
DETECTORCLAUDIO ARNABOLDIANDREA GIACHEROGIANLUIGI PESSINA
…AND ALSO RECENTLY: ALESSANDRO BAU (*)
ANDREA PASSERINI (*)
LIU XIAOHUA (UCLA)FROM EXTERNAL:
(*) Thanks to the Group Radio of the University of Milano - Bicocca
INFN Milano – Bicocca and Università di Milano – Bicocca, Facoltà di Fisica, www.mib.infn.it, www.unimib.it.
Title SlideTitle Slide
2LBNL, 10 - 11 December 2009
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Conventional underlined brilliant-blue text is for hyperlinks.
Two hyperlink types are used through the report:
Hyperlinks limited to the present document. An example is Appendix A;
Hyperlink to the web were the repository of the referenced papers is located. An example is Jinst, Vol.4, P09003, p. 1-17, 2009.
3LBNL, 10 - 11 December 2009
OutlineOutline
The whole system;
Brief introduction of the S/N for a bolometric detector;
The electronic System (ES):
Preamplifier;
Second stage PGA;
Antialiasing filter;
The detector biasing system;
Front-end main board;
The pulse generator for detector calibration;
The power supply;
Temperature stabilization of the detector holder;
Slow Control and Communication Protocol;
Cost;
Appendixes
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Outline: The whole system Outline: The whole system
The whole system
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The complete system (I)The complete system (I)
Fridge with Detectors
Cold finger
K
Preamplifier Antialiasing filter DAQ
Power Supply
Calibrating Pulse Generator
Detector Biasing Network
Slow Control and Safe
Supervisor System
II Stage
For all:
= close to the fridge
= remote, close to the DAQ
=same PCBTemperature stabilization of
det. holder
6LBNL, 10 - 11 December 2009
The complete system (II): review of the bolometer principle of oThe complete system (II): review of the bolometer principle of operationperation
IMPINGINGPARTICLE OFENERGY U
CT
KTOT
HEAT SINK
TCU = TΔ
The particle energy is converted into heat in the absorbing crystal and a thermistor convert the thermal pulse into an electrical signal.
To be measurable the temperature increase must be comparable to that of the crystal. For this reason we need to work the detector at very small temperature.
To first approximation the energy fluctuation has an intrinsic origin:
2RMS B TE K T CΔ ≈
The actual energy resolution is completely another story…
The detector looks like a resistive-inductive impedance that must be readout with a voltage sensitive amplifier (see also Appendix A).
7LBNL, 10 - 11 December 2009
The complete system (III): remembering the bolometer principle oThe complete system (III): remembering the bolometer principle of operationf operation
CT
KT
HEAT SINK
KG
KSEHEATLOST
HEAT MEASURED
CSE
KW
KW
T=300 K
T= 10 mK
Injected Power
Refrigerator
RefrigeratorResidual Injected Power
The very important constraint that determines the main issues in the front-end design is the injected power from the electrical link.
If not well designed the temperature of the detector could be very different from that of the heat sink (the maximum input power is in the order of pW).
8LBNL, 10 - 11 December 2009
The complete system (IV): cryostat wiring summaryThe complete system (IV): cryostat wiring summary
Fridge with Detectors
Cold finger
K
988 detectors and their connections will be packaged in a small space.
The very important constraint is that the link must have a very small thermal conductance with a very small radioactive contaminant, a limited level of cross-talk and a negligible microphonism.
Those 3 features are difficult to be met together and we tried to overcome the limitations by proper electronic configuration.
A natural solution is the use of coaxial cables. We explored such a solution with special cables having both the connecting line and its shield in constantan.
Coaxial cables cannot be used below the cold finger owing to radioactivity and occupies a large volume from above the colder finger up to room temperature.
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The complete system (V): connecting link and thermal conductanceThe complete system (V): connecting link and thermal conductance
The final solution was for 2 different links. One from room temperature down to the mixing chamber and the other from the mixing chamber down to the detectors.
This link is very robust against cross-talk and microphonism. It has about 100 pF/m and 97 dB x m of cross-talk rejection.
A ribbon has 13 pairs.
Its intrinsic radioactivity makes it not suitable for the link below the mixing chamber.
The upper part of the link is link is based on twisted pairs of NbTiwires (100 μm in diameter, 500 twisting/m), interwoven in a NOMEX texture
Jinst, Vol.4, P09003, p. 1-17, 2009.
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The complete system (The complete system (VIVI): connecting link and thermal conductance): connecting link and thermal conductance
From the mixing chamber down to the detectors the temperature is not subjected to gradient and the link is very important to show e very small radioactive content.
The Copper-PEN wire pair has about 25 pF/m and a cross-talk of about 0.024 %, more than adequate to our application.
We found that coppered PEN (Polyethylene 2.6 Naphthalate) tapes are an excellent solution.
We did it in close collaboration with industry since the implementation of such a long link (2 m) required special production procedures.
Jinst, Vol.4, P09003, p. 1-17, 2009.
Top connectionto the Kapton (mix. Chamber).
90° Bent and masks join.
Thermistor/heaterbonding pads
Detectorcrystal
Masks join.
80 c
m
80 c
m
Top connectionto the Kapton (mix. Chamber).
90° Bent and masks join.
Thermistor/heaterbonding pads
Detectorcrystal
Masks join.
80 c
m
80 c
m
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The complete system (VII): connecting link and crossThe complete system (VII): connecting link and cross--talktalk
Interpretation of the mechanism for minimizing the cross-talk.
CH1 CP
CH2
CCR
CP
1iPCR
CR2i V
CCCV
+≈Δ
IF THE DETECTOR IMPEDANCE IS LARGE ENOUGH:
With a single ended input preamplifier the coupling between two closed detector may rise a cross-talk that is proportional to the parasitic coupling capacitance, CCR .
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The complete system (VIII): connecting link and crossThe complete system (VIII): connecting link and cross--talktalk
The differential preamplifier with a packaged link allows to make the cross-talk signal between nearer detectors a common mode signal that cancel out at the preamplifier output.
CH1
cP +
-cP
CH2
cP +
-cP
CCR
Cross-talk largely suppressed.
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The complete system (IX): connecting link and crossThe complete system (IX): connecting link and cross--talktalk
First Requirement:+
-
+
-
The preamplifier must have a differential input for cross-talk suppression.
The implemented wiring is based on a differential readout that suppress the cross-talk since it becomes a common mode signal if the detector is read with a pair of wires close together.
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The complete system (X): noise induced by vibrationThe complete system (X): noise induced by vibration
There is an important source of noise that could limit the final energy resolution:
Microphonism
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The complete system (The complete system (XIXI): ): noise induced by vibrationnoise induced by vibration
Detector
RB 2Fri2
Bi
Microphonics noise originates from mechanical vibrations and affects the resolution in 2 ways.
Frictions of the detector crystal with respect to its mechanical supports. The friction creates heat that is detected as noise.
There is no way to solve the noise problem coming from friction other than to design an appropriate detector support: we say that this noise is differential.
Superconducting detectors and bolometers: achievements and perspectives for applications", 20- 21 November 2000, Napoli, invited.
CP (Parasitic cap.)
VO
HEAT SINK
HEAT SINK
Crystal
Thermistor
Thermistor Thermal NoiseMicrophonics Noise
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The complete system (The complete system (XIIXII): ): noise induced by vibrationnoise induced by vibration
Detector
RBCP2
Fri2Mii2
Bi
The second way microphonic noise comes into play is by the vibrations of the connecting link, which modifies the parasitic capacitance, hence the amount of charge stored on it.
Differently that from the detector friction, the vibration of the link is a common mode noise that can be greatly attenuated by the topology of the connection system used.
CP
)tcos(CC OPOP ωΔ≈Δ
Noise from wire vibration
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The complete system (The complete system (XIIIXIII): ): noise induced by vibrationnoise induced by vibration
If we readout the detector signal with a differential preamplifier and a pairs of wires mechanically coupled together the noise charge generated in the two pairs, mostly of common mode respect to ground, produce a voltage signal rejected by the differential preamplifier.
cP +
-cP
Friction noise: not suppressed. Link Vibration:
largely suppressed.
The residual microphonism noise of the connecting link is given by any possible non-uniformity of the connecting link itself.
The suppression efficiency can easily range between 40 dB and 60 dB.
See also Appendix B.
+
-cP
cP
Substrate
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Outline: Brief introduction of the S/N for a bolometric detectorOutline: Brief introduction of the S/N for a bolometric detector
Fridge with Detectors
Detector
K
Preamplifier Antialiasing filter DAQ
Power Supply
Calibrating Pulse Generator
Detector Biasing Network
Slow Control and Safe
Supervisor System
II Stage
For all:
= close to the fridge
= remote, close to the DAQ
=same PCBTemperature stabilization of
det. holder
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The Noise sources of a bolometer: the bolometer intrinsic noiseThe Noise sources of a bolometer: the bolometer intrinsic noise
+
-
Detector
RBCP RL
2 B BB
B
4K TiR
=
2Fri 2
Mii 2Li
2Ai
2Ae
The intrinsic noise source of the bolometer contributes to the energy resolution:
The power spectrum of this noise source has a white component, as well as a low frequency component.
2Bi
Order of magnitude: RB =100 MΩ, TB =15 mK:
2Bi 0.091 fA Hz≈
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Example from Run II of the CUORICINO experiment: backgroundExample from Run II of the CUORICINO experiment: background
Black: CH 128-2 (enriched) ΔEFWHM = 15 KeV @ 2.6 MeV;
Red: CH B31 ΔEFWHM = 4 KeV @ 2.6 MeV
Co60 (1173 KeV)
Co60 (1332 KeV)
K40 1460 keV
Kindly from Maura Pavan
Signals from our detectors are very slow. The time scale is sec while the bandwidth is limited to few Hz.
This impose to the front-end noise a very small low-frequency noise. As it will be evident soon.
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Example from Run II of the CUORICINO experiment: array statisticExample from Run II of the CUORICINO experiment: array statisticss
Kindly from Maura Pavan
As a standard, a large spread is obtained with bolometric detectors. This is the consequence of the difficulty in obtaining similar mechanical assembly.
The spread is obtained also in the pulse height distribution and
impedance values.
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Intrinsic Resolution vs Actual ResolutionIntrinsic Resolution vs Actual Resolution
Adopting the optimum filter (see Appendix C) it is possible to estimate the intrinsic energy resolution:
( )FWHM i Bi B
2 2B B
B
2.355U K Z energy conversion gain, V eZ ViK Z
= =τ
For this to be calculated we need to know the energy conversion gain, the dynamic as well as the static impedance. All of them at the working point.
J. of Low Tem. Phys., Vol.93, N.3/4, p.207-213;IEEE TNS, Vol.40, p.649-656, 1993.
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Energy resolution from the Bolometer only (I)Energy resolution from the Bolometer only (I)
There was a large dispersion in the characteristics and the energy resolution of the detectors of CUORICINO. To make some evaluation let’s consider 3 representative detectors having different range in the impedance and energy conversion gain.
Data are from Run I of CUORICINO (In Run II an accurate analysis of the working points was not did)
Detector name
Static Impedance RB (MΩ)
Operating Voltage
mV
Dynamic Imp./ Static Imp.
ZB /RB
Energy Conv. Gain.
μV/MeV
Decay Time
Constant ms
Resolution at 2615
KeVFWHM
Bolom. Intrinsic Energy
Resolution eVFWHM
B26 859 16.8 0.5 241 250 4.5 260
B31 608 36.8 0.5 492 110 6.3 161
B36 169 13.9 0.5 140 200 13 222
B16 365 23.3 0.5 489 100 10 132
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Energy resolution from the Bolometer only (II)Energy resolution from the Bolometer only (II)
The intrinsic energy resolution has nothing to do with the measured one.
We will see in a while that the main responsible of the actual energy resolutions comes from:
Resolution at 2615
KeVFWHM
Bolom. Intrinsic Energy
Resolution eVFWHM
4.5 260
6.3 161
13 222
10 132
Microphonism from mechanical friction of the detector.
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Outline: The PreamplifierOutline: The Preamplifier
Fridge with Detectors
K
Preamplifier Antialiasing filter DAQ
Power Supply
Calibrating Pulse Generator
Detector Biasing Network
Slow Control and Safe
Supervisor System
II Stage
For all:
= close to the fridge
= remote, close to the DAQ
=same PCBTemperature stabilization of
det. holder
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Readout configurationReadout configuration
+
-
Detector
RB
RL /2
RL /2
CP
Fridge
Essential characteristics:
The load resistors, RL, are at room temperature;
The preamplifier is at room temperature, too;
The preamplifier is voltage sensitive, large impedance, differential input.
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Preamplifier configuration (I)Preamplifier configuration (I)
+
-
The classic instrumentation amplifier for large input impedance.
In this configuration 4 JFETs are used at the input.
The input series noise is therefore 4 times that of a single transistor.
+
-
-
+
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Preamplifier configuration (II)Preamplifier configuration (II)
+
-
In our configuration the Sources of the 2 JFETs are used as inverting inputs.
This way the input series noise is due to only 2 transistors, while the input impedance remains very large.
See Appendix D
for details.
+
-
-
+
Alta Frequenza, Vol. 56, N.8, p. 347-351, 1987;NIMA, Vol. A370, p.220-222, 1996;IEEE TNS, V.44, p.416-423, 1997;NIMA, Vol. 444A, p. 111-114, 2000;NIMA, Vol. 444A, p. 132-135, 2000;2009 NSS Conference Record.
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Preamplifier configuration (III)Preamplifier configuration (III)
The main contribution to the energy resolution is given from 1/f noise and parallel noise.
We have selected a semi-custom process aimed at the minimization of this two constraints.
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.7
VDS(V)
I DS (m
A)
Drain current (Ids_vs_Vds#6)
V
GS=-0.01
VGS
=-0.03
VGS
=-0.05
VGS
=-0.07
VGS
=-0.09
VGS
=-0.11
VGS
=-0.13
VGS
=-0.15
VGS
=-0.17
VGS
=-0.19
VGS
=-0.21
VGS
=-0.23
VGS
=-0.26
VGS
=-0.28
VGS
=-0.30
VGS
=-0.32
VGS
=-0.34
VGS
=-0.36
VGS
=-0.38
VGS
=-0.40
VGS
=-0.42
VGS
=-0.44
VGS
=-0.46
VGS
=-0.48
VGS
=-0.50
VGSStart= -0.01 VStop= -0.5 VStep= -0.02 VVGSOFF≤ -0.48
Step 1:
the gate current is proportional to the G – D and G – S inverse applied voltage.
The selected process was chosen with a small pinch-off voltage and small VDS operating capability.
Working point: VDS 0.65 V, VGS =-0.15 V
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-0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0-0.035
-0.03
-0.025
-0.02
-0.015
-0.01
-0.005
0
0.005
VGS(V)
I GS
(pA
)
Gate leakage current (Ids_vs_Vgs_gate_current_3terminal#3)
VDS=0.01VDS=0.31VDS=0.61VDS=0.90VDS=1.20VDS=1.50
VDSStart= 0.01 VStop= 1.5 VStep= 0.3 V
Preamplifier configuration (IV)Preamplifier configuration (IV)
Step 2:
a device with very small gate current.
Gate current at the working
point: 20 fA at 300 K.
J. of Low Temp. Phys., Vol.151, p.964-970
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Preamplifier configuration (V)Preamplifier configuration (V)
Step 3:
a device with negligible 1/f noise.
1.0 8.5 75.1 660.8 5816.5 512000.88
1.17
1.55
2.05
2.71
3.59
nV/√
Hz
Hz
Noise at 1 Hz= 2.642 nV/√Hz White Noise= 1.544 nV/√Hz
Working point:
VDS =0.6 V, IDS =0.5 mA.
JFET Characteristics:
• Pinch-off: -0.45 V;
• G – S Cap.: 12 pF;
• G – D Cap.: 7 pF
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Preamplifier configuration (VI)Preamplifier configuration (VI)
+
-
-
+
Relay
RB
RB
RARC
CC
Vo1
Vo2
Vi1
Vi2
( )D Bo1 o2 i1 i2
D
R 2RV V V VR+
− = −
Relay closed: operation at large gain, standard condition:
D A CR R R=with:
DD
DBR 2R 210 2V V;
RR 00+
== Ωwe set:
Relay open: operation at small gain, only for DC characterization of the thermistor:
( ) ( )C Bo1 o2 i1 i2 i i2
C
1C
R 2RV V V V
R 2000
20 V VR+
− =
=
− = −
Ω
Capacitance CC was added for high frequency compensation when the relay is in open condition..
Cryogenics, V.37, p.27-31, 1997
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Preamplifier configuration (VII)Preamplifier configuration (VII)
Step 4:
The preamplifier.
JFET pair Relay =OpAmp
Inpu
ts
Cuts
The cuts in the PCB at the input avoid paths to parasitic resistances, especially due to residual from soldering fluxes.
There is a pair of small connectors at the inputs to avoid possible parasitic impedance coming from the plastic.
34LBNL, 10 - 11 December 2009
Preamplifier configuration (VIII)Preamplifier configuration (VIII)
Mini-melf resistors: metal film with negligible 1/f noise.2 selections are used:
1. 1%, ±50 ppm/°C,
2. 0.1%, ±15 ppm/°C (in the gain path).
Minimization of 1/f noise was an important issue. Every component has been selected with this aim.
35LBNL, 10 - 11 December 2009
The Noise sources of a bolometer: preamplifier parallel noise (IThe Noise sources of a bolometer: preamplifier parallel noise (IX)X)
+
-
Detector
RBCP RL2
Fri 2Mii 2
Li2Ai
2Ae
The gate current contributes to the parallel noise at room temperature:
The power spectrum of this noise source has a white component that becomes negligible if the cold electronics amplification stage is added.
2GAi 2qI=
IEEE NS, Vol. 51, pp. 2975-2982, 2004.
J. of Low Temp. Phys., Vol.151, p.964-970, 2008.
2Bi
Order of magnitude: IG is about 30 fA at each input:
2AToti 0.07 fA Hz≈
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The Noise sources of a bolometer: preamplifier series noise (X) The Noise sources of a bolometer: preamplifier series noise (X)
+
-
Detector
RBCP RL2
Fri 2Mii 2
Li2Ai
2Ae
Series preamplifier noise may have a white and 1/f component. In our front-end the 1/f component is negligible.
Series preamplifier noise is almost negligible in our experiment, compared to load resistor parallel noise, unless the detector shunting capacitance becomes so large.
IEEE TNS, vol.49, pp. 2440-2447, 2002.
2Bi
2Ae 3.8 nV Hz≈
Preamplifier noise
2B BB
B
B
B
B
4K TDetector Noise Z 4.5 nV HzR
T 15 mK working temperatureR 100 M static impedanceZ 50 M dynamic impedance
= ≈
== Ω= Ω
Detector Voltage noisePreamplifier noise is comparable only to the intrinsic noise of the bolometer.
(Average between 1 ÷
10 Hz)
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Preamplifier configuration (XI)Preamplifier configuration (XI)
100 101 102 103 104100
101Fig. Series noise
nV/ √
Hz
Hz
Noise at 1 Hz= 4.880White noise = 3.027
Series input noise is compliant with the expectations with a very small contribution from the second stage.
The 1/f is about 5 nV/ √Hz @ 1 Hz and 3 nV/√Hz white.
White noise can be lowered by the use of a smaller feedback resistors and increasing the channel current of the JFETs transistors.
With a feedback resistor a factor of 2 smaller and a channel current a factor of 4 larger the white noise is expected to become about 2.2 nV/√Hz.
Equivalent input noise current:2A
Eq 2B
2B A
e2qI 0.08 fA Hz
Z
Z 50 M , e 4 nV Hz
= =
⎛ ⎞= Ω =⎜ ⎟⎝ ⎠
(0.091 fA/√Hz is the bolometer noise)
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Preamplifier configuration (XII)Preamplifier configuration (XII)
Input gate current as the sum of both gates is as expected from the JFET characteristics.
The sum of the Gate currents of both inputs at 40 °C is 160 fA, while at 30 °C is 64 fA.
0 10 20 30 40 50 60 70 800
0.5
1
1.5
2
2.5
3
T (°C)
IG (p
A)
IG(pA)40% RHcurve fit
R2 = 0.9999
y = 4.119e-3*exp( 9.113e-2*x )
Expected parallel noise is:
0.11 fA/√Hz @ 40 °C;
0.07 fA/√Hz @ 30 °C.
Comparison:
2 B BB
B
4K Ti 0.091 fA Hz @ 15 mKR
= =
2 GTotGTot
2qIi 0.071 fA Hz @ 30 C
4= = °
39LBNL, 10 - 11 December 2009
Preamplifier configuration (XIII)Preamplifier configuration (XIII)
Detector name
Static Impedance RB (MΩ)
Dynamic Imp./ Static Imp.
ZB /RB
Energy Conv. Gain.
μV/MeV
Decay Time
Constant ms
Resolution at 2615
KeVFWHM
Bolom. Intrinsic Energy
Resolution eVFWHM
Pre. Energy
resolution eVFWHM
ZB /RB =0.5
Pre. Energy
resolution eVFWHM
ZB /RB =0.2
B26 859 0.5 241 250 4.5 260 346 157
B31 608 0.5 492 110 6.3 161 207 101
B36 169 0.5 140 200 13 222 205 164
B16 365 0.5 489 100 10 132 144 84
The comparison is made of the detector resolution, the intrinsic resolution and the resolution of the preamplifier only:
40LBNL, 10 - 11 December 2009
The Noise sources of a bolometer: the load resistor noise (XIV)The Noise sources of a bolometer: the load resistor noise (XIV)
+
-
Detector
RBCP RL2
Fri 2Mii 2
Li2Ai
2Ae
The load resistor may contribute to the parallel noise in an appreciable way:
The power spectrum of this noise source has a white component, as well as a low frequency component that we made negligible by design.
LLB2
L RTK4i =
IEEE TNS, V.49, p. 1808 (2002).
2Bi
Order of magnitude: RL =50 GΩ, TL =300 K:
2Li 0.58 fA Hz≈
The more important source of noise is that coming from the load resistors.
41LBNL, 10 - 11 December 2009
The Noise sources of a bolometer: load resistor noise (XV)The Noise sources of a bolometer: load resistor noise (XV)
The noise contribution of the load resistors is evident. The operation at 100 K allows to save a factor of almost 2 in noise contribution. The technology (metal film) limits the value of the resistors to only 1÷2 GΩ
at 10 mK.
Detector name
Static Impedance RB (MΩ)
Energy Conv. Gain.
μV/MeV
Decay Time
Constant ms
Resolution at 2615
KeVFWHM
Bolom. Intrinsic Energy
Resolution eVFWHM
Pre. Energy
resolution eVFWHM
ZB /RB =0.5
Pre. Energy
resolution eVFWHM
ZB /RB =0.2
Pre. + Load Res. eVFWHM
ZB /RB =0.2
B26 859 241 250 4.5 260 346 157 1879
B31 608 492 110 6.3 161 207 101 992
B36 169 140 200 13 222 205 164 728
B16 365 489 100 10 132 144 84 631
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Resolution Summary (XVI)Resolution Summary (XVI)
So far we have compared the noise effect of the electronic and load resistors with the intrinsic detector noise. At a first glance it seems that the parallel noise is the parameter to be taken into consideration.
It is interesting now to try to estimate the energy resolution from the estimations considered.
The comparison between the estimation and the actual energy resolution allows to understand if the noise sources considered so far are the only ones to be taken into account (see Appendix C):
( )( )2 2 2
tot 2BAA
B
2 2totP A B B
FWHM 2 2i B B A
Z iC C Z2 e Z i.3 e55U 1K Z e
+= +
+
τ+
τ
Energy resolution has been found larger than that expected from the sources of noise of the detector and preamplifier. Microphonism seems the main source of noise that limits the final energy resolution in an unpredictable way.
43LBNL, 10 - 11 December 2009
Drift (I)Drift (I)
Measurement of ββ
decay needs a very long time. Stability is of great importance, at
the same level of noise, and must be accurately studied.
The drift of the detector is superimposed on the drift of the readout and biasing system. Minimization of the latter allows to correct for any energy conversion drift.
In CUORE we will consider the following actions to account and correct drift:
• A source of particle;
• A pulse across a heather glued on the crystal;
• Study of the baseline;
• Stabilization of the detector holder;
• Monitoring of the room temperature.
The last item was an option available in CUORICINO, never exploited.
44LBNL, 10 - 11 December 2009
Drift (II)Drift (II)
The study of the baseline sets 2 important characteristics to the preamplifier:
1. The detector must be DC coupled to the preamplifier;
2. The drift of the Electronic System must be negligible since it superimposes on that of the detector.
The energy conversion gain of our bolometers in the worst condition is about 100 μV/MeV and the resolution about a few ‰.
A negligible contribution to the detector baseline from the preamplifier is achieved if it amount is few ppm/°C of the Detector Bias.
5 10 15 20 25 30 35 40 45 50
Detectro Bias (mV)
# of
Sam
pleS
RUN1 of CUORICINO
There were a broad distribution of bias voltages among the detectors of CUORICINO, expected to be similar also in CUORE.
If we consider 15 mV as a typical bias a few ppm/°C of it is about a few 15 nV/°C.
This stability is very hard to achieve and a factor of 2 - 5 larger drift is more reasonable in production.
45LBNL, 10 - 11 December 2009
Drift (III)Drift (III)
+
-
-
+
VDrift
ITher
IEEE TNS, V.44, p.416-423, 1997;
IEEE TNS, vol.49, pp. 2440-2447.
The principle of drift correcting method is very simple: a programmable thermal current is generated to be injected close to the input to cancel from the preamplifier “natural” drift mainly due to the discrete input JFETs pair.
The offset mainly due to the detector bias is also corrected with a proper stable current in a node close to the input.
IOffset
Programmable
46LBNL, 10 - 11 December 2009
Drift (IV)Drift (IV)
JFET
Digital TrimmerAnd DAC
μ-controller
Out
puts
Inpu
ts
The digital Trimmer and the DAC are the devices that adjust the preamplifier starting from a thermal voltage (±4 mV/°C) and stable reference (+5 V), respectively. The overall accuracy for each is around 15 bits .
A μ-controller manages the preamplifier.
47LBNL, 10 - 11 December 2009
Drift (V)Drift (V)
Although we need more statistics to extrapolate the final correction system behavior, first results are very promising.
y = 1,54E+01x2 + 3,61E+01x + 3,07E+04
y = 1,98E+01x2 - 2,08E+00x - 5,53E+03
y = 2,05E+01x2 + 4,00E+01x - 1,95E+04
y = 2,66E+01x2 + 2,51E+01x - 6,20E+04
y = 2,86E+01x2 + 4,32E+01x - 1,28E+05
y = 2,95E+01x2 + 7,51E+01x - 1,81E+05
y = 3,12E+01x2 + 8,02E+01x - 2,12E+05
-250000
-200000
-150000
-100000
-50000
0
50000
-20 -15 -10 -5 0 5 10 15
Temperature - 27 [°C]
Vinp
ut [n
V]
40mV20mV0V-20mV-40mV-60mV-80mVPoli. (40mV)Poli. (20mV)Poli. (0V)Poli. (-20mV)Poli. (-40mV)Poli. (-60mV)Poli. (-80mV)
We tested few preamplifiers. The input drift obtained the best result with the sample above.
The drift has been measured changing the input differential DC voltage, simulating the detector bias.
Pre
ampl
ifier
sam
ple
# 1
48LBNL, 10 - 11 December 2009
Drift (VI)Drift (VI)
y = 3,86E-01x2 + 9,03E-01x + 7,67E+02
y = 9,88E-01x2 - 1,04E-01x - 2,77E+02
y = -1,33E+00x2 - 1,25E+00x + 3,10E+03
y = -7,16E-01x2 - 1,08E+00x + 3,19E+03 y = -4,91E-01x2 - 1,25E+00x + 3,01E+03
y = -3,90E-01x2 - 1,00E+00x + 2,65E+03
-500
0
500
1000
1500
2000
2500
3000
3500
-20 -15 -10 -5 0 5 10 15
Temperature - 27 [°C]
Inpu
t err
or [p
pm/°
C] 40mV
20mV-20mV-40mV-60mV-80mVPoli. (40mV)Poli. (20mV)Poli. (-20mV)Poli. (-40mV)Poli. (-60mV)Poli. (-80mV)
If we plot the preamplifier drift in ratio of the detector biasing voltage we obtain a value in the order of ppm/°C. This is maintained if the room temperature change is within a few degree °C around the selected temperature.
Since we correct at very small level, the residual drift has not a pure linear behavior and second order effect becomes dominant: this requires that the room temperature be stabilized as well.
Pre
ampl
ifier
sam
ple
# 1
49LBNL, 10 - 11 December 2009
Drift (VII)Drift (VII)P
ream
plifi
er s
ampl
e #
2
This is another sample tested.
Input drift at zero detector bias is about 80 nV/°C.
Thermal drift after correction
y = 0,3702x2 + 3,2305x + 37903
y = 5,4506x2 + 19,133x + 22897
y = 10,609x2 + 81,909x + 14061
y = 16,872x2 + 88,145x - 4062y = 19,876x2 + 132,9x - 4494,3
y = 21,298x2 + 155x - 8229,1 y = 21,577x2 + 209,73x - 21154
y = 26,016x2 + 249,42x - 34245
-40000
-30000
-20000
-10000
0
10000
20000
30000
40000
-12 -8 -4 0 4 8 12
Temperature - 27 [ °C ]
Inpu
t vol
tage
[ nV
]-60 [ mV ]-40 [ mV ]-20 [ mV ]0 [ mV ]20 [ mV ]40 [ mV ]60 [ mV ]80 [ mV ]Poli. (-60 [ mV ])Poli. (-40 [ mV ])Poli. (-20 [ mV ])Poli. (0 [ mV ])Poli. (20 [ mV ])Poli. (40 [ mV ])Poli. (60 [ mV ])Poli. (80 [ mV ])
50LBNL, 10 - 11 December 2009
Drift (VIII)Drift (VIII)
Although the larger zero-bias drift, when we concern the ratio of the drift above the bias voltage still we obtain order of ppm/°C error.
The range of the detector bias is between -60 mV and 80 mV well above the typical observed (±20 mV range).
Pre
ampl
ifier
sam
ple
# 1
Thermal drift after correction
y = 0,01x2 + 0,05x + 631,71 y = 0,14x2 + 0,48x + 572,41
y = 0,53x2 + 4,10x + 703,07
y = 0,99x2 + 6,65x - 224,72y = 0,53x2 + 3,88x - 205,73
y = 0,36x2 + 3,50x - 352,57 y = 0,33x2 + 3,12x - 428,07-600
-400
-200
0
200
400
600
800
1000
-12 -8 -4 0 4 8 12
Temperature - 27 [ °C ]
Inpu
t / b
ias
volta
ge [
ppm
]
-60 [ mV ]-40 [ mV ]-20 [ mV ]20 [ mV ]40 [ mV ]60 [ mV ]80 [ mV ]Poli. (-60 [ mV ])Poli. (-40 [ mV ])Poli. (-20 [ mV ])Poli. (20 [ mV ])Poli. (40 [ mV ])Poli. (60 [ mV ])Poli. (80 [ mV ])
51LBNL, 10 - 11 December 2009
Drift (IX): Preamplifier configurationDrift (IX): Preamplifier configuration
JFET Relay
Digital TrimmerAnd DAC
μ-controller
I2C Memory
=OpAmp
Out
puts
Inpu
tsCuts
Characteristics and parameters of the preamplifier will be on a serial access Flash memory. The preamplifier is able to auto-compensate its drift at the temperature of operation and detector bias.
The output offset can be adjusted with a semi-SAR (intelligent) technique.
52LBNL, 10 - 11 December 2009
Drift (X): Drift of the gainDrift (X): Drift of the gain
The drift of the gain of the preamplifier is another parameter to be maintained very small.
We succeed in this by designing the preamplifier with a very large open-loop gain (Appendix D) and using 0.1 %, 15 ppm/°C metal film resistors on the critical paths.
Results obtained have been very good:
Sample Gain at 25°C (V/V) Gain drift from 25°C to 45°C (ppm/°C)
1 201,93 02 202,00 -33 201,91 34 202,13 25 201,89 -16 201,94 -27 201,98 -1
The gain of the preamplifier is a parameter that will contribute marginally to the final performance of the system.
Table1 Gain of preamplifier (test signal is differential 40Hz sine, Amplitude is 0.027Vrms, 0.02Vrms, 0.0137Vrms, 0.007Vrms, RH = 50%)Sample Sample's Label
15°C 25°C 35°C 45°C 15°C to 25°C 25°C to 35°C 35°C to 45°C 15°C to 45°C1 043120-0003 201,955322 201,934063 201,927503 201,934296 -11 -3 3 -32 043120-0007 202,020222 201,997432 201,983442 201,985220 -11 -7 1 -63 043120-0004 201,930011 201,911253 201,910339 201,922657 -9 0 6 -14 043120-0010 202,153851 202,133701 202,133451 202,142567 -10 0 5 -25 043120-0012 201,921730 201,886935 201,874767 201,883836 -17 -6 4 -68 S3 202,062646 202,051148 202,058534 202,088625 -6 4 15 46 043120-0002 201,953747 201,937775 201,929088 201,931629 -8 -4 1 -47 043120-0009 201,992969 201,977018 201,967146 201,971472 -8 -5 2 -4
Gain (V/V) Gain drift (ppm/°C)
53LBNL, 10 - 11 December 2009
Preamplifier SummaryPreamplifier Summary
The preamplifier is ready for production.
Its specifications are:
1. 5 nV/√Hz @1 Hz, 3 nV/√Hz white series noise;
2. 0.07 fA/√Hz parallel noise;
3. 50 nV/°C to 200 nV/°C input drift, almost constant in comparison to the detector bias. This corresponds to a few ppm/°C of inaccuracy of the detector bias.
4. A few ppm/°C of gain drift, almost a totally negligible effect;
5. Drift and offset auto-adjusted with a μ-controller unit;
6. Flash memory for IC parameterization.
7. ±5 V supply voltage with about 50 mW of power dissipation.
54LBNL, 10 - 11 December 2009
Outline: Second stage PGAOutline: Second stage PGA
Fridge with Detectors
K
Preamplifier Antialiasing filter DAQ
Power Supply
Calibrating Pulse Generator
Detector Biasing Network
Slow Control and Safe
Supervisor System
II Stage
For all:
= close to the fridge
= remote, close to the DAQ
=same PCBTemperature stabilization of
det. holder
55LBNL, 10 - 11 December 2009
Second stage PGA (I)Second stage PGA (I)
AD5439, 10 bit current output DAC, R-2R type with Thin-film resistors
The second and the following stages must not add errors to the preamplifier. It is therefore very important that their design is accurate as the preamplifier design.
-
+
AD5429VREF
VIN R
DAC OUTnDI V
2 R=
VOUT
INDAC
VI 0
R+ =
nn
OUT IN2V V , where 1 D 2D
= − ≤ ≤
The AD5429 is a very low drift DAC (±5 ppm/°C of gain drift) having metal-thin resistors that have small the 1/f noise.
It is a dual DAC. A pair of such circuits will be adopted to implement a differential gain stage for the differential preamplifier output.
56LBNL, 10 - 11 December 2009
Second stage PGA (II)Second stage PGA (II)
The Bandwidth of the PGA is more than adequate for our purpose.
102
103
104
105
106
107
-5
0
5
10
15
20
25
30
35
Frequency (Hz)
Gai
n (d
B)
Gain = 1Gain = 2Gain = 4Gain = 8Gain = 16Gain = 23Gain = 32
T = 25°CVin = 100mVpp
The presence of a PGA in CUORE is essential. To exploit fully the dynamic range of the DAQ we need to balance the voltage gain of every detector.
The typical gain required from the detector spread from 1000 V/V to 10000 V/V.
(The range of the allowed gain of the preamplifier has 2 options: from 400 V/V to 10000 V/V and from 26 V/V to 1300 V/V).
57LBNL, 10 - 11 December 2009
Second stage PGA (III)Second stage PGA (III)
The drift of the gain does not contribute to the system.
Table2 Gain of the PGA configuration
DAC CodeMean (V/V) Drift (ppm/°C) Drift (ppm/°C) Drift (ppm/°C) Drift (ppm/°C)
Frequency Amplitude 15°C - 45°C 15°C - 45°C 15°C - 25°C 25°C - 35°C 35°C - 45°C40Hz 600mVpp 255 1,004 0,76 1,42 0,21 0,83
128 2,001 0,39 1,32 -0,45 0,6064 4,003 0,71 1,25 -0,30 1,5032 8,004 -0,05 1,18 -0,30 -0,9316 16,003 0,22 0,91 -0,16 0,0311 23,268 -1,06 -0,37 -1,67 -0,948 32,002 -0,72 -0,42 -1,16 -0,43
40Hz 400mVpp 255 1,004 0,51 0,68 0,62 0,21128 2,000 0,03 0,09 -0,53 0,7164 4,001 0,31 -0,63 0,30 1,2732 8,003 -0,85 -1,61 -0,81 -0,1416 15,998 -0,06 -0,68 0,07 0,4011 23,258 -1,40 -1,50 -1,94 -0,588 31,988 -1,03 -1,81 -1,06 -0,20
40Hz 200mVpp 255 1,004 0,58 0,99 0,61 0,12128 2,001 0,56 2,51 -0,71 0,3164 4,001 0,62 0,44 0,57 0,8832 8,002 -0,35 -0,40 -0,15 -0,5816 16,006 0,42 0,06 1,04 -0,0711 23,264 -0,99 -0,46 -0,50 -2,168 31,992 -0,86 -0,69 -1,05 -0,76
110Hz 600mVpp 255 1,004 0,66 0,79 0,57 0,65128 2,001 0,56 0,97 0,12 0,7364 4,003 0,82 1,01 1,01 0,3632 8,003 -0,09 -0,11 1,04 -1,5716 16,001 0,55 1,65 0,31 -0,2111 23,265 -0,92 -0,20 -1,32 -1,098 31,998 -0,44 0,34 -0,75 -0,80
110Hz 400mVpp 255 1,004 0,50 0,03 0,63 0,80128 2,000 0,16 -0,91 -0,50 2,1164 4,001 0,27 -0,44 -0,42 1,9132 8,004 -0,58 -1,21 -1,70 1,5316 15,999 -0,05 0,47 -1,08 0,7911 23,260 -1,61 -1,37 -3,38 0,498 31,990 -1,20 -1,17 -2,59 0,64
110Hz 200mVpp 255 1,004 0,35 0,14 0,81 -0,04128 2,001 0,65 1,71 1,27 -1,2464 4,001 0,41 1,05 -0,02 0,3732 8,002 -0,57 0,43 -1,00 -0,9916 16,006 -0,04 0,35 0,33 -0,9311 23,264 -1,18 -0,04 -0,28 -3,528 31,992 -0,93 -0,14 -0,55 -2,21
40Hz 8Vpp 255 1,004 0,47 -0,18 1,08 0,31110Hz 8Vpp 255 1,004 0,45 0,23 0,98 -0,02
1000Hz 8Vpp 255 1,004 0,53 0,05 0,86 0,5740Hz 200mVpp 8 31,992 -1,03 -0,18 -2,05 -0,50110Hz 200mVpp 8 31,992 -0,80 -0,44 -0,78 -1,17
1000Hz 200mVpp 8 31,979 -1,39 -1,19 -1,01 -2,10
Test condition Test result of gainInput differential signal Gain of PGA
58LBNL, 10 - 11 December 2009
Second stage PGA (IV)Second stage PGA (IV)
The drift of the offset of the PGA is almost completely negligible:
Table3 Offset of the PGA configurationTest condition Analysis
255 0,000194 1,08 0,0002 1,21 0,000008 0,13128 0,0004 2,21 0,000006 0,0364 0,0008 4,31 0,000005 0,0032 0,0016 9,39 0,000005 0,1016 0,0032 19,33 0,000004 0,1311 0,0047 27,61 0,000006 0,118 0,0064 39,34 0,000004 0,15
255 0,098156 0,88 0,0986 1,12 -0,000001 0,23128 0,1964 2,10 0,000018 0,1664 0,3928 4,24 0,000015 0,1832 0,7855 7,74 -0,000006 0,0816 1,5708 16,42 0,000032 0,1411 2,2838 21,96 0,000038 0,068 3,1409 31,10 0,000033 0,09
Test result of PGA
AD5429 DAC Code
Equivalent input offset (V), @25°C
Equivalent input offset drift (uV/°C)
Input drift (uV/°C)Input (V), @25°C
Output (V), @25°C
Output Drift (uV/°C)
59LBNL, 10 - 11 December 2009
Second stage PGA (V)Second stage PGA (V)
-
+
AD5429A
VREF
R -VOUT+
100AD8676A
Pre Out+-
+
AD5429B
VREF
R -VOUT-
100AD8676B
Pre Out-
The differential gain is implemented with a double DAC and a double OpAmp.
Of course, the codes of the 2 DAC must coincide.
60LBNL, 10 - 11 December 2009
Second stage PGA (VI)Second stage PGA (VI)
Low frequency noise is missing.
The noise is about 30 nV/√Hz for the differential configuration.
It contributes to the preamplifier input with about 0.14 nV/√Hz, totally negligible.
100 101 102 103 1040
10
20
30
40
50
60
70
80
nV/ √
Hz
Hz
Noise at 1 Hz= 32.361White noise = 28.568
61LBNL, 10 - 11 December 2009
Second stage PGA (VII)Second stage PGA (VII)
At the moment we made a demonstrator/prototype for the validation of the solution.
The final design of the front- end main board will have the differential PGA just validated as the second stage of amplification.
Preamplifier
Differential PGA
62LBNL, 10 - 11 December 2009
Outline: Antialiasing filterOutline: Antialiasing filter
Fridge with Detectors
K
Preamplifier Antialiasing filter DAQ
Power Supply
Calibrating Pulse Generator
Detector Biasing Network
Slow Control and Safe
Supervisor System
II Stage
For all:
= close to the fridge
= remote, close to the DAQ
=same PCBTemperature stabilization of
det. holder
63LBNL, 10 - 11 December 2009
Antialiasing Filter (I)Antialiasing Filter (I)
1-
+To the DAQ
-VOUT+
-VOUT-From
the PGA
The Antialiasing filter is an active 6 pole roll-off Thomson (or Bessel) filter.
It is a differential input to differential output gain 2 V/V system.
It has 4 remote selectable bandwidth: 8 Hz, 12 Hz, 16 Hz and 20 Hz to fit the speed of response of the detector.
The antialiasing filter is located close to the DAQ, far from the very front-end.
64LBNL, 10 - 11 December 2009
Antialiasing Filter (II)Antialiasing Filter (II)
Being an element of the acquisition chain the performances of the Thomson filter is very important.
Here we have an example of Frequency response of one channel of the board.
The roll-off for the 4 frequency are parallel.
Phase response of the channel above
NIMA (2009),doi:10.1016/j.nima.2009.09.023
65LBNL, 10 - 11 December 2009
Antialiasing Filter (III)Antialiasing Filter (III)
6 channels are on a 6 units EUROCARD board.
The 24 boards are on 2 PCBs are a good point for statistics evaluation.
66LBNL, 10 - 11 December 2009
Antialiasing Filter (IV)Antialiasing Filter (IV)
Offset distribution and its temperature drift was found compliant.
This was the consequence of having used 0.1%, mini-melf 10 ppm/°C resistors and polyester capacitance for the filter cut-off frequencies.
67LBNL, 10 - 11 December 2009
Antialiasing Filter (V)Antialiasing Filter (V)
Noise at the filter output does not follow the roll-off of the selected bandwidth since the last OpAmps and resistors of the chain are not subjected to the same filtering path.
Input noise of the filter is compliant if we consider that the gain of the chain is of the order of a few thousands V/V.
68LBNL, 10 - 11 December 2009
Antialiasing Filter (VI)Antialiasing Filter (VI)
The Filter board is a 6 units EUROCARD PCB.
6 complete channels are on each board.
An ARM μ-controller manages the board and communicate with the DAQ with the slow control bus.
ARM
One Ch.
The ARM μ-controller provide to set the bandwidth of every channel when asked from the DAQ.
A number of additional features are available. A 10 bits ADC allows to monitor and test the relevant parameters of every stage of every channel. The supply voltage and the temperature are monitored, too.
69LBNL, 10 - 11 December 2009
Antialiasing Filter (VII)Antialiasing Filter (VII)
A back panel is needed and present that allows to marshal the in – out signals.A
ntia
l. B
oard
Ant
ial.
Boa
rd
Bac
k P
anel
70LBNL, 10 - 11 December 2009
Antialiasing Filter (VIII)Antialiasing Filter (VIII)
The rear of the back panel accepts the input signals from the PGAs at its top and it outputs the signals from the filter at the bottom.
Inputs
Outputs
71LBNL, 10 - 11 December 2009
Outline: The detector biasing systemOutline: The detector biasing system
Fridge with Detectors
K
Preamplifier Antialiasing filter DAQ
Power Supply
Calibrating Pulse Generator
Detector Biasing Network
Slow Control and Safe
Supervisor System
II Stage
For all:
= close to the fridge
= remote, close to the DAQ
=same PCBTemperature stabilization of
det. holder
72LBNL, 10 - 11 December 2009
The detector biasing system (I)The detector biasing system (I)
The detector biasing system performs 2 different tasks:
1. Allows to bias the detector with the proper amount of bias voltage through a pair of large value load resistors;
2. Allows to characterize at DC the detector to optimize the working point.
Stringent are the specifications to which it must satisfy:
1. It must sustain voltage from a few mV up to ±30 V;
2. It must deliver a very stable bias;
3. It must show a negligible 1/f noise.
73LBNL, 10 - 11 December 2009
The detector biasing system (II)The detector biasing system (II)
Minimization of parallel noise contribution of load resistors operated at room temperature is obtained with very large value elements.
We use 27 GΩ
+ 27GΩ
resistors. They are lowered with a relay to 5 GΩ
+
5GΩ
when a large bias is applied during the detector characterization phase.
1/f noise in resistors, whatever technology, is obtainable minimization the electric field applied. This can be done only using long resistors (normally designed for high voltage), or resistors made with a vey long serpentine.
IEEE TNS, vol.49, pp. 1808-1813, 2002
30 mm
6 mm
CUORICINO
74LBNL, 10 - 11 December 2009
The detector biasing system (III)The detector biasing system (III)
Very large value resistors are normally in thick-film technology whose thermal stability is not good as for metal-film counterpart.
Although we have selected company able to obtain very good thermal drift with their products, ∼50 ppm/°C, we have developed a custom array that improves this results further.
5 GΩ 25 GΩ 10 MΩ
In the our custom resistors the absolute drift is of the order and less than 100 ppm/°C.
Nevertheless their relative matching is in the 50 ppm/°C.
75LBNL, 10 - 11 December 2009
The detector biasing system (IV)The detector biasing system (IV)
Characterization of absolute drift and matching is better than that specified for the first batch received. Further tests are scheduled with a new batch that is on the way.
Table Voltage of bias generator
15°C 25°C 35°C 45°C 15°C to 25°C 25°C to 35°C 35°C to 45°C 15°C to 45°C 15°C to 25°C 25°C to 35°C 35°C to 45°C 15°C to 45°C
Differential output voltage, V(OUT_P) - V(OUT_N) -14,851333 -14,860911 -14,871076 -14,882322 -958 -1016 -1125 -1033 64 68 76 70
Differential input voltage, V(IN_P) - V(IN_N) 3,204298 3,204353 3,204348 3,204365 6 -1 2 2 2 0 1 1Voltage at OUT_N -7,494916 -7,500185 -7,505941 -7,511928 -527 -576 -599 -567 70 77 80 76Voltage at IN_N 1,601974 1,602053 1,602055 1,602083 8 0 3 4 5 0 2 2
Differential output voltage, V(OUT_P) - V(OUT_N) 14,852342 14,861656 14,872200 14,883340 931 1054 1114 1033 63 71 75 70
Differential input voltage, V(IN_P) - V(IN_N) -3,204384 -3,204393 -3,204393 -3,204376 -1 0 2 0 0 0 -1 0Voltage at OUT_N 7,502981 7,507986 7,513511 7,519630 500 552 612 555 67 74 81 74Voltage at IN_N -1,603664 -1,603652 -1,603633 -1,603640 1 2 -1 1 -1 -1 0 0
Differential output voltage, V(OUT_P) - V(OUT_N) -9,294872 -9,300280 -9,306972 -9,313644 -541 -669 -667 -626 58 72 72 67
Differential input voltage, V(IN_P) - V(IN_N) 2,004313 2,004329 2,004378 2,004346 2 5 -3 1 1 2 -2 1Voltage at OUT_N -4,691412 -4,694490 -4,698132 -4,701860 -308 -364 -373 -348 66 78 79 74Voltage at IN_N 1,002241 1,002265 1,002307 1,002277 2 4 -3 1 2 4 -3 1
Differential output voltage, V(OUT_P) - V(OUT_N) 9,295776 9,301106 9,307483 9,314104 533 638 662 611 57 69 71 66
Differential input voltage, V(IN_P) - V(IN_N) -2,004375 -2,004419 -2,004348 -2,004377 -4 7 -3 0 2 -4 1 0Voltage at OUT_N 4,697201 4,699978 4,703382 4,706896 278 340 351 323 59 72 75 69Voltage at IN_N -1,003434 -1,003400 -1,003374 -1,003398 3 3 -2 1 -3 -3 2 -1
3
4
Voltage measured Voltage drift (ppm/°C)
1
2
DC Voltage (V) Voltage drift (uV/°C)
A first test:
76LBNL, 10 - 11 December 2009
The detector biasing system (V)The detector biasing system (V)
RL2 = 5 GΩR
L1=2
5 G
Ω
RT =10 MΩ+
-VBIAS+
VD+
VD-
Bolometer
Other symmetric network
Exploiting of the network resistors: Principle of operation
RREF
VO+ TO BIAS
REF
RV VR+ +=
Since VD+ ∼0 V, we have:
BIASREF
DETT
L1 L2
RVRR
IR
+=+
Hence:
T BIASRL1 L2
DF
EE
TI 0T T
R VR RR
+⎛ ⎞Δ Δ≈
+≈⎜ ⎟Δ Δ ⎝ ⎠
With the right chosen of VBIAS+ and RREF .
Appendix E
77LBNL, 10 - 11 December 2009
The detector biasing system (VI)The detector biasing system (VI)
Custom networks has been designed and prototyped by 2 selected companies.
Here the test circuit is shown with which we have tested the temperature behavior of the current:
78LBNL, 10 - 11 December 2009
The detector biasing system (VII)The detector biasing system (VII)
Custom networks has been designed and prototyped by 2 selected companies, Nicrome and Siegert.
Here the test circuit is shown with which we have tested the temperature behavior of the current:
So far we have obtained about 7 ppm/°C a very excellent result.
Of course we have to verify with more statistics.
C to 45°C 15°C to 45°C 15°C to 25°C 25°C to 35°C 35°C to 45°C 15°C to 45°C4,05 -1,23 4 -4 6 26,08 4,89 5 7 9 7
Drift (ppm/°C)
79LBNL, 10 - 11 December 2009
Outline: FrontOutline: Front--end main boardend main board
Fridge with Detectors
K
Preamplifier Antialiasing filter DAQ
Power Supply
Calibrating Pulse Generator
Detector Biasing Network
Slow Control and Safe
Supervisor System
II Stage
For all:
= close to the fridge
= remote, close to the DAQ
=same PCBTemperature stabilization of
det. holder
80LBNL, 10 - 11 December 2009
FrontFront--end main board (I)end main board (I)
Preamplifier
Power Supply
Detector Biasing Network
II StageThe main board on the fridge will be an EUROCARD 6U.
6 complete channels will be housed on it.
In addition to the 6 analog channels a μ-controller will manage the board on the basis of the DAQ needs.
A number of monitoring features will be present that will allow to investigate possible unpredictable situations
The board is in going in the layout phase. Ready to be prototyped soon.Temperature
stabilization of det. holder
Only in a limited number of boards
81LBNL, 10 - 11 December 2009
Outline: The pulse generator for detector calibrationOutline: The pulse generator for detector calibration
Fridge with Detectors
K
Preamplifier Antialiasing filter DAQ
Power Supply
Calibrating Pulse Generator
Detector Biasing Network
Slow Control and Safe
Supervisor System
II Stage
For all:
= close to the fridge
= remote, close to the DAQ
=same PCBTemperature stabilization of
det. holder
82LBNL, 10 - 11 December 2009
The pulse generator for detector bias (I)The pulse generator for detector bias (I)
CT
Heather Pulser
Refrigerator
Refrigerator
The injection of thermal heat pulses that simulate the particle signals is very important to maintain stable the system during the very long runs.
The stability of the pulse system must be stable at a level close to a particle source.
The stability concerns 2 items: the pulser and the heather resistor glued on the crystal.
83LBNL, 10 - 11 December 2009
The pulse generator for detector bias (II)The pulse generator for detector bias (II)
CT
Heather
PulserFridge
1. The heather is not absolutely stable. It depends on temperature around a ppm/°C;
2. The heather is connected to the crystal as well as to the heat sink with thermal conductance having a different temperature behavior.
NIMA, Vol.412, 1998, p.454-464
KG
KW
KG =Glue thermal conductance, ÷T3;KW =connecting wire thermal conductance, ÷T
For what concerns the heather resistor part we have to emphasize
that:
The above 2 conditions set some error that must be determined.
84LBNL, 10 - 11 December 2009
The pulse generator for detector bias (III)The pulse generator for detector bias (III)
The present version of the pulser has a level of accuracy that is slightly above the ppm/°C, <1.3 ppm/°C, in the pulse of power generated.
We are now working to improve further its performance mainly for what concerns the rejection against possible EMI disturbances.
Remote managing will be more versatile to allow for a better distribution of the calibrating signals column by column in CUORE.
IEEE TNS, Vol. 50, pp. 979-986, 2003,
CT
Heather Pulser
Refrigerator
Refrigerator
85LBNL, 10 - 11 December 2009
The pulse generator for detector bias (IV)The pulse generator for detector bias (IV)
Old pulser boardCPLD
New μ-controller unit
NEW ANALOG PULSE CIRCUIT
86LBNL, 10 - 11 December 2009
Outline: The power supplyOutline: The power supply
Fridge with Detectors
K
Preamplifier Antialiasing filter DAQ
Power Supply
Calibrating Pulse Generator
Detector Biasing Network
Slow Control and Safe
Supervisor System
II Stage
For all:
= close to the fridge
= remote, close to the DAQ
=same PCBTemperature stabilization of
det. holder
87LBNL, 10 - 11 December 2009
Power Supply (I)Power Supply (I)
The power supply of the system is very important for 2 reasons.
1. It is exploited to provide power to the various circuits that compose the system
2. It is exploited as the voltage reference for the drift correcting circuits, the detector biasing and the pulse generator.
Many units are used that provide power in close proximity to themselves.
88LBNL, 10 - 11 December 2009
Power Supply (II)Power Supply (II)
Power supply distribution:
AC/DC:Main line to 48 V
Linear power supply
Mai
n Li
ne
DC/DC: 48 V to ±6 V or ±11 V
and 5 V
Low pass Filter for the
switching glitches
DC/DC: 48 V to ±6 V or ±11 V
and 5 V
Low pass Filter for the
switching glitches
DC/DC: 48 V to ±6 V or ±11 V
and 5 V
Low pass Filter for the
switching glitches
Linear power supply
Linear power supply
89LBNL, 10 - 11 December 2009
Power Supply (III)Power Supply (III)
The switching section has already designed and tested with very good results.
The AC/DC is a commercial instrument that has very good characteristics and is completely remote manageable.
AC/DC:Main line to 48 V
Mai
n Li
ne
DC/DC: 48 V to ±6 V or ±11 V
and 5 V
Low pass Filter for the
switching glitches
DC/DC: 48 V to ±6 V or ±11 V
and 5 V
Low pass Filter for the
switching glitches
This section is of course very far from the detecting system, outside the faraday cage.
90LBNL, 10 - 11 December 2009
Power Supply (IV)Power Supply (IV)
The DC/DC section has 48 V input and generates 3 independent outputs: ±7 V and 5 V for the front-end and ±11 V and 5 V for the antialiasing filter.
It is very important to reject any residual of glitches at the input of the linear supply regulator.
AC/DC:Main line to 48 V
Mai
n Li
ne DC/DC: 48 V to ±6 V or ±11 V
and 5 V
Low pass Filter for the
switching glitches
91LBNL, 10 - 11 December 2009
Power Supply (V)Power Supply (V)
A system of filtering has been used with excellent results: glitches at the output of the filtered DC/DC are almost negligible.
AC/DC:Main line to 48 V
Mai
n Li
ne DC/DC: 48 V to ±6 V or ±11 V
and 5 V
Low pass Filter for the
switching glitches
The system is remote programmable with monitoring features.
All the digital sections will have a galvanic isolation each other.
Appendix F
92LBNL, 10 - 11 December 2009
Power Supply (VI)Power Supply (VI)
Linear power supply
Rev. of Sci.Instr., Vol. 70, p.3473-3478, 1999
AC/DC:Main line to 48 V
Mai
n Li
ne DC/DC: 48 V to ±6 V or ±11 V
and 5 V
Low pass Filter for the
switching glitches
DC/DC: 48 V to ±6 V or ±11 V
and 5 V
Low pass Filter for the
switching glitches
A linear supply – reference voltage generator is used with the following features:
• ±10 V output voltage, adjustable from ±6 V to ±13 V;
• Stability: 1.5 ppm/°C;
• Noise at 1 Hz: <100 nV/√Hz, the white component being about 10 nV/√.
93LBNL, 10 - 11 December 2009
Power Supply (VII)Power Supply (VII)
Linear power supply
AC/DC:Main line to 48 V
Mai
n Li
ne DC/DC: 48 V to ±6 V or ±11 V
and 5 V
Low pass Filter for the
switching glitches
DC/DC: 48 V to ±6 V or ±11 V
and 5 V
Low pass Filter for the
switching glitches
With the new supply voltage we will improve to:
• Output voltage remote adjustable from ±6 V to ±13 V;
• Stability: ∼1 ppm/°C;
• Noise at 1 Hz: ≤50 nV/√Hz, the white component being about 10 nV/√;
• Completely remote manageable
94LBNL, 10 - 11 December 2009
Outline: Temperature stabilization of the detector holderOutline: Temperature stabilization of the detector holder
Fridge with Detectors
K
Preamplifier Antialiasing filter DAQ
Power Supply
Calibrating Pulse Generator
Detector Biasing Network
Slow Control and Safe
Supervisor System
II Stage
For all:
= close to the fridge
= remote, close to the DAQ
=same PCBTemperature stabilization of
det. holder
95LBNL, 10 - 11 December 2009
Temperature stabilization of the Detector Holder (I)Temperature stabilization of the Detector Holder (I)
The temperature stabilization of the detector holder is very important.
Its implementation is possible by the conventional PID (Proportional, derivative, Integrative) loop.
Commercial system are available able to implement the loop.
However in our application they are not compliant by a number of reasons:
Commercial instruments are AC supplied and have cost,
They read the temperature applying an AC signal;
The temperature sensor must have an adequate small impedance with a consequence reduced sensitivity.
We have therefore introduced a very simple stuff having the valuable feature to work at DC: the loop is implemented using a chain similar to that of our detector amplification.
This way a high performance is obtained since the thermal sensor that can be used is similar to the thermistors on the crystals.
96LBNL, 10 - 11 December 2009
VBIAS /2RL /2
VBIAS /2RL /2
Det
ecto
rfra
me
RT (T)
Rh
Not to scale
VOFF
PGA
gm (VA -VB )
Heat Sink
KF (T)
CF (T)
VA
VBVT
Temperature stabilization of the Detector Holder (II)Temperature stabilization of the Detector Holder (II)
IEEE TNS, Vol. 52, pp. 1630-1637.
To the amplifying chain a voltage to current conversion is added (see Appendix G
for detail) to close the loop on a heather resistor located on the detector holder in remote position in respect to the thermometer.
The temperature of the holder is tuned exploiting the offset adjustment of the preamplifier.
The tuning is therefore available remotely.
In CUORE few of such units will be used to set the temperature in strategic positions in the cold finger.
97LBNL, 10 - 11 December 2009
Outline: Slow Control and Communication ProtocolOutline: Slow Control and Communication Protocol
Fridge with Detectors
K
Preamplifier Antialiasing filter DAQ
Power Supply
Calibrating Pulse Generator
Detector Biasing Network
Slow Control and Safe
Supervisor System
II Stage
For all:
= close to the fridge
= remote, close to the DAQ
=same PCBTemperature stabilization of
det. holder
98LBNL, 10 - 11 December 2009
Slow Control and Communication Protocol (I)Slow Control and Communication Protocol (I)
• All the circuits and section of the ES will be remote manageable from the DAQ;
• Many functions will be introduced with the aim to create warning when necessary;
• An essential feature of the system is that every digital section will be completely idle during data taking and no clocks will be around;
• The digital system will be based on μ-controller of the ARM family. To this an exception is given in the μ-controller on the preamplifier, an 8051, and the μ- controller in the swathing system, a PIC.
• The communication protocol between the ES sections and the DAQ will be based on CAN bus;
• Fiber optics will be the media for transmitting the serial data of the CAN bus.
99LBNL, 10 - 11 December 2009
Slow Control and Communication Protocol (II)Slow Control and Communication Protocol (II)
USB to CAN CAN to serial (optic)
Sender
Serial to CAN
Receiver
The system is compliant with both Windows and Linux.
100LBNL, 10 - 11 December 2009
Outline: Cost Outline: Cost
The electronic System (ES):
Cost
101LBNL, 10 - 11 December 2009
Cost (I)Cost (I)
Number of Units1 02 03 04 05 926 11007 11008 22009 110010 011 1512 184,0013 15,0014 1015 1016 1517 1518 184
Racks for the very front-endFront panels of the very front-end per channel
JFET for Room Tem., RT, PreamplifierRT Preamplifier board
Main Board and second stage
Boards for the cold stageJFET at coldLoad resistor at cold
Cabling from the front-end to the Filtering stage
Cabling from the fridge to the front-endBoxes for the cold stage
Digital control hubTraslation from 15 pole to 25 pole connectors
Load Resistors at RTBoards for RT Load resistorsBack Plane for cold ElectronicsBack Plane for RT Electronics
I2C Board
Very Front-end and second stage
Blue text: option for a buffer stage of amplification at cold. Not considered in the first phase of CUORE.
For the budgetary cost see Frank’s report.
102LBNL, 10 - 11 December 2009
Cost (II)Cost (II)
Number of Units19 220 621 9222 623 624 9225 18426 4627 92
PCB adapter for cabling Bessel to DAQCabling from Bessel to adapter
Racks for the Bessel and triggerFront panels for the Bessel and triggerCabling from front-end to Bessel
Farady cages Back planes Bessel and triggerBoards Bessel and TriggerOptical control of Bessel and Trigger
Filtering (Bessel) and trigger
103LBNL, 10 - 11 December 2009
Cost (III)Cost (III)
Number of Units28 1329 430 431 8532 4
Calibration systemBoards for the pulse genratorsRacks Digital controlCabling from pulse generators to the fridgeCabling from pulse generators to the control rooom
104LBNL, 10 - 11 December 2009
Cost (IV)Cost (IV)
Number of Units33 2934 1535 1536 1537 438 2139 2140 341 2142 343 444 445 15
Front panel for DC/DCRacks per DC/DCDigital control of the pre-regulators
Digital control of the voltage supplies
Cabling between the Pre-regulators and Voltage SuppliesCabling between the Voltage Supplies and the very front-end
Pre Regulation voltage supply DC/DCBoard for DC/DC pre-regulationBack panel per DC7DC pre regulation
Boards for the Voltage supplies
Front Panels for the voltage suppliesBoxes for the voltage suppliesPre-regulation of the Voltage supplies AC/DC
Voltage Supplies
105LBNL, 10 - 11 December 2009
Cost (V)Cost (V)
Number of Units46 247 448 1249 1650 2
CablingBoxes
Digital control and glue logicComputer to HUB-optical conversion
Fiber OpticsHUB-optical conversion to optical to electrical single-tower
106LBNL, 10 - 11 December 2009
AppendixesAppendixes
Here it starts the Appendix section
107LBNL, 10 - 11 December 2009
Appendix A: why a voltage and not a charge preamplifier? (I)Appendix A: why a voltage and not a charge preamplifier? (I)
First important consideration: our are semiconductor thermistors. Their resistance value increases with temperature lowering, or: ΔR/ΔT<0;
VB
IBIAS
Power dissipation:
RB
If bias increases, the power increases, that cause the temperature to increase determining a thermistor lowering, with the consequence lowering of the dissipated power, that establishes an equilibrium: a negative feedback is established.
2B BBIASP I R=
VB
RBVBIAS
Power dissipation:2BIAS
BB
VP
R=
If bias increases, the power increases, that cause the temperature to increase determining a thermistor lowering, with the consequence increasing of the dissipated power, that establishes a non-equilibrium: a positive feedback is established.
108LBNL, 10 - 11 December 2009
VB
Appendix A: why a voltage and not a charge preamplifier? (II)Appendix A: why a voltage and not a charge preamplifier? (II)
VBIAS
RB
Voltage sensitive preamplifier: negative feedback when RL >>RB .
RBVBIAS
With current/charge sensitive preamplifier: the bolometer is biased in constant voltage and the feedback is always positive.
RL
IEEE TNS, Vol. 52, pp. 1630-1637, 2005.
2L BBIAS
L B
Z RP IZ R
−Δ ÷
+
With a voltage sensitive preamplifier in a generic case we have that the loop gain is:
and the feedback becomes positive if ZL <RB,
109LBNL, 10 - 11 December 2009
Appendix B: Microphonism (I)Appendix B: Microphonism (I)
Let’s try to quantify.
Suppose that the mechanical vibrations induce a change of the parasitic capacitance CP of the form:
PooP CVVCQ Δ+Δ=Δ
RB /ZB CResIB
oVΔ
[ ]∑ ωγ=Δi
)tsin(MC oiiiP
We can express the change of the charge on CP by:
The current in CP is:dtdQI sRe =
IRes
ID Or, in the frequency domain:
ω=Δ+Δ= js),s(CsV)s(VsC)s(I PooPsRe
( )
( ) PoiooB
BP
PoiooPB
oo
sReB
ooPoi
B
CsVVVR
RsC1
CsVVVsCR
VV
IR
VVCVs
I
Δ++Δ+
=
Δ++Δ++Δ
=
++Δ
=+
110LBNL, 10 - 11 December 2009
Appendix B: Microphonism (II)Appendix B: Microphonism (II)
RB CResIB
oVΔ
ID
⎥⎦⎤
⎢⎣⎡ +
++
Δ+
−=+Δ PoiB
BPB
PP
oBP
PBoo CV
sI
RsC1R
CCV
RsC1CsRVV
( )
( ) PoiooB
BP
PoiooPB
oo
sReB
ooPoi
B
CsVVVR
RsC1
CsVVVsCR
VV
IR
VVCVs
I
Δ++Δ+
=
Δ++Δ++Δ
=
++Δ
=+
( ) PP
oi2BP
PBo C
CVRC1
CRV Δ
ω+
ω=Δ
111LBNL, 10 - 11 December 2009
Appendix B: Microphonism (III)Appendix B: Microphonism (III)
RB CResIB
oVΔ
ID
( )∑ ⎥⎥⎦
⎤
⎢⎢⎣
⎡ Δ
ω+
ω≈Δ
i P
i_Poi2
BPoi
PBoio C
CV
RC1
CRV
[ ]∑ ωγ=Δi
)tsin(MC oiiiPIf:
Then (un-correlation):
112LBNL, 10 - 11 December 2009
Appendix B: Microphonism (IV)Appendix B: Microphonism (IV)
( ) PP
o2BPo
PBoo C
CVRC1
CRV Δ
ω+
ω≈Δ
)tsin(MC oP ωγ=Δ
To simplify consider only a monochromatic disturbance:
So:
1. The noise is proportional to the fractional change of the parasitic capacitance;
2. The noise is proportional to the bias level of the detector;
3. The noise depends on the amount of the parasitic impedance at the frequency of the disturbance.
Superconducting detectors and bolometers: achievements and perspectives for applications", 20- 21 November 2000, Napoli, invited.
113LBNL, 10 - 11 December 2009
Appendix B: Microphonism (V)Appendix B: Microphonism (V)
( )( )( ) +
+
+
+ Δ
ω+
ω≈Δ
PP
o2BPo
PBoo C
CV2/RC1
C2/RV
Now we have to consider that we use the differential configuration with both the kind of elctronics:
cP +
-cP
( )( )( ) −
−
−
− Δ
ω+
ω≈Δ
PP
o2BPo
PBoo C
CV2/RC1
C2/RV
( )( )( )
( )α−Δ
ω+
ω≈Δ
−≈+1
CCV
2/RC1
C2/RVPP
o2BPo
PBoPCPCo
999.099.0 ÷≈α
The effect of the differential configuration is given by the term α
that in an ideal situation should be equal to 1, but in the real case is slightly less than 1.
114LBNL, 10 - 11 December 2009
Appendix B: Microphonism (VI)Appendix B: Microphonism (VI)
( )( )( )
( )α−Δ
ω+
ω≈Δ 1
CCV
2/RC1
C2/RVPP
o2BPo
PBoo
To simplify consider only a monochromatic disturbance:
So:
(RB /2)(MΩ)CP (pF) fo
205
507
5010
1005
10012
100 0.0062 0.021 0.030 0.030 0.057
200 0.124 0.040 0.053 0.053 0.081
500 0.030 0.074 0.084 0.084 0.096
( ) ( )
( )( )o B P
2o P B
R / 2 C 1
1 C R / 2
ω −α
+ ω
α=0.9
115LBNL, 10 - 11 December 2009
Appendix C: The best estimator (1)Appendix C: The best estimator (1)
At the preamplifier output we have the signal V(t)=Us(t), where s(t) is the transfer function. The output noise is given by the spectrum N(ω) (V(t)=Us(t)+n(t)).
We would like to find the optimal weighting function, or estimator for any time t. Let’s call w(t) this function, able to give the best weight in the interval dt around t.
[ ]Est0
U Us(t) w(t) dt∞
= α∫We got: with α
the normalizing factor.
From the error theory we know that the optimal weighting function is the one the equal the ratio of the signal above the fluctuation at the time t.
Unfortunately it is not simple to perform the evaluation in time domain. It is better to move to the frequency domain:
116LBNL, 10 - 11 December 2009
Appendix C: The best estimator (2)Appendix C: The best estimator (2)
If s(t) ↔S(ω) and p(t) ↔ P(ω) are the Fourier transform pairs. From the Parseval theorem we have:
[ ] *Est
0
1U Us(t) w(t) dt US( ) W ( ) d2
⌠⎮⌡
∞∞
−∞
⎡ ⎤= α = ω ω α ω∫ ⎣ ⎦π
From the definition given to w(t) we consider for W(ω):
S( )W( )N( )
ωω = α
ω
From the above position we get:
2 2
M0
1 1
S( ) S( )1 2d d2 N( ) N ( )
⌠ ⌠⎮ ⎮⎮ ⎮⎮ ⎮⌡ ⌡
∞ ∞
−∞
α = =
ω ωω ω
π ω π ω
*Est
1 S ( )U US( ) d2 N( )
⌠⎮⎮⎮⌡
∞
−∞
⎡ ⎤ω= ω α ω⎢ ⎥
π ω⎢ ⎥⎣ ⎦
We have: (NM (ω)=monolateral power spectrum.)
117LBNL, 10 - 11 December 2009
Appendix C: The best estimator (3)Appendix C: The best estimator (3)
Our weight is then:
[ ] *Est
0
1U Us(t) w(t) dt US( ) W ( ) d2
⌠⎮⌡
∞∞
−∞
⎡ ⎤= α = ω ω α ω∫ ⎣ ⎦π
From the definition given to w(t) we consider for W(ω):
2
S( ) 1W( )N( )
S( )1 d2 N( )
⌠⎮⎮⎮⌡
∞
−∞
ωω =
ωω
ωπ ω
118LBNL, 10 - 11 December 2009
Appendix C: The best estimator (4)Appendix C: The best estimator (4)
From the above position we get:
2
2 2
M0
1 1
S( ) S( )1 2d d2 N( ) N ( )
⌠ ⌠⎮ ⎮⎮ ⎮⎮ ⎮⌡ ⌡
∞ ∞
−∞
σ = α = =
ω ωω ω
π ω π ω
222 2
2 22
S( )1 1 1( ) W( ) d N( ) d2 2 N( )
S( )1 d2 N( )
⌠⎮⎮⎮
⌠ ⎮⎮ ⎮⌡⎮⎮ ⌠⎮ ⎮⎮⌡ ⎮⎮
⌡
∞
∞
∞−∞
−∞−∞
ωσ = σ ω ω α ω = ω ω
π π ω ⎛ ⎞⎜ ⎟ω
ω⎜ ⎟π ω⎜ ⎟⎝ ⎠
Namely:
(NM (ω)=monolateral power spectrum.)
119LBNL, 10 - 11 December 2009
Appendix C: The best estimator (5)Appendix C: The best estimator (5)
In first approximation we can consider the signal voltage at the preamplifier output given by:
22 2 2Atot L B
ii i i
4= + +The total parallel noise is:
t BBi iB
i(t) U K e I( ) U K , s j1 s
− τ τ= ↔ ω = = ω
+ τ
( )( )2 2 2 2
tot P A BBA AFWHM 2 2 2i B B B totBA
e Z i eC C Z2.355U 1K Z e Z i
+ += +
τ τ +
Therefore, from the optimal estimator we can calculate:
Where:CP =parasitic detector shunting capacitance;
CA =preamplifier open loop input capacitance;
ZB = dynamic detector impedance;
Kv = energy conversion gain, usually expressed in μV/MeV.
120LBNL, 10 - 11 December 2009
Appendix C: The best estimator (6)Appendix C: The best estimator (6)
From the expression above a number of considerations can be made:
• Parallel noise effect is independent from the value of the detector shunting capacitance;
• Series preamplifier noise increases its effect on the noise performances at large detector shunting capacitances. This effect is weighted by the ratio of the electrical time constant above the signal roll-off time constant, and by the ratio of the parallel noise contribution above the series noise.
( )( )2 2 2 2
tot P A BBA AFWHM 2 2 2i B B B totBA
e Z i eC C Z2.355U 1K Z e Z i
+ += +
τ τ +
( )( )2 2 2
to2 2
tott 2BAA
P A B BFWHM 2i B B AB
Z iC C Z2.355Ue Z
1i
eK Z e
+
τ+
= + +τ
121LBNL, 10 - 11 December 2009
Appendix D: The preamplifier (I)Appendix D: The preamplifier (I)
122LBNL, 10 - 11 December 2009
Appendix D: The preamplifier (II)Appendix D: The preamplifier (II)
123LBNL, 10 - 11 December 2009
Appendix E: Detector Biasing circuit schematic diagram (I)Appendix E: Detector Biasing circuit schematic diagram (I)
RL2 = 5 GΩR
L1=2
5 G
Ω
RT =10 MΩ+
-VBIAS+
VD+
VD-
Other symmetric network
RREF
VO+
Conventional set-up for the switch:
In the conventional set-up with the switch open the actual resistance is:
SWRS
= Switch Parasitic resistance
( )EQ L1 L S2 RR R R= +
Although RS is very large and does not affect RL1 value, its thermal contribution to the drift is not negligible, worsening the drift to a a hundred of ppm/°C.
124LBNL, 10 - 11 December 2009
Appendix E: Detector Biasing circuit schematic diagram (II)Appendix E: Detector Biasing circuit schematic diagram (II)
RL2 = 5 GΩR
L1=2
5 G
Ω
RT =10 MΩ+
-VBIAS+
VD+
VD-
Other symmetric network
RREF
VO+
In the actual case the relay switch may add parasitic resistance in parallel to RL1 .
RP =3 MΩ
With the implemented set-up in normal condition Rs1 is driven toward GND, while the thermistor has now in parallel:
SWRS1
= Switch Parasitic resistance
RS2
RB
( )BEq B L S2 S32 RR R R R= +
Now the effect of RS on the system is negligible since RB is 2 orders of magnitude smaller than RL1 .
During DC characterization at large voltages the load resistor can be lowered to:
( )LEq L1 L1 PR R R R= +
RS3
125LBNL, 10 - 11 December 2009
Appendix F: DC/DC simplified scheme (I)Appendix F: DC/DC simplified scheme (I)
DC/DC + Filter
126LBNL, 10 - 11 December 2009
Appendix F: DC/DC simplified scheme (II)Appendix F: DC/DC simplified scheme (II)
μ-controller based switching system
127LBNL, 10 - 11 December 2009
Appendix G: Voltage to Current conversion for the Temperature stAppendix G: Voltage to Current conversion for the Temperature stabilizationabilization
+
-+
-+
-
Rh
R1
R2 R3
X2
+
-VREF
VA
VB
Com
AG1 AG2
CL
VCC
RN
DNIh