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Section 7: Microprogrammed Control 1
Section 7: Microprogrammed Control
M. Balakrishnan
Dept. of Comp. Sci. & Engg.
I.I.T. Delhi
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Section 7: Microprogrammed Control 2
Data-Control Partition
DataPart
ControlPart
Statussignals
Controlsignals
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Section 7: Microprogrammed Control 3
Control Unit Design Options
• Adhoc Design– Combination of MSI & SSI modules
• Random logic implementation– Starting from a state machinedescription
• Microprogrammed control– Starting from a RTL description or even a
modified state machine description
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Section 7: Microprogrammed Control 4
Terminology
• Microprogram
• Microinstruction
• Microoperations
• Microinstruction format
• Microsequencer
• Control/Microprogram ROM
• Microinstruction register
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Section 7: Microprogrammed Control 5
Block Diagram
Seq ControlROM
REG
DataPart
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Section 7: Microprogrammed Control 6
Microprogrammed Control: Advantages & Disadvantages
• Advantages– Flexible and structured design– Testing sequences can be easily incorporated– Easy to document and debug
• Disadvantages– Expensive especially for small designs– Slower than random logic
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Section 7: Microprogrammed Control 7
Microinstruction Format
1: Data Part Control Signals m
2:Sequencer control/action select k
3: Status control select s
4: Next address n
w (word length) = m + k + s + n
1 2 3 4
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Section 7: Microprogrammed Control 8
Component Sizes
• Data Part: m control inputs,
S status outputs
• Microsequencer:k+1 inputs, n outputs
• Status mux: S status inputs,
s select lines, 1 output
• Control ROM: N w bits
• Microinst. Reg.: w bits
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Section 7: Microprogrammed Control 9
Block Diagram
Seq ControlROM
REG
DataPart
MUX1
n w m
Ssk
n
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Section 7: Microprogrammed Control 10
Clock Period Computation
• tdp : Maximum delay in data part
• tstatus : Maximum delay for status gen.
• tsta_mux : Delay of status multiplexer
• tseq : Microsequencer delay
• trom : Control ROM delay
• treg : Register delay
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Section 7: Microprogrammed Control 11
Performance & Clock Period
tclk max { tdp,
tstatus + tsta_mux + tseq + trom + treg}
Total Time (T) = tclk nclk
Pipelining can be used to decrease the clock period but may also result in increasing the number of clocks.
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Section 7: Microprogrammed Control 12
Microprogrammed Control Design: Example
M. Balakrishnan
Dept. of Comp. Sci. & Engg.
I.I.T. Delhi
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Section 7: Microprogrammed Control 13
Design Steps
• Design the datapart and identify the control and status signals
• Design the microsequencer based on the branchings required
• From the schedule of operations finalize the size of the control ROM
• Finalize the microinstruction format• Generate the microprogram
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Section 7: Microprogrammed Control 14
Case Study: GCD Computer
GCDComputer
x
y
z
starteoc
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Section 7: Microprogrammed Control 15
GCD Algorithm
s: wait till (start=1);
input x, y; eoc := 0;
while ( x y ) do
if ( x > y ) then x := x - y
else y := y - x
endif;
endwhile;
z := x; eoc := 1; go to s;
end.
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Section 7: Microprogrammed Control 16
GCD Computer: Data Part
R2R1
R3Comp SUB
eoc
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Section 7: Microprogrammed Control 17
GCD Computer: State Diagram
S0
S2
S4S5S6
S1
S3
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Section 7: Microprogrammed Control 18
Control Flow Requirements
• Next microinstruction
• If (cond) then …
else “m(i + 1)”
cond = {start’, .eq.,.gt.}
• Go to “m(0)”
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Section 7: Microprogrammed Control 19
Microsequencer Specifications
Microsequencer instructions
• Next (or continue)
• Conditional jump
• Unconditional Jump
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Section 7: Microprogrammed Control 20
Block Diagram
Seq ControlROM
REG
DataPart
MUX1
n w m
Ssk
n
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Section 7: Microprogrammed Control 21
Microinstruction Format
• Data part control signals– sel_R1, sel_R2, sel_sub1, sel_seb2, ld_R1,
ld_R2, ld_R3, clr_eoc, pr_eoc
• Control Part signals– seq._ins (2 bits), cond_sel(2 bits), Next_adr(3
bits)
• Status signals– start’, .eq., .gt.
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Section 7: Microprogrammed Control 22
Symbolic Microprogram
• M0: s_ins = cjmp, c_sel = start’, NA=0• M1: s_R1=x, s_R2 = y, ld_R1, ld_R2,
clr_eoc, s_ins = cont• M2: s_ins = cjmp, c_sel = .eq., NA= 6 • M3: s_ins = cjmp, c_sel = .gt., NA= 5• M4: sub1= R1, sub2 = R2, ld_R1, s_ins= jp ,NA=2• M5: sub1= R2, sub2 = R1, ld_R2, s_ins= jp, NA = 2• M6: pr_eoc, ld_R3, s_ins = jp, NA = 0
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Section 7: Microprogrammed Control 23
Microsequencer Design
M. Balakrishnan
Dept. of Comp. Sci. & Engg.
I.I.T. Delhi
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Section 7: Microprogrammed Control 24
Microsequencer Design Steps
The role of the microsequencer is to generate the next address.
• Enumerate the microsequencer instructions that need to be supported
• Identify all the inputs to the “Next Address” multiplexer
• Synthesize the logic for the select input of the “Next Address” multiplexer
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Section 7: Microprogrammed Control 25
Microsequencer Synthesis: Example
Microsequencer instructions to be supported
Instruction Encoding
• NEXT 0 0
• CJMP 0 1
• JMP 1 0
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Section 7: Microprogrammed Control 26
“NA” Mux Inputs
NAMux
PC
+1
NABA
Cond
seq_instSel Logic
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Section 7: Microprogrammed Control 27
Next Address Select Logic
Microseq. Instr. Cond NA_selI1 I0 C S0 0 X 00 1 0 00 1 1 11 0 X 11 1 X X
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Section 7: Microprogrammed Control 28
A Generic Microsequencer
NAMux
PC
+1
BA
Cond
seq_inst
Sel Logic
b
“0”
Dec 0Lpcntr
NA
Stack
Cond_en
OE
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Section 7: Microprogrammed Control 29
Microsequencer Instructions
• NEXT (or CONT)• JPC• JMP• JZERO• JSUB• RET• LD_CNTR• RPNZ
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Section 7: Microprogrammed Control 30
Block Diagram
seqControlROM
Insreg
DataPart
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Section 7: Microprogrammed Control 31
Timing Diagram
Clk
NA
seq_instr
a a+1
JSUB b
b
NEXT
MI[a] MI[a+1] MI[b]instr
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Section 7: Microprogrammed Control 32
Multi-way Branching
• Multiple address fields
• Address mapping through look up tables
• Address mapping through address translation and encoding
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Section 7: Microprogrammed Control 33
Multiple Address Fields
Si
Si+1 Sj Sk
Micro-sequencer
BAc1
c2c3
Sta.mux
c2+c3
c3
j k
MUX0 1
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Section 7: Microprogrammed Control 34
Multi-way Branching
• Mapping ROM
or Address encoding
• JMAP instruction
IR
Mapping ROM
Microsequencer
BA
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Section 7: Microprogrammed Control 35
Microprogram Optimization
M. Balakrishnan
Dept. of Comp. Sci. & Engg.
I.I.T. Delhi
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Section 7: Microprogrammed Control 36
Optimization Types
• Vertical optimization
• Horizontal optimization
Control ROM
m X n
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Section 7: Microprogrammed Control 37
Vertical Optimization
• Rescheduling or reassignment of control signals to control steps/microinstructions
• Merging of microinstructions
• Timing isssues
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Section 7: Microprogrammed Control 38
Horizontal Optimization
• Reducing the width of microinstructions– Compromising on the available concurrency in
the data/control part– Without compromising the concurrency
available
• Encode multiple microoperations/control signals in the same field
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Section 7: Microprogrammed Control 39
Microinstruction Formats
• Horizontal format– Separate bits (/fields) for all control signals
(/microoperations)– No loss of concurrency– Large width of microinstructions and low
utilization
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Section 7: Microprogrammed Control 40
Microinstruction Format (contd.)
• Vertical format– Only one microoperation (or register transfer
operation) per microinstruction– Difinite loss of concurrency– Smallest possible width of microinstructions
and very high utilization
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Section 7: Microprogrammed Control 41
Microinstruction Format (contd.)
• Minimally encoded format– Multiple microoperations (or register transfer
operation) per microinstruction– Concurrency may or may not be compromised– Architecture driven or application driven
encoding
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Section 7: Microprogrammed Control 42
Encoding Example
A B C
D E F
En_A En_B En_C
Ld_D Ld_E Ld_E
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Section 7: Microprogrammed Control 43
Horizontal Format
En_A En_B En_C Ld_D Ld_E Ld_F
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Section 7: Microprogrammed Control 44
Vertical Format
0000 No Operation
0001 Transfer_A_D
……
1001 Transfer_C_F
Transfer _ X _ Y
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Section 7: Microprogrammed Control 45
Minimal Encoding
• Architecture Dependent
Bus_Src
00 A
01 B
10 C
Bus_Src Ld_D Ld_E Ld_F
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Section 7: Microprogrammed Control 46
Minimal Encoding (contd.)
• Application Dependent
Bus_Src Bus_Dest
00 A 00 Noop
01 B 01 D & E
10 C 10 E
11 F
Bus_Src Bus_Dest
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Section 7: Microprogrammed Control 47
Impact of Encoding
• Cost– Reduction in the control ROM size– Additional decoders
• Performance– Increase in the clock period if the decoders are
in the critical path
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Section 7: Microprogrammed Control 48
Complex Microinstruction Encoding & Formats
• Multiple level encoding
• Nanoprogramming
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Section 7: Microprogrammed Control 49
Microinstruction Optimization
M. Balakrishnan
Dept. of Comp. Sci. & Engg.
I.I.T. Delhi
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Section 7: Microprogrammed Control 50
Input-Output Specification
Inputs: A horizontal microinstruction format
Symbolic microprogram
Output:Microinstruction format
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Section 7: Microprogrammed Control 51
GCD Example
s: wait till (start=1);
input x, y; eoc := 0;
while ( x y ) do
if ( x > y ) then x := x - y
else y := y - x
endif;
endwhile;
z := x; eoc := 1; go to s;
end.
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Section 7: Microprogrammed Control 52
Symbolic Microprogram
1 Sta_s, Seq_i, BA
2 R1_s, R1_ld, R2_s, R2_ld, eoc_c, Seq_i
3 Sta_s, Seq_i, BA
4 Sta_s, Seq_i, BA
5 Sub1_s, Sub2_s, R1_s, R1_ld, Seq_I, BA
6 Sub1_s, Sub2_s, R2_s, R2_ld, Seq_I, BA
7 eoc_p, R3_ld, Seq_i, BA
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Section 7: Microprogrammed Control 53
Horizontal Format
A= Sta_s(2) B = Seq_I (2) C = BA(3)
D = R1_s E = R1_ld F = R2_s
G = R2_ld H = eoc_c I = S1_s
J = S2_s K = R3_ld L = eoc_p
Microinstruction word length = 16
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Section 7: Microprogrammed Control 54
Disjoint Graph
A B C
D
E
FGHI
K
L
J
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Section 7: Microprogrammed Control 55
Microinstruction Formats
{A,B,C,D,E,F,G,H,I,J,K,L} 16
{(A,D,L),B,(C,H),(E,K),F,G,I,J} 13
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Section 7: Microprogrammed Control 56
Reflecting Control Signal Properties
• Non-linear cost reduction due to encoding– Reflect in “cost” computation
• Nature of control signals: default value is fixed or don’t care– Mark the nodes and reflect in clustering
• Width of control signals– Multiple copies of the same node with bit
number
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Section 7: Microprogrammed Control 57
Modified Disjoint Graph
A B C
D
E
FGHI
K
L
J
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Section 7: Microprogrammed Control 58
Additional Microinstruction Formats
{A,B,C,D,E,F,G,H,I,J,K,L} 16
{(A,D,L),B,(C,H),(E,K),F,G,I,J} 13
{(A1,E),(A2,G),B1,B2,(C1,H),C2,C3,
(I,L),(J,K)} 9
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Section 7: Microprogrammed Control 59
Column Compatibility
• Based on the optimized format, generate the binary microprogram
• Based on the compatibility between columns, draw the compatibility graph
• Again apply clique partitioning to eliminate redundant columns
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Section 7: Microprogrammed Control 60
Microinstruction Optimization Steps
• Generate the symbolic microprogram
• Design a horizontal microinstruction format
• Optimize to generate the fields in the optimized format
• Generate binary microprogram
• Eliminate redundant columns
• Design the decoders and fanout logic