Download - RF Amplifier
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RF Small Signal AmplifierRF Small Signal Amplifier
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Low Frequency AmplifierLow Frequency Amplifier
• Transistor is an voltage controlled current source• Device capacitances are negligible • High Zin , rO are desirable for high voltage gain• Amplifier gain drops as frequency increases due to internal and
external capacitances →→→→ Low pass type amplifier Transistor model
inZ+
-
m ing vinv LR
SR
Sv LV+
−Or
)||()( OLmSinS
inL rRgv
ZZZV ⋅−⋅⋅+
=
iL
3
Tuned AmplifierTuned Amplifier
• Gain over a narrow frequency range centered about some high frequency
• If feedback by Cgd is negligible
gsC
+
-
m ing vinv LR
SR
Sv LV+
−Or
gdCLC
( ) ( || ) at 1/(2 )L in m L OV v g R r f LCπ= ⋅ − ⋅ =
inyouty
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Tuned AmplifierTuned Amplifier
• When the internal capacitances cannot be ignored, yin and yout depend on the load and the source impedances respectively (Miller Effects)
• Additional capacitive loading at the output by Ceq=Cgd[1+gmRs] • Resonance frequency shifts downward due to Ceq→ difficult to
control the resonance frequency→ need relatively large C• If yL is inductive (below resonance frequency), yin shows negative
resistance →may oscillate• Cgd loads the output tank, decreases gain, detunes the resonance, and
most importantly causes instability– Minimizing feedback due to Cgd→ Cascode topology– Bilateral design using S parameters
(1 ) if j ( )(1 / ) if j
out gd m S eq gd gs m
in gs gd m L in gd L
y j C g R j C C C gy j C j C g y j C C y
ω ω ωω ω ω ω
≈ + = + <<
≈ + + = <<
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S Parameters of FETS Parameters of FET
ECP for RF CMOS with simple substrate model when body is groundedIn general, the substrate model is more complicated
gsC jm ig e vωτ−
iv+
−
dsr
gdC
iR
gRgL
sR
sL
Intrinsics
dR dL
dsCsubC
subR
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Bias Independent Parameters of FETBias Independent Parameters of FET
• Bias independence: assumption for convenience• Lg, Ls, Ld: parasitic inductances mainly due to electrodes. several
tens of pH, usually ignored for a few GHz application, but important for mm application
• Rg: due to gate poly resistance, reduce the power gain, increase device noise
• Rs: due to ohmic resistance, reduce gm, effective gme = gm/(1+gmRs)• Rd:due to ohmic resistance, affects the device power gain
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Bias Dependent Parameters of FETBias Dependent Parameters of FETgs: effective charging path resistance for C , / 3, channel resistance at DC
For simple channel model(short channel device)assume uniform sheet charge, and velocity saturated channel
( ),
i c c
d s s gs
R R R
i eWv n v
≈
= −
m
( )
,
/ / 1/ ( : charging time)
3more accurately, (transit time),g 1/4
: parasitic, cause nonunilaterality
n s gs
n s d sgs m s
gs gs gs gs
dm gs s
n
s
ngd
gd
dds
ds
Q qWLn vQ n i nC qWL g qWvv v v v
ig C v LQ
L Lv
QCv
irv
τ τ
τ
=
∂ ∂ ∂ ∂= = = =∂ ∂ ∂ ∂
∂= = =∂
⇒ = ∝
∂=∂
∂=∂
1
cause ouput power loss
, less dependent on Vgs, but sensitive to Vds, cause output power loss and cross talk sub subR C
−
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ffTT of FETof FET
• Assume unilateral, ignore Cgd• Short circuit current gain, h21=ig/id
21
21
21
T
h drops by 6dB/octave
1 ,2
f is a figure of merit for switching speed
T
m gsd m
g gs gs gs
mT T T
gs
g vi ghi C v C
gh fCω ω
ω ω
ω π ω=
= ≈ =
⇒
= ⇒ = =
gsC mgiv
+
−
gdC
gi di
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ffmaxmax of FETof FET
• Assume unilateral• Gp : Power gain under matched condition
• To improve fmax, high fT , high Rds, low Rg
gsC mgiv+
−
gi di
gR
dsRgZ
LZgv+
−dv
+
−
dsg
T
p
g
dsT
g
ds
gs
m
gsggsgsmd
g
dsgd
g
Lgd
ggddgLp
RRff
G
RR
ff
RR
Cg
CjIvvgIRRII
ZZII
IVIVPPG
/4
ffat 1
41
41
)/,2/(
/)Re()Re(/
)Re(/)Re(/
max
max
22
22
**
=
==
==
==←
==
==
ω
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Accurate Accurate ffTT and and fmaxfmax
• Nonunilateral• Includes all parasitic resistances• For CMOS, junction capacitance should be merged to Cgs, Cgd• Substrate parasitics are not included
2
max
)1(23
154
)1()(14
)(]/)(1][[2
smgs
gd
gs
gd
sm
gsmim
mds
T
dsgdmdsdsgdgs
mT
RgCC
CC
RgRRg
RggR
ff
RRCgRRRCCgf
+
++
+
++
=
+++++=
π
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Low Frequency Approximation of S11, S22Low Frequency Approximation of S11, S22
011
0
022
0
1/
( ||1/ )
in
in
in g in
out
out
out o eq
Z ZSZ Z
Z R j CZ ZSZ Z
Z r j C
ω
ω
−=+
= +
−=+
=
freq (50.00MHz to 10.00GHz)
S(1
,1)
m5
m6
freq (50.00MHz to 10.00GHz)
S(2
,2)
m7m8
Series R-C
Parallel R-CL18 CMOS S-parameter (2.15GHz & 5.25GHz) for Finger=32 (width=160um)
Lg, Ls, Ld, Rd, Rs, Ri, ττττ are ignored
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Low Frequency Approximation of S21,S12Low Frequency Approximation of S21,S120
210
0
012 0
0
2 when are ignored1
(1 )
when Z 1/1
mg
in
in gs gd m
gdgs
gd
g ZS Rj C Z
C C C g Zj C Z
S j Cj C Z
ω
ωω
ω
−=+
= + +
= <<+
-4 -3 -2 -1 0 1 2 3 4-5 5
freq (50.00MHz to 10.00GHz)
S(2
,1)
m1m2
-0.15 -0.10 -0.05 0.00 0.05 0.10 0.15-0.20 0.20
freq (50.00MHz to 10.00GHz)
S(1
,2)
m3
m4
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RF Small Signal AmplifierRF Small Signal Amplifier
• Small signal amplifier– not voltage amplifier but power amplifier– conjugate impedance matching– usually CE(Common Emitter) and CS(Common Source structure)– characteristics of devices are given by S parameters
• Classification– narrow band amplifier (about 10% BW of carrier frequency)
• Lossless L-section matching– medium band amplifier(20-30% BW)
• double resonance matching, multi-section matching technique– broad band amplifier(more than 50% BW)
• feedback, balanced, traveling wave amplifier
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Small Signal High Frequency AmplifierSmall Signal High Frequency Amplifier
• ZSO, ZLO: usually 50Ω
• Recall!
oin
oinin ZZ
ZZ+−=Γ
InputMatchingNetwork
transistor[S]
OutputMatchingNetwork
ZZZZsosososoZZZZLoLoLoLo
VsoVsoVsoVso
(VSWR)in (VSWR)out
aΓbΓ
( )L LZΓ( )out outZΓ( )S SZΓ ( )in inZΓ
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Small Signal High Frequency AmplifierSmall Signal High Frequency Amplifier
• For Re(Zi)>0, always |Γi|≤1• VSWR
• All networks are specified by S parameters and reflection coefficient Γ instead of impedance– practically Γ , S parameters are based on the same normalizing impedance 50 Ω– merely an alias of impedance or admittance– Γin is equivalent to Zin, Γout is equivalent to Zout
• Amplifier Specification– Linear spec :Gain, Bandwidth, VSWR, Noise Figure– Nonlinear spec: P1dB, IIP3 etc.
Sin
Sin
a
a
ΓΓ−Γ−Γ
=Γ−Γ+
=11
1 *
in(VSWR)Lout
Lout
b
b
ΓΓ−Γ−Γ
=Γ−Γ+
=11
1 *
out(VSWR)
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Input, Output Reflection CoefficientsInput, Output Reflection Coefficients
• If S12 ≠0, Γin(Γout )is a function of ΓL (ΓS) • Instability of Γin, Γout• Usually, high speed active devices have magnitudes of S11, S22
close to 1. • If ΓL( ΓS) is also highly reflective and certain phase condition is
satisfied, magnitude of Γin ( Γout) may become larger than 1 →amplifier oscillates
L
L
L
Lin S
SSSSS
Γ−∆Γ−=
Γ−Γ+=Γ
22
11
22
211211 11
S
S
S
Sout S
SSSSS
Γ−∆Γ−=
Γ−Γ+=Γ
11
22
11
211222 11
21122211 SSSS −=∆
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Simplified Amplifier NetworkSimplified Amplifier Network
• Transistor S parameters are given • |ΓS|≤1 for all passive ZS, |ΓL|≤1 for all passive ZL
• Amplifier design is simply to choose source and load impedance ZS, ZL to achieve a desired power gain avoiding oscillation
Transistor[S]
)( LL ZΓ)( outout ZΓ)( inin ZΓ)( SS ZΓ
ZZZZSSSS
VsVsVsVs
ZZZZLLLL
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Amplifier Gain in Terms of S ParametersAmplifier Gain in Terms of S Parameters
• Power– Pavs : power available from source, function of source impedance– Pin : power delivered to transistor– Pavn: power available from transistor output– PL:power delivered to load, function of load impedance
• Transducer power gain GT =PL/Pavs (function of ΓS , ΓL)• Available power gain GA=Pavn/Pavs (function of ΓS)• Operating power gain GP= PL/Pin (function of ΓL)• Measurements
– usual power measurement setup gives GT since signal source indicates Pavs, power meter reads PL
– VNA |S21|2 corresponds to GT for ΓS= ΓL=0
SS
2S
avs Zoffunction ,)8Re(Z
VP =
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Derivation of Transducer Power GainDerivation of Transducer Power Gain
[ ]S
a1
b1ZS
ZL
a2
b2
)( SS ZΓ ( )in inZΓ ( )L LZΓ( )out outZΓ
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Transducer Power Gain GTransducer Power Gain GTT
2 2 221
211 22 12 21
2 22
212 222
2 22
212 211
(1 | | ) | | (1 | | )| (1 )(1 ) |
1 | | 1 | | | ||1 | |1 |
1 | | 1 | | | ||1 | |1 |
S LT
S L S L
S L
in S L
S L
S L out
SGS S S S
SS
SS
− Γ − Γ=− Γ − Γ − Γ Γ
− Γ − Γ=− Γ Γ − Γ
− Γ − Γ=− Γ − Γ Γ
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Available Power Gain GAvailable Power Gain GA, A, Operating Power Gain GOperating Power Gain GTT
*
*
22
212 211
22
212 222
1 | | 1| | ||1 | 1 | |
Function of source impedanceConjugately matched output
Useful for LNA design
1 1 | || | |1 | | |1 |
Function of load impe
L out
S in
SA T
S out
A
LP T
in L
P
G G SS
G
G G SS
G
Γ =Γ
Γ =Γ
− Γ= =− Γ − Γ
− Γ= =− Γ − Γ
danceConjugately matched input
Useful for low input VSWR design
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ProblemsProblems
• An RF amplifier has the following s-parameters: S11=0.3 ∠ -70°, S21=3.5∠ 85 °, S12=0.2 ∠ -10 °, S22=0.4 ∠ -45 °. The system is shown below. Assuming reference impedance (used for measuring s-parameters) Zo=50Ohm, find:
• (1) Find Γs, ΓL, Γin, Γout
• (a) GT, GA, GP.• (b) PL, PA, Pinc
Amplifier
2221
1211
SSSS ZL=73Ω
40Ω
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Stability Stability
• Unconditional Stability– for any |ΓS|, |ΓL|≤1 ⇒ |Γin|, |Γout|≤1
• Simple measure of stability →Roulette Stability Factor K
• if K<1 and |∆|<1, potentially unstable– for some |ΓS|, |ΓL|≤1 ⇒ |Γin|, |Γout|≥1– stability depends on ZS and ZL
– you should find stable ZS and ZL
• if -1 < K<0 , unstable for almost values of ZS and ZL
2 2 211 22
11 22 12 2112 21
1 | | | | | | 1, | | 1, where 2 | |
S SK S S S SS S
− − + ∆= > ∆ < ∆ = −
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Simultaneous Conjugate MatchingSimultaneous Conjugate Matching
• Only if unconditionally stable, simultaneous conjugate matching yields maximum gain– ΓS
* =Γin(ΓL), ΓL* =Γout(ΓS)
– Solution ΓMS, ΓML are little bit complicated. CAD will help you.
• Under simultaneous conjugate matching condition – GTmax = GPmax = GAmax
221Tmax
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| | ( 1)| |SG K KS
= − −
* 111
22
* 222
11
1
1
Ls
L
sL
s
SS
SS
− ∆ΓΓ = Γ =− Γ
− ∆ΓΓ = Γ =− Γ
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Stability CirclesStability Circles
• Potentially Unstable(Conditional Stability)– find stable ZS and ZL using stability circle
• Input (Source) Stability Circle– locus of ΓS on Smith chart producing |Γout|=1– if |S11|<1, ZS in the region including origin(ZS=Z0) is stable source impedance
• Output (Load) Stability Circle– locus of ΓL on Smith chart producing |Γin|=1– if |S22|<1, ZL in the region including origin(ZS=Z0) is stable load impedance
• You can easily draw stability circle using CAD
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Load Stability Load Stability Circle(LSCCircle(LSC))
( )22
22
211222
22
**1122
22
211211 1
1
DSSS
DSDSS
SSSS
L
L
L
−=
−
−−Γ⇒
=Γ−Γ+
LLL RC =−Γ⇒ Load stability circle
Center of circle Radius of circle
Re
Im
RLCL
0
From
(2)
plane LΓ
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Source Stability Source Stability Circle(SSCCircle(SSC))
( )22
11
211222
11
**2211
22
211222 1
1
DSSS
DSDSS
SSSS
s
s
s
−=
−
−−Γ⇒
=Γ−Γ+
sss RC =−Γ⇒ Source stability circle
Center of circle Radius of circle
Re
Im
RsCs
0
From
(3)
planeSΓ
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Stability RegionsStability Regions
• The source and load stability circles only indicate the value of Γs and ΓL where |Γ2 | = 1 and |Γ1 | = 1. We need more information to show the stability regions for Γ s andΓL.
• For example for LSC, when ΓL =0, |Γ1 | = |S11|.• Let the LSC does not encircle S11=0 point. If |S11| < 1 then
ΓL =0 is a stable point, else if |S11| > 1 then ΓL=0 is an unstable point.
LSC
|S11|<1
StableRegion LSC
|S11|>1
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Stability Region Cont...Stability Region Cont...
• Let the LSC encircles S11=0 point. Similarly if |S11| < 1 then ΓL =0 is an stable point, else if |S11| > 1 then ΓL=0 is an unstable point.
• This argument can also be applied for SSC.
LSC
|S11|<1
LSC
|S11|>1
StableRegion
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Summary for Stability RegionSummary for Stability Region
• For both Source and Load reflection coefficients (Γs and ΓL ) :
LSC or SSC
|S11| or |S22| <1
LSC or SSC
|S11| or |S22| >1
LSC or SSC
|S11| or |S22| <1
LSC or SSC
|S11| or |S22| >1
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Unconditionally Stable AmplifierUnconditionally Stable Amplifier
• There are times when the amplifier is stable for all passive source and load impedance.
• In this case the amplifier is said to be unconditionally stable.
• Assuming |S11| > 1 and |S22| < 1, the stability region would look like this:
LSC
|S11|>1
ΓL can occupy any point in the Smith chart
SSC
|S22|<1
Γs can occupy any point in the Smith chart
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Problem 2Problem 2
• Use the s-parameters of the amplifier in Problem 1, draw the load and source stability circles and find the stability region.
SSC LSC
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Summary for Stability CheckSummary for Stability Check
Set frequency range
Get S-parameters withinfrequency range
K factor > 1and |∆| < 1 ?
Amplifier Unconditionally Stable
Yes
Draw SSC and LSC
No
Find |S11| and |S22|
Circles intersectSmith Chart ?
Amplifier is conditionallystable, find stability regions
Yes
No Amplifier isnot stable
Start
End
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Stabilization MethodsStabilization Methods
• |Γin | > 1 and |Γout | > 1 can be written in terms of input and output impedances:
• This implies that Re[Zin] < 0 or Re[Zout] < 0.• Thus one way to stabilize an amplifier is to add a series
resistance or shunt conductance to the port. This should made the real part of the impedance become positive.
1 and 1in o out oin out
in o out o
Z Z Z ZZ Z Z Z
− −Γ = > Γ = >+ +
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Stabilization Methods Cont...Stabilization Methods Cont...
2 - port Network
Z1
SourceNetwork
LoadNetwork
Z1+R1’
2221
1211
SSSS
R1’ R2’
Z2 Z1+R1’
2 - port Network
Y1
SourceNetwork
LoadNetwork
Y1+G1’
2221
1211
SSSS
G1’ G2’
Y2 Y2+G2’
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Example Example -- SS--parameters measurement and stability parameters measurement and stability analysisanalysis
DCDC1
DC
S_ParamSP1
Step=1.0 MHzStop=1.0 GHzStart=50.0 MHz
S-PARAMETERS
CCc2C=470.0 pF
CCc1C=470.0 pFTerm
Term1
Z=50 OhmNum=1
TermTerm2
Z=50 OhmNum=2
LLb2
R=L=330.0 nH
LLb1
R=L=330.0 nH
LLc
R=L=330.0 nH
RRb1R=10.0 kOhm
RRb2R=4.7 kOhm
CCeC=470.0 pF
RReR=100 Ohm
pb_phl_BFR92A_19921214Q1
V_DCSRC1Vdc=5.0 V
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Example Cont...Example Cont...
m1freq=600.0MHzK=0.956
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.90.0 1.0
-0.6
-0.4
-0.2
0.0
0.2
0.4
0.6
0.8
1.0
-0.8
1.2
freq, GHz
K
m1
D
Plotting K and ∆ versus frequency(from 50MHz to 1.0GHz):
This is the frequencywe are interested in
Amplifier isconditionallystable
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Example Example -- Viewing SViewing S1111 and Sand S2222 at f=600MHzat f=600MHz
freq600.0MHz
S(1,1)0.263 / -114.092
S(2,2)0.491 / -20.095
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Example Cont...Example Cont...
indep(SSC) (0.000 to 51.000)
SS
C
indep(LSC) (0.000 to 51.000)
LS
C
Since |S11| < 1 @ 600MHz Since |S22| < 1 @ 600MHz
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ExampleExample
• The S-parameters for a BJT at a particular bias point and f=750MHz are:
• S11 = 0.76<38o
• S21 = 2.35<33o
• S12 = 0.04<-52o
• S22 = 0.66<-42o
• Check the transistor stability, plot the Source and Load Stability Circles and determine the stability regions.
41
Transistor Power GainTransistor Power Gain
• Used as a figure of merit for transistor• Independent of source and load impedance• Classification
– K>1, MAG(Maximum Available Gain)
– K<1, MSG(Maximum Stable Gain)
– Unilateral Power Gain U :MAG obtained using neutralization
||||MSG
12
21
SS=
)1(||||MAG 2
12
21 −−= kkSS
)/Re(2|/|2|1/|
12211221
21221
SSSSkSSU−
−=
K
MAG(6dB/octave)MSG
3dB/oct
f [log]
[dB]
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Narrow Band Amplifier DesignNarrow Band Amplifier Design
• Unilateral Design– assume S12=0– approximate design– use unilateral transducer power gain GTU=GT|S12=0
– detailed design procedure (Refer to Gonzales)– not practical, just shows attainable variable range of GT
• Bilateral Design(if S12 is not negligible)– Simultaneous conjugate matching design
• valid for k>1(unconditionally stable), fixed gain GTMAX
– GP or GA design• if unconditionally stable(k>1) and for gain other than GTMAX
• if potentially unstable(k<1)
43
Operating Power Gain DesignOperating Power Gain Design
• Mismatched output, matched input • (VSWR)in=1, (VSWR)out>1, • Constant GP circle on ΓL plane
– locus of ΓL(ZL) that yields constant GP at a frequency – GP is only a function of ΓL(ZL)
• Unconditionally stable case– GPMAX exists at a single point of ΓL(ZL)– Design procedure for a gain less than GPMAX
① Determine GP
② Draw GP circle and select the desired ΓL
③ Matched source impedance is ΓS= Γin*
221 12| / | ( 1)PMAXG S S K K= − −
44
Design Procedure Using GDesign Procedure Using GP P (potentially unstable)(potentially unstable)
① Determine GP(Gp<MSG)② Draw GP circle ③ Draw load stability circle(Γin stability)④ Select ΓL on the GP circle far from stability circle⑤ Matched source impedance is ΓS= Γin
*
⑥ Draw input stability circle(Γout stability)– Check if ΓS placed in the stable region– If stable, design completed– If unstable. go to step 4 and select new ΓL
⑦ If input match is made, GP becomes GT
45
GGP P circle when K<1 circle when K<1
46
Available Power Gain DesignAvailable Power Gain Design
• Mismatched input, matched output • (VSWR)in>1, (VSWR)out=1• Constant GA circle on Γ S plane • Design procedures are equivalent to that of using GP gain except that
Γs replaces ΓL
• If output match is made, GA becomes GT
47
NoiseNoise
• Random variation of current or voltage
• White and Color noise• Thermal noise(white)
– PSD(Power Spectral Density)=kT, – k Boltzman constant ,T Kelvin Temperature – Pn at 290°K, PSD =-174dBm/Hz– Spectrum analyzer with 1MHz resolution bandwidth shows noise floor
-114dBm/MHz
• Shot noise(white)– PSD= q electron charge, I dc current
0)(lim == ∫+
∞→dttVV
Tt
tn
Tn
constant== ∫+
∞→dttVv
Tt
tn
Tn
22 )]([lim 2, nrmsn vv =
qIin 22 =
48
NoiseNoise
• Flicker noise– PSD=Γ/fα, Γ: proportional constant, α≅ 1 Other noise source
• Lorentz noise– PSD=kτ/(1+(ωτ)2)
49
Thermal noise of ResistanceThermal noise of Resistance
• Available thermal noise power Pn=kTB• Equivalent circuit of noisy R
– can deliver the same available noise power to matched load R– Pn = v2
n,rms/4R=i2n,rmsG/4
Noisy R at T
Noiseless R
Vn,rms
G=1/Rin,rms
Equivalent Noise Voltage Source Model
kTBRvv nrmsn 42, ==
Equivalent Noise Current Source Model
kTBGii nrmsn 42, ==
yield same available noise power Pn=kTB
50
Equivalent Noise Temperature TEquivalent Noise Temperature Tee
• Te equivalent noise temperature• Passive network Te
– ambient temperature
• Active network Te– not physical temperature– can be much larger than the ambient temperature
NoisyNetworks
Pa[available noise power]
R at Te
Pa=kTe
Equivalent Thermal Noise Model
51
Noise FactorNoise Factor
• Noise Factor F
• Reference input noise power Ni=kToB, To= 290°K• Noise Figure NF=10logF• Ex: LNA Te=464 °K(not real Temp), F=2.16, NF=4.15dB
+
-
Rs at Ts
Vs
Noisy 2 Port
GA
s
e
i
addedi
TT1
NInput) to ReferredPower Noise (AddedN Power) Noise(Input N
+=+
•Available output noise power Pno=kTSBGA+Pn,added=kTSBGA+KTeBGA
=kBGATS(1+Te/TS)Te: equivalent noise temperature of 2 port network
referred to input
power noiseoutput oo
i
o
i
i
o
i
i
i
Ao NSNRSNR
SS
NN
SS
NGNFcf ,/)( ===
52
NF of Cascaded NetworkNF of Cascaded Network
• NF of 1st stage is important• Gain of 1st stage should be high enough to suppress the
2nd stage noise• N cascaded network
G1F1
G2F2
NiNo
1
21 G
1FFF
,
−+=
−+−=+=+= 222112221121 )1()1(/1 GFNGGFNGNGGNN
NGGNF iio
i
o
G1, G2 available gain of each stageN1, N2 input referred added noise power of each stage
....G1)/G(F1)/G(FFF 213121 +−+−+=
53
CLASSICAL TWOCLASSICAL TWO--PORT NOISE THEORYPORT NOISE THEORY
Noisy 2 portSYis is Noiseless 2 portSY+-
en
in→→→→
( )
( ) ( )
22
2
2 22 2 2
2 2
2 2 2
2 22
, ,
1
, ,4 4 4
1 1
s n s nn c u c c n
s
s u c s n u c s n
s s
n u sn u s
u c s c s nu c s n
s s
i i Y eF i i i i Y e
i
i i Y Y e i Y Y eF
i i
e i iR G GkT f kT f kT f
G G G B B RG Y Y RF
G G
+ += = + =
+ + + + += = +
≡ ≡ ≡∆ ∆ ∆
+ + + ++ + = + = +
54
CLASSICAL TWOCLASSICAL TWO--PORT NOISE THEORYPORT NOISE THEORY
( ) ( )
2
2min
2 2
min
,
1 2 1 2
us c opt s c opt
n
un opt c n c c
n
ns opt s opt
s
GB B B G G GR
GF R G G R G GR
RF F G G B BG
= − = = + =
= + + = + + +
= + − + −
55
Noise Figure of 2 Port NetworkNoise Figure of 2 Port Network
• Noise factor of 2 port network is dependent on the source admittance• Noise 4 parameters are dependent on frequency and bias conditions• Manufacturer provides noise 4 parameters
])()[( 22min optsopts
s
n BBGGGRFF −+−+=
Fmin minimum noise factorYs=Gs+jBs source admittanceYopt=Gopt+jBopt source admittance at FminRn equivalent input noise resistance of 2 port networkNoise 4 parameters : Fmin, Yopt, Rn
in,rms
YsNoisy 2 Port
Network
56
Noise CircleNoise Circle
• Rn, Γopt, Fmin are device parameters and constants if bias and frequency are fixed
• Locus of Γs on the Smith chart for a given noise figure Fi is a circle→Constant Noise Figure Circle
• CAD will automatically draw these family of circles
onn
opts
optsn
ZRr
rFF
/
|1|)||1(
||422
2
min
=
Γ+Γ−
Γ−Γ+=
2min |1|4 opt
n
ii r
FFN Γ+−
= where,i
iioptFi
i
optFi N
N)N|-|Γ(R
NC
+
+=
+Γ
=1
1
1
22
Radius Center
57
LNA DesignLNA Design
• Impossible to achieve maximum gain and minimum noise figure simultaneously
• Compromise between Gain, NF, and VSWR• Potentially unstable bilateral design① Determine GA(<MSG)② Draw source stability circle, GA circle, NF circle on Γs plane③ Select Γs.. close to Γopt and far from source stability circle④ ΓL= Γ*
out, automatically VSWRout=1⑤ Output stability check (|Γin| <1)⑥ Input is always mismatched. Therefore always (VSWR)in>1
58
Output stability circle
Input stability circle
20dB GA circle
2dB noise circle
•S parameters S11=0.641/-171 °S21=5.89/9.6 °S12=0.057/163 °S22=0.572/-95.7 °
•Stabilityk=0.617MSG=20.1dBpotentially unstable
•Noise ParametersNFmin=1.5dBΓopt=0.58/151 °Rn=7.5Ω