February 12-13, 2006 FCAL Collaboration Meeting
INP PAN, Kraków, Poland
Readout electronics for LumiCal – first approach
Wojciech Wierba
Witold Daniluk
Krzysztof Oliwa
February 12-13, 2006FCAL Collaboration MeetingINP PAN, Kraków, Poland
Topics
Mechanical design Space for electronics Pads & strips designs Readout based on analog
transmission Digital data transmission Readouts based on digital
transmission
February 12-13, 2006FCAL Collaboration MeetingINP PAN, Kraków, Poland
Mechanical design of LumiCal
Segmented silicon sensors interspersed into the tungsten half disks
Two half barrels to allow for mounting on closed beam pipe
The blue bolts support the heavy part of the detector, tungsten half disks
The red bolts carry only the sensors Holes for precision survey the
sensors position
February 12-13, 2006FCAL Collaboration MeetingINP PAN, Kraków, Poland
Space for electronics•There is a limited space for the FE electronics for the 300 mm radius of LumiCal
•Bolts for tungsten & sensors support takes additional space
•Si sensors online positioning needs place also
February 12-13, 2006FCAL Collaboration MeetingINP PAN, Kraków, Poland
Pads & Strips Design
Both designs becomes very similar
Different number of electronic channels: Strips ~8000, Pads ~25000
Strips Pads
February 12-13, 2006FCAL Collaboration MeetingINP PAN, Kraków, Poland
Possible readout designs
Analog transmission – simple, low heat dissipation, easy to maintenance – a huge number of cables, crosstalk, noise
Digital transmission – small number of digital links, no crosstalk on the transmission – complicated, high heat dissipation
February 12-13, 2006FCAL Collaboration MeetingINP PAN, Kraków, Poland
Analog transmission
25000 analog cables (coaxial or TP) needs ~30 mm round the LumiCal
February 12-13, 2006FCAL Collaboration MeetingINP PAN, Kraków, Poland
Digital Transmission LVDS link
Current speed – 0.6 Gb/s Up to 10 m
February 12-13, 2006FCAL Collaboration MeetingINP PAN, Kraków, Poland
Number of LVDS links for LumiCal
5000 bunches i one train – 1 ms
Break between trains – 300 ms
Number of channels – 25000
10 bit ADC
Amount of data per train – 1.25 Gb
Transmission during train – 1.25 Tb/s - ~2000 links
Transmission during break – 3.75 Gb/s - ~6 links
>>
February 12-13, 2006FCAL Collaboration MeetingINP PAN, Kraków, Poland
Parallel conversion
•ADC in each channel – expensive and space on chip consuming
February 12-13, 2006FCAL Collaboration MeetingINP PAN, Kraków, Poland
Multiplexed ADC
• One ADC for a group of channels – cheaper, needs S/H and MUX
February 12-13, 2006FCAL Collaboration MeetingINP PAN, Kraków, Poland
Analog pipelined
Analog pipeline with ~5000 cells and 10 (12) bits accuracy over 300 ms is not a easy project, but the number of ADC can be reduced by a factor of 300
February 12-13, 2006FCAL Collaboration MeetingINP PAN, Kraków, Poland
Conclusions
Number of channels is essential to chose the readout solution
Digital data transmitted over the break between trains
Analog pipeline or MUX can reduce a number of ADC’s
This talk seems to be a background for the discussion