Microprocessor and its Applications
Prepared by P. SELVAN M.E, AP/ECE, Chettinad Tech, Karur Page 1
NH – 67, Karur – Trichy Highways, Puliyur C.F, 639 114 Karur District
M.C.A. (MASTER OF COMPUTER APPLICATIONS)
SEMESTER III
MC9232 - MICROPROCESSORS AND ITS APPLICATIONS
COURSE MATERIAL
Microprocessor and its Applications
Prepared by P. SELVAN M.E, AP/ECE, Chettinad Tech, Karur Page 2
ANNA UNIVERSITY CHENNAI SYALLABUS
M.C.A - MASTER OF COMPURTER APPLICATIONS
SEMESTER III
MC9232 MICROPROCESSORS AND ITS APPLICATIONS
L T P C
3 0 0 3
UNIT I THE 8086 PROCESSOR - SOFTWARE ASPECTS 11
Evolution of Microprocessors - 8086 architecture – Addressing modes-
Instruction set and assembler directives – Assembly language programming –
Interrupts and interrupt service routines.
UNIT II 8086 SYSTEM DESIGN 10
8086 signals description – Basic configurations - System bus timing –System
design using 8086 – Minimum mode /Maximum modes 8086 system and
timings.
UNIT III INTERFACING CONCEPTS 10
Memory Interfacing and I/O interfacing - Parallel communication interface –
Serial communication interface – Timer – Keyboard /display controller –
Interrupt controller – DMA controller – Programming and applications.
UNIT IV ADVANCED PROCESSORS 7
Intel 80286 – Internal Architectural – Register Organization – Internal Block
Diagram – Modes of operation – Real Address Mode – Protected Virtual
Address mode – Privilege – Protection - Architectural features and Register
Organization of i386, i486 and Pentium processors.
UNIT V BUILDING SYSTEMS 7
Bus Concepts – Bus Standards –The Peripheral Component Interconnect (PCI)
Bus – Universal Serial Bus (USB) – Platform Architectures.
Total=45
Microprocessor and its Applications
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REFERENCES:
1. A. K. Ray & K. M. Bhurchandi, “Advanced Microprocessors and
peripherals- Architectures, Programming and Interfacing”, TMH, 2002
reprint.
2. Barry B. Brey, “The Intel Microprocessors, 8086/8088, 80186/80188,
80286, 80386, 80486, Pentium, PentiumPro Processor, PentiumII,
PentiumIII, PentiumIV, Architecture, Programming & Interfacing”, 6th
Edition, Pearson Education/PHI, 2002.
3. Yu-cheng Liu, Glenn A. Gibson, “Microcomputer systems: The
8086/8088 Family architecture, Programming and Design”, PHI 2003.
4. Peter Abel, “IBM PC Assembly language and programming”, Prentice
Hall of India Pvt. Ltd.
5. Websites of latest processors.
Microprocessor and its Applications
Prepared by P. SELVAN M.E, AP/ECE, Chettinad Tech, Karur Page 4
BASICS OF MICROPROCESSORS
Microprocessor:
The Central Processing Unit (CPU) of a microcomputer. CPU on a single chip.
Microprocessor Development System:
A tool for designing and debugging both hardware and software for
microcomputer-based system.
Microprocessor-Halt DMA: Data transfer is performed between the
microcomputer‟s memory and a peripheral device either by completely stopping
the microprocessor or by a technique called cycle stealing.
Microprogramming: The microprocessor can use microprogramming to
design the instruction set. Each instruction in the Instruction register initiates
execution of a micro program stored typically in ROM inside the control unit to
perform the required operation.
Monitor: Consists of a number of subroutines grouped together to provide
“intelligence” to a microcomputer system. This intelligence gives the
microcomputer system the capabilities for debugging a user program, system
design, and displays.
Multiplexer:
A hardware device which selects one of n input lines and produces it on the
output.
Multiprocessing: The process of executing two or more programs in parallel,
handled by multiple processors all under common control. Typically each
processor will be assigned specific processing tasks.
Multitasking: Operating system software that permits more than one program
to run on a single microprocessor. Even though each program is given a small
time slice in which to execute, the user has the impression that all tasks
(different programs) are executing at the same time.
Multiuser: Describes a computer operating system that permits a number of
users to access the system on a time-sharing basis
Microprocessor and its Applications
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Nanomemory : Two-level ROM used in designing the control unit.
Nested Subroutine: A commonly used programming technique in which one
subroutine calls another subroutine
Nibble: A 4-bit word.
Non-inverting Buffer: Microprocessor Theory and Applications with
68000/68020 and Pentium Input is same as output. Current amplifier.
Nonmaskable Interrupt: Occurrence of this type of interrupt cannot be
ignored by microcomputer and even though interrupt capability of the
microprocessor is disabled. Its effect cannot be disabled by instruction.
Non-Multiplexed: A non-multiplexed microprocessor pin that assigns a unique
function as opposed to a multiplexed microprocessor pin defining two functions
on timeshared basis.
Object Code: The binary (machine) code into which a source program is
translated by a compiler, assembler, or interpreter.
Ones Complement:
Obtained by changing 1 ‟s to 0‟s, and 0‟s to 1 ‟s of a binary number.
One-Pass Assembler:
This assembler goes through the assembly language program once and
translates the assembly language program into a machine language program.
This assembler has the problem of defining forward references. See Two-Pass
Assembler.
Op Code (Operation Code): Part of an instruction defining the operation to be
performed.
Operand: A datum or information item involved in an operation from which
the result is obtained as a consequence of defined addressing modes. Various
operand types contain information, such as source address, destination address,
or immediate data.
Operating System:Typical resources include microprocessors, disks, and
printers. Consists of a number of program modules to provide resource
management.
Microprocessor and its Applications
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Page:
Some microprocessors, divide the memory locations into equal blocks. Each of
these blocks is called a page and contains several addresses.
Parallel Operation:
Any operation carried out simultaneously with a related operation.
Parallel Transmission:
Each bit of binary data is transmitted over a separate wire.
Parity: The number of 1‟s in a word is odd for odd parity and even for even
parity
Peripheral: An I/O device capable of being operated under the control of a
CPU Examples include disk drives, keyboards, CRT‟s, printers, and modems.
through communication channels
Personal Computer: Low-cost, affordable microcomputer normally used by an
individual for word processing and Internet applications.
Physical Address Space: Address space is defined by the address pins of the
microprocessor.
Absolute Addressing: This addressing mode specifies the address of data with
the instruction.
Accumulator: Available with 8-bit microprocessors. Register used for storing
the result after most ALU operations.
Address: A unique identification number (or locator) for source or destination
of data. An address specifies the register or memory location of an operand
involved in the instruction.
Addressing Mode: Address of source and destination operands in an
instruction. The manner in which a microprocessor determines the effective.
Address Register: A register used to store the address (memory location) of
data.
Microprocessor and its Applications
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Address Space: The number of storage location in a microcomputer‟s memory
that can be directly addressed by the microprocessor. The addressing range is
determined by the number of address pins provided with the microprocessor
chip.
American Standard Code for Information Interchange (ASCII):
It is commonly used with microprocessors for representing alphanumeric codes.
Analog-to-Digital Converter (ADC):
An 8-bit code Transforms an analog voltage into its digital equivalent.
AND gate: The output is 1, if all inputs are 1; otherwise the output is 0.
ASIC:
Normally reduces the total manufacturing cost of a product by reducing chip
count. Application Specific IC. Chips designed for a specific, limited
application.
Assembler:
A program that translates an assembly language program into a machine
language program.
Assembly Language:
A type of microprocessor programming language that uses a semi-English-
language statement Microprocessor Theory and Applications with 68000/68020
and Pentium
Asynchronous Operation: The execution of a sequence of steps such that each
step is initiated upon completion of the previous step.
Asynchronous Serial Data Transmission: The transmitting device does not
need to be synchronized with the receiving device.
Autodecrement Addressing Mode: The contents of the specified
microprocessor register are first decremented by n (1 for byte, 2 for 16-bit, and
4 for 32-bit) and then the resulting value is used as the address of the operand.
Microprocessor and its Applications
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Autoincrement Addressing Mode:
The contents of a specified microprocessor register are used as the address of
the operand first and then the register contents are automatically incremented by
n (1 for byte, 2 for 16-bit, and 4 for 32-bit).
Barrel Shifter:
A specially configured shift register that is normally included in 32-bit
microprocessors for cycle rotation. That is , the barrel shifter shifts data in one
direction.
Base address:
An address that is used to convert all relative addresses in a program to absolute
(machine) addresses
Baud Rate: Rate of data transmission in bits per second.
Binary-Coded Decimal (BCD):
The representation of 10 decimal digits, 0 through 9, by their corresponding 4-
bit binary number.
Bit:
A unit of information equal to one of two possible states (one or zero, on or off,
true or false). An abbreviation for a binary digit
Block Transfer DMA:
A peripheral device requests the DMA transfer via the DMArequest line, which
is connected directly or through a DMA controller chip to the microprocessor.
The DMA controller chip completes the DMA transfer and transfers the control
of the bus to the microprocessor.
Branch:
The branch instruction allows the computer to skip or jump out of program
sequence to a designated instruction either unconditionally or conditionally
(based on conditions such as carry or sign).
Microprocessor and its Applications
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Breakpoint:
Allows the user to execute the section of a program until one of the Break point
conditions is met. It is then halted. The designer may then single step or
examine memory and registers. Typically breakpoint conditions are program
counter address or data references. Breakpoints are used in debugging assembly
language programs.
Buffer:
A temporary memory storage device deigned to compensate for the different
data rates between a transmitting device and a receiving device (for example,
between a CPU and a peripheral). Current amplifiers are also referred to as
buffers.
Bus:
A collection of wires that interconnects computer modules.The typical
microcomputer interface includes separate buses for address, data, control, and
power functions.
Bus Arbitration:
Bus operation protocols (rules) that guarantee conflict-free access to a bus.
Arbitration is the process of selecting one respondent from a collection of
several candidates that concurrently request service.
Bus Cycle:
The period of time in which a microprocessor carries out read or write
operations.
Cache Memory:
A high speed, directly accessible, relatively small, semiconductor read write
memory block used to store data instructions that the microcomputer may need
in the immediate future. Increases speed by reducing the number of external
memory reads required by the processor. Typical 32 and 64-bit microprocessors
are normally provided with on-chip cache memory.
Compact Disc (CD) Memory: Optical memory. Uses laser and stores audio
information.
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Central Processing Unit (CPU): Have registersection, and control unit. CPU
in a single chip is called microprocessor.The brains of a computer containing
the ALU.
Chip: An Integrated Circuit (IC) package containing digital circuits.
CISC: Complex Instruction Set Computer. The Control unit is designed using
Microprogramming. Contains a large instruction set. Difficult to pipeline
compared to RISC.
Clock:
Timing signals providing synchronization among the various components in a
microcomputer system. Analogous to heart beats of a human being.
CMOS: Complementary MOS. Dissipates low power, offers high density and
speed compared to TTL.
Combinational Circuit: Output is provided upon application of inputs;
contains no memory.
Compiler:
A program which translates the source code written in a high-level
Programming language into machine language that is understandable to the
processor
Condition Code Register:
It Contains information like carry, sign, zero, and overflow based on ALU
operations.
Control Unit:
Microprocessor Theory and Applications with 68000/68020 and Pentium Part
of the CPU; its purpose is to translate or decode instructions read (fetched) from
the main memory into the Instruction Register
Coprocessor:
A companion microprocessor that performs specific functions such as floating -
point operations independently from the microprocessor to speed up overall
operations.
Microprocessor and its Applications
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Cycle Stealing DMA:The DMA controller transfers a byte of data between the
microcomputer's memory and a peripheral device such as the disk by stealing a
clock cycle of microprocessor.
Data:
Basic elements of information represented in binary form (that is, digits
consisting of bits) that can be processed or produced by a microcomputer. Data
represents any group of operands made up of numbers, letters, or symbols
denoting any condition, value, or state. Typical microcomputer operand sizes
include: a word, which typically contains 2 bytes or 16-bits; a long word, which
contains 4 bytes or 32 bits; a quad word, which contains 8 bytes or 64 bits.
Data Register:
A register used to temporarily hold operational data being sent to and from a
peripheral device.
Debugger:
A program that executes and debugs the object program generated by the
assembler or compiler. The debugger provides a single stepping, breakpoints,
and program tracing.
Decoder:
A chip, when enabled, selects one of 2" output lines based on n inputs.
Digital to Analog (D/A) Converter:
Converts binary number to analog signal.
Diode: Two terminal electronic switch.
Direct Memory Access (DMA):
A type of inputJoutput technique in which data can be transferred between the
microcomputer memory and external devices without the microprocessor's
involvement.
Directly Addressable Memory: The memory address space in which the
microprocessor can directly execute programs. The maximum directly
Microprocessor and its Applications
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addressable memory is determined by the number of the microprocessor's
address pins.
DRAM(Dynamic RAM):
Stores data as charges in capacitors and therefore, must be refreshed
milliseconds. Hence, requires refresh since capacitors can hold charges for a
few circuitry.
EAROM (Electrically Alterable Read-only Memory):
Same as EEPROM or EPROM. Can be programmed one line at a time without
removing the memory from its sockets. This memory is also called read-mostly
memory since it has much slower write times than read times.
Editor: A program that produces an error-free source program, written in
assembly or high-level languages.
Emulator: A hardware device that allows a microcomputer system to emulate
(that is, mimic ) another microcomputer system.
Encoder: Performs reverse operation of a decoder. Contains a maximum of 2"
inputs and n outputs.
EPROM (Erasable Programmable Read-only Memory):
Can be programmed and erased all programs in an EPROM chip using
ultraviolet light. The chip must be removed from the microcomputer system for
programming.
Exception Processing:
Includes the microprocessor's processing states associated with interrupts, trap
instructions, tracing, and other exceptional conditions, whether they are initiated
internally or externally.
Exclusive-OR: The output is 0, if inputs are same; otherwise; the output is 1.
Exclusive-NOR: The output is 1, if inputs are same; otherwise, the output is 0.
Extended Binary-Coded Decimal Interchange Code (EBCDIC):
An 8-bit code commonly used with microprocessors for representing
alphanumeric codes. Normally used by IBM.
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Firmware:
Microprogram is sometimes referred to as firmware to distinguish it from
hardwired control (purely hardware method).
Flag(s): An indicator, often a single bit, to indicate some conditions such as
trace, carry, zero, and overflow.
Flash Memory:
Utilizes a combination of EPROM and EEPROM technologies.
Flip-Flop: One-bit memory. Used in cellular phones and digital cameras.
FPGA:
Field Programmable Gate Arrays. This chip contains several smaller individual
logic blocks along with all interconnections
Gate:Digital circuits which perform logic operations.
Handshaking: Data transfer via exchange of control signals between the
microprocessor and an external device.
Hardware:The physical electronic circuits (chips) that make up the
microcomputer system.
Hardwired Control: Used for designing the control unit using all hardware.
HCMOS: High speed CMOS. Provides high density and consumes low power.
Hexadecimal Number System: Base-16 number system.
High-Level Language: A type of programming language that uses a more
understandable human-oriented language such as C.
HMOS: High-density MOS reduces the channel length of the NMOS transistor
and provides increased density and speed in VLSI circuits.
Immediate Address: An address that is used as an operand by the instruction
itself.
Implied Address: An address is not specified, but is contained implicitly in the
instruction.
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In-Circuit Emulation:
The most powerful hardware debugging technique; Especially valuable when
hardware and software are being debugged simultaneously.
Index:
A number (typically 8-bit signed or 16-bit unsigned) is used to identify a
particular element in an array (string). The index value typically contained in a
register is utilized by the indexed addressing mode.
Indexed Addressing:
The effective address of the instruction is determined by the Sum of the address
and the contents of the index register. Used to access arrays.
Index Register:
A register used to hold a value used in indexing data, such as when a value is
used in indexed addressing to increment a base address contained within an
instruction.
Indirect Address: A register holding a memory address to be accessed.
Instruction: Causes the microprocessor to carry out an operation on data. A
program contains instructions and data.
Instruction Cycle: The sequence of operations that a microprocessor has to
carry out while executing an instruction.
Instruction Register (IR):
A register storing instructions; typically 32 bits long for a 32-bit
microprocessor.
Instruction Set: Lists all the instructions that the microcomputer can execute.
Interleaved DMA: Using this technique, the DMA controller takes over the
system bus when the microprocessor is not using it.
Internal Interrupt: Activated internally by exceptional conditions such as
overflow and division by zero.
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Interpreter: A program that executes a set of machine language instructions in
response to each high-level statement in order to carry out the function.
Interrupt I/O:
An external device can force the microcomputer system to stop executing the
current program temporarily so that it can execute another program known as
the interrupt service routine.
Interrupts:
A temporary break in a sequence of a program, initiated externally or Internally,
causing control to jump to a routine, which performs some action while the
program is stopped.
I/O ( Input/Output): Describes that portion of a microcomputer system that
exchanges data between the microcomputer system and an external device.
I/O Port: A register that contains control logic and data storage used to connect
a microcomputer to external peripherals.
Inverting Buffer: Current amplifier. Performs NOT operation.
Keyboard: Has a number of push button-type switches configured in a matrix
form( rows x columns).
Keybounce: When a mechanical switch opens or closes, it bounces (vibrates)
for a small period of time (about 10-20 ms) before settling down.
Large-Scale Integration (LSI): An LSI chip contains 100 to 1000 gates.
LED: Light Emitting Diode. Typically, a current of 10 ma to 20 ma flows at 1.7
to 2.4 drop across it.
Logic Analyzer:
A hardware development aid for microprocessor-based design; gathers data on
the fly and displays it.
Logical Address Space: All storage locations with a programmer‟s addressing
range.
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Loops:
A programming control structure where a sequence of microcomputer
instructions are executed repeatedly (looped) until a terminating condition
(result) is satisfied.
Machine Code:
Microprocessor Theory and Applications with 68000/68020 and Pentium A
binary code (composed of 1 ‟s and 0‟s) that a microcomputer understands.
Machine Language: A type of microprocessor programming language that
uses binary or hexadecimal numbers.
Macroinstruction: Commonly known as an instruction; initiates execution of a
complete micro program. Example includes assembly language instructions.
Macroprogram: The assembly language program.
Mask: A pattern of bits used to specify (or mask) which bit parts of another bit
pattern are to be operated on and which bits are to be ignored or “masked” out.
Uses logical AND operation.
Mask ROM:
Programmed by a masking operation performed on the chip during the
manufacturing process; its contents cannot be changed by user.
Maskable Interrupt:
Can be enabled or disabled by executing typically the interrupt instructions.
Memory: Any storage device which can accept, retain, and read back data.
Memory Access Time: Average time taken to read a unit of information from
the memory.
Memory Address Register (MAR): Stores the address of the data.
Memory Cycle Time: Average time lapse between two successive read
operations.
Memory Management Unit (MMU):
Hardware that performs address translation and protection functions.
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Memory Map:
A representation of the physical locations within a microcomputer‟s addressable
main memory.
Memory-Mapped I/O:
I/O ports are mapped as memory locations, with every connected device treated
as if it were a memory location with a specific address. Manipulation of I/O
data occurs in “interface registers” (as opposed to memory locations);hence
there are no input (read) or output (write) instructions used in memory-mapped
I/O.
Microcode:
A set of instructions called “microinstructions” usually stored in a ROM in the
control unit of a microprocessor to translate instructions of a higher-level
programming language such as assembly language programming.
Microcomputer: Consists of a microprocessor, a memory unit, and an
input/output unit.
Microcontroller:
Typically includes a microcomputer, timer, A/D (Analog to Digital) and D/A
(Digital to Analog) converters in the same chip.
Microinstruction:
Most microprocessors have an internal memory called control memory. This
memory is used to store a number of codes called microinstructions. These
microinstructions are combined to design the instruction set of the
microprocessor.
Pipeline:
A technique that allows a microcomputer processing operation to be broken
down into several steps (dictated by the number of pipeline levels or stages) so
that the individual step outputs can be handled by the microcomputer in parallel.
Often used to fetch the processor‟s next instruction while executing the current
instruction, which considerably speeds up the overall operation of the
microcomputer. Overlaps instruction fetch with execution.
Microprocessor and its Applications
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Pointer:
A storage location (usually a register within a microprocessor) that contains the
address of (or points to) a required item of da+ta or subroutine.
Polled Interrupt:
A software approach for determining the source of interrupt in a multiple
interrupt system.
POP Operation: Reading from the top or bottom of stack.
Port: A register through which the microcomputers communicate with
peripheral. devices.
Primary or Main Memory: Storage that is considered as part of the
microcomputer. The microcomputer can directly execute all instructions in the
main memory. The maximum size of the main memory is defined by the
number of address pins in the microprocessor.
Privileged Instructions: An instruction which can only be executed by the
microprocessor in the supervisor (operating system) mode.
Processor Memory: A set of microprocessor registers for holding temporary
results when a computation is in progress.
Program:
A self-contained sequence of computer software instructions (sourcecode) that,
when converted into machine code, directs the computer to perform specific
operations for the purpose of accomplishing some processing task. Contains
instructions and data.
Program Counter (PC):
A register that normally contains the address of the next instruction to be
executed in a program.
Programmed I/O:
The microprocessor executes a program to perform all data transfers between
the microcomputer system and external devices.
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PROM (Programmable Read-only Memory):
Can be programmed by the user by using proper equipment. Once programmed,
its contents cannot be altered.
Protocol:
A list of data transmission rules or procedures that encompass the timing,
control, formatting, and data representations by which two devices are to
communicate. Also known as hardware “handshaking”, which is used to permit
asynchronous communication.
PUSH Operation:
Microprocessor Theory and Applications with 68000/68020 and Pentium
Writing to the top or bottom of stack.
Random Access Memory (RAM):
Are volatile in nature (in other words, information is lost when power is
removed).A read/write memory. RAMS (static or dynamic)
Read-Only-Memory (ROM):
A memory in which any addressable operand can be read from, but not written
to, after initial programming. ROM storage is non volatile (information is not
lost after removal of power).
Reduced Instruction Set Computer (RISC):
A simple instruction set is included. The RISC architecture maximizes speed by
reducing clock cycles per instruction. The control unit is designed using
hardwired control. Easier to implement pipelining.
Register:
A high-speed memory usually constructed from flip-flops that are directly
accessible to the microprocessor. It can contain either data or a specific location
in memory that stores word(s) used during arithmetic, logic, and transfer
operations.
Register Indirect: Uses a register which contains the address of data.
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Relative Address: An address used to designate the position of a memory
location
RISC: See Reduced Instruction Set Computer. in a routine or program.
Routine:
A group of instructions for carrying out a specific processing operation. Usually
refers to part of a larger program. A routine and subroutine have essentially the
same meaning, but a subroutine could be interpreted as a self-contained routine
nested within a routine or program.
Scalar Microprocessor:
The 80486 is a scalar microprocessor. Provided with one pipeline. Allows
execution rate of one clock cycle per instruction for most instructions.
Scaling: Multiplying an index register by 1,2,4 or 8. Used by the addressing
modes of typical 32- and 64-bit microprocessors.
Schmitt Trigger: An analog circuit that provides high noise immunity.
SDRAM:
Control signals and address inputs are sampled by the SDRAM by a common
clock. Synchronous DRAM. This chip contains several DRAMS internally. The
Secondary Memory Storage:
An auxiliary data storage device that supplements the main (primary) memory
of a microcomputer. It is used to hold programs and data that would otherwise
exceed the capacity of the main memory. Although it has a much slower access
time, secondary storage is less expensive. Examples include floppy and hard
disks.
Sequential Circuit: Combinational circuit with memory
PUSH Operation: Microprocessor Theory and Applications with 68000/68020
and Pentium Writing to the top or bottom of stack.
Random Access Memory (RAM):
A readwrite memory. RAMS (static or dynamic) are volatile in nature (in other
words, information is lost when power is removed).
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Read-Only-Memory (ROM):
A memory in which any addressable operand can beread from, but not written
to, after initial programming. ROM storage is non volatile information is not
lost after removal of power).
Reduced Instruction Set Computer (RISC):
A simple instruction set is included. The RISC architecture maximizes speed by
reducing clock cycles per instruction. The control unit is designed using
hardwired control. Easier to implement pipelining.
Register:
A high-speed memory usually constructed from flip-flops that are directly
accessible to the microprocessor. It can contain either data or a specific location
in memory that stores word(s) used during arithmetic, logic, and transfer
operations.
Register Indirect: Uses a register which contains the address of data.
Relative Address:
An address used to designate the position of a memory location in a routine or
program.
RISC: See Reduced Instruction Set Computer.
Routine: A group of instructions for carrying out a specific processing
operation. Usually refers to part of a larger program. A routine and subroutine
have essentially the same meaning, but a subroutine could be interpreted as a
self-contained routine nested within a routine or program.
Scalar Microprocessor:
The 80486 is a scalar microprocessor. Provided with one pipeline. Allows
execution rate of one clock cycle per instruction for most instructions
Scaling:
Multiplying an index register by 1,2,4 or 8. Used by the addressing modes of
typical 32- and 64-bit microprocessors
Schmitt Trigger: An analog circuit that provides high noise immunity.
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SDRAM:
Control signals and address inputs are sampled by the SDRAM by a common
clock. Synchronous DRAM. This chip contains several DRAMS internally. The
Secondary Memory Storage:
An auxiliary data storage device that supplementsthe main (primary) memory of
a microcomputer. It is used to hold programs and data that would otherwise
exceed the capacity of the main memory. Although it has a much slower access
time, secondary storage is less expensive. Examples include floppy and hard
disks.
Sequential Circuit: Combinational circuit with memory
Superscalar Microprocessor:
The Pentium is a superscalar microprocessor. Microprocessor Theory and
Applications with 68000/68020 and Pentium Provided with more than one
pipeline and executes More than one instruction per clock cycle.
Super visor State:
When the microprocessor processing operations are conducted at a higher
privilege level, it is usually in the supervisor state. An operating system
typically executes in the supervisor state to protect the integrity of “basic”
system operations from user influences.
Synchronous Operation:
Operations that occur at intervals directly related to a clock period.
Synchronous Sequential Circuit:
The present outputs depend on the present inputs and the previous states stored
in flip-flops
Synchronous Serial Data Transmission:
Data is transmitted or received based on a clock signal.
Tracing:(Allows single stepping.) A dynamic diagnostic technique permits
analysis debugging) of the program‟s execution.
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Transistor: Electronic switch; performs NOT; current amplifier.
Tristate Buffer:
This chip is typically enabled by a control signal to provide logic 0 or 1 outputs.
This type of buffer can also be disabled by the control signal to place it in a
high-impedance state. Has three output states: logic 0, 1, and a high-impedance
state
Two’s Complement:
The two‟s complement of a binary number is obtained by replacing each 0 with
a 1 and each 1 with a 0 and adding one to the resulting number
Vectored Interrupts: A device identification technique in which the highest
Priority device with a pending interrupt request forces program execution to
branch to an interrupt routine to handle exception processing for the device.
Very Large Scale Integration (VLSI): a VLSI chip contains more than 1000
gates. More commonly, a VLSI chip is identified by the number of transistors
rather than the gate count.
Virtual Memory: An operating system technique that allows programs or data
to exceed the physical size of the main, internal, directly accessible memory of
the microcomputer. Program or data segment pages are swapped from external
disk storage as needed. The swapping is invisible (transparent) to the
programmer. Therefore, the programmer does need not to be concerned with the
actual physical size of internal memory while writing the code.
Word: The bit size of a microprocessor refers to the number of bits that can be
Processed simultaneously by the basic arithmetic and logic circuits of the
microprocessor. A number of bits taken as a group in this manner is called a
word.
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UNIT I
THE 8086 PROCESSOR SOFTWARE ASPECTS
PART A (TWO MARKS)
1. What is Microprocessor? Give the power supply & clock frequency of
8085
A microprocessor is a multipurpose, programmable logic device that
reads binary instructions from a storage device called memory accepts binary
data as input and processes data according to those instructions and provides
result as output. The power supply of 8085 is +5V and clock frequency in
3MHz
2. List few applications of microprocessor-based system.
It is used:
For measurements, display and control of current, voltage,
For temperature, pressure, etc.
For traffic control and industrial tool control.
For speed control of machines.
3. What are the modes in which 8086 can operate?
The 8086 can operate in two modes and they are minimum (uniprocessor)
mode and maximum (multiprocessor) mode.
4. What is the data and address size in 8086?
The 8086 can operate on either 8-bit or 16-bit data. The 8086 uses 20 bit
address to access memory and 16-bit address to access 1/0 devices.
5. Write the flags of 8086?
The 8086 has nine flags and they are
Carry Flag (CF) Overflow Flag (OF)
Parity Flag (PF) Trace Flag (TF)
Auxiliary carry Flag (AF) Interrupt Flag (IF)
Zero Flag (ZF) Direction Flag (DF)
Sign Flag (SF)
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6. What are the interrupts of 8086?
The interrupts of 8086 are INTR and NMI. The INTR is general
maskable interrupt and NMI is non-maskable interrupt.
7. Write the special functions carried by the general purpose registers of
8086?(Nov/Dec 2008)
The special functions carried by the registers of 8086 are the following.
Register Special function
AX 16-bit Accumulator
AL 8-bit Accumulator
BX Base Register
CX Count Register
DX .Data Register
8. What is pipelined architecture? (Nov/Dec 2004)
In pipelined architecture the processor will have number of functional
units and the execution time of functional units is overlapped. Each functional
unit works independently most of the time.
9. What are the functional units available in 8086 architecture?
The bus interface unit and execution unit are the two functional units
available in 8086 architecture.
10. List the segment registers of 8086?
The segment registers of 8086 are Code segment, Data segment, Stack
segment and Extra segment registers.
11. What is interrupt I/0?(Nov/Dec 2005)
If the I/0 device initiate the data transfer through interrupt then the I/0 is
called interrupt driven I/0.
12. Compare Procedure & Macro? (April/May 2006)
PROCEDURE MACRO
Accessed by CALL & RET
instruction
Accessed during assembly with
name given during program
execution to macro when
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Machine code for instruction
is put only once in the memory
With procedures less memory
is required
Parameters can be passed in
registers, memory locations or
stack
defined
Machine code is generated for
instruction each time when
macro is called
with macro more memory is
required
Parameters passed as part of
statement which calls macro
13. What is linker? (April/may 2005)
A linker is a program used to join together several object files into one
large object file. For large programs it is more efficient to divide the large
program modules into smaller modules. Each module is individually written,
tested & debugged. When all the modules work they are linked together to form
a large functioning program.
14. Explain ALIGN & ASSUME?
The ALIGN directive forces the assembler to align the next segment at an
address Divisible by specified divisor. The format is ALIGN number where
number can be 2, 4, 8 or
15. Example ALIGN 8.
The ASSUME directive assigns a logical segment to a physical segment
at any given time. It tells the assembler what address will be in the segment
registers at execution time.
Example ASSUMES CS: code, DS: data, SS: stack
16. Explain PTR & GROUP?
A program may contain several segments of the same type. The GROUP
directive collects them under a single name so they can reside in a single
segment, usually a data segment. The format is Name GROUP Seg-
name,…..Seg-name . PTR is used to assign a specific type to a variable or a
label. It is also used to override the declared type of a variable.
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17. Explain PROC & ENDP?
PROC directive defines the procedures in the program. The procedure
name must be unique. After PROC the term NEAR or FAR are used to specify
the type of procedure.
Example FACT PROC FAR.
ENDP is used along with PROC and defines the end of the procedure.
18. Explain SEGMENT & ENDS?
An assembly program in .EXE format consists of one or more segments.
The starts of these segments are defined by SEGMENT and the end of the
segment is indicated by ENDS directive. Format Name SEGMENT Name
ENDS
19. Explain TITLE & TYPE?
The TITLE directive helps to control the format of a listing of an
assembled program. It causes a title for the program to print on line 2 of each
page of the program listing. Maximum 60 characters are allowed.
Format TITLE text.
TYPE operator tells the assembler to determine the type of specified
variable in bytes. For bytes the assembler gives a value 1, for word 2 & double
word 4.
20. Define SOP?
The segment override prefix allows the programmer to deviate from the
default segment
Eg : MOV CS : [BX] , AL
21. Define variable?
A variable is an identifier that is associated with the first byte of data
item. In assembly language statement: COUNT DB 20H, COUNT is the
variable.
22. What are procedures?
Procedures are a group of instructions stored as a separate program in
memory and it is called from the main program whenever required. The type of
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procedure depends on where the procedures are stored in memory. If it is in the
same code segment as that of the main program then it is a near procedure
otherwise it is a far procedure.
23. Explain the linking process?
A linker is a program used to join together several object files into one
large object file. The linker produces a link file which contains the binary codes
for all the combined modules. It also produces a link map which contains the
address information about the link files. The linker does not assign absolute
addresses but only relative address starting from zero, so the programs are re
locatable & can be put anywhere in memory to be run.
24. Explain about passing parameters using registers with example?
Procedures process some data or address variable from the main program,
for processing it is necessary to pass the address variables or data. This is called
passing parameters to procedures. In passing parameters using registers the data
to be passed is stored in registers & these registers are accessed in the procedure
to process the data.
CODE SEGMENT
MOV AL, DATA
CALL PRO1
PRO1 PROC NEAR
MOV INPUT, AL
RET
PRO1 ENDP
CODE ENDS
25. What is a recursive procedure?
A recursive procedure is a procedure, which calls itself. Recursive
procedures are used to work with complex data structures called trees. If the
procedure is called with N=3, then the N is decremented by 1 after each
procedure CALL and the procedure is called until N=0.
26. What are libraries?
Library files are collection of procedures that can be used in other
programs. These procedures are assembled and compiled into a library file by
the LIB program. The library file is invoked when a program is linked with
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linker program. when a library file is linked only the required procedures are
copied into the program. Use of library files increase s/w reusability & reduce
s/w development time.
27. What are Macros?(Nov/Dec 2004)
Macro is a group of instruction. The macro assembler generates the code
in the program each time where the macro is called. Macros are defined by
MACRO & ENDM directives. Creating macro is similar to creating new
opcodes that can be used in the program
INIT MACRO
MOV AX, data
MOV DS
MOV ES, AX
ENDM
28. How do 8086 interrupts occur?
An 8086 interrupt can come from any of the following three sources
External signals
Special instructions in the program
Condition produced by instruction
29. What are the 8086 interrupt types?
Dedicated interrupts
Type 0: Divide by zero interrupt
Type 1: Single step interrupt
Type 2: Non maskable interrupt
Type 3: Breakpoint
Type 4: Overflow interrupt Software interrupts
Type 0-255
30. What is interrupt service routine?(May/june 2007)
Interrupt means to break the sequence of operation. While the CPU is
executing a program an interrupt breaks the normal sequence of execution of
instructions & diverts its execution to some other program. This program to
which the control is transferred is called the interrupt service routine.
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31. Define BIOS?
The IBM PC has in its ROM a collection of routines, each of which
performs some specific function such as reading a character from keyboard,
writing character to CRT. This collection of routines is referred to as Basic
Input Output System or BIOS.
32. What is the purpose of segment registers in 8086?
There are 4 segment registers present in 8086. They are
Code Segment (CS ) register
Data Segment (DS ) register
Stack Segment (SS ) register
Extra Segment (ES ) register
The code segment register gives the address of the current code segment.
ie. It will points out where the instructions, to be executed, are stored in
the memory.
The data segment register points out where the operands are stored in the
memory.
The stack segment registers points out the address of the current stack,
which is used to store the temporary results.
If the amount of data used is more the Extra segment register points out
where the large amount of data is stored in the memory.
33. Define pipelining?(Nov/Dec 2004)
In 8086, to speedup the execution of program, the instructions fetching
and execution of instructions are overlapped each other. This technique is
known as pipelining. In pipelining, when the n th instruction is executed, the
n+1 th instruction is fetched and thus the processing speed is increased.
34. Discuss the function of instruction queue in 8086?
In 8086, a 6-byte instruction queue is presented at the Bus Interface Unit
(BIU). It is used to pre fetch and store at the maximum of 6 bytes of instruction
code from the memory. Due to this, overlapping instruction fetch with
instruction execution increases the processing speed.
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35. What is the maximum memory size that can be addressed by 8086?
In 8086, an memory location is addressed by 20 bit address and the
address bus is 20 bit address and the address bus is 20 bits. So it can address up
to one mega byte (2^20) of memory space.
36. What are the predefined interrupts in 8086?(Nov/Dec 2005)
The various predefined interrupts are,
DIVISION BY ZERO (type 0) Interrupt.
SINGLE STEP (type 1) Interrupt.
NONMASKABLE (type2) Interrupt.
BREAK POINT (type 3) Interrupt.
OVER FLOW (type 4) Interrupt.
37. What are the different flag available in status register of 8086?
There are 6 one bit flags are present. They are,
AF - Auxiliary Carry Flag
CF - Carry Flag
OF - Overflow Flag
SF - Sign Flag
PF - Parity Flag
ZF - Zero Flag
38. List the various addressing modes present in 8086?
There are 12 addressing modes present in 8086. They are,
Register and immediate addressing modes
Register addressing modes
Immediate addressing mode
Memory addressing modes.
Direct addressing modes
Register indirect addressing modes
Based addressing modes
Indexed addressing modes
Based Indexed addressing modes
String addressing modes
I/O addressing modes
Direct addressing mode
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Indirect addressing mode
Relative addressing mode
Implied addressing mode
39. How single stepping can be done in 8086?
By setting the Trace Flag (TF) the 8086 goes to single-step mode. In this
mode, after the execution of each instruction s 8086 generates an internal
interrupt and by writing some interrupt service routine we can display the
content of desired registers and memory locations. So it is useful for debugging
the program.
40. What are the functions of bus interface unit (BIU) in 8086?(Nov/Dec
2008)
Fetch instructions from memory.
Fetch data from memory and I/O ports.
Write data to memory and I/O ports.
To communicate with outside world.
Provide external bus operations and bus control signals.
41. What is the clock frequency of 8086?
8086 8086-2 8086-4 Internal clock Frequency 5 MHz 8MHz 4MHz
External Clock Frequency 15MHZ 24MHZ 12MHZ
42. What are the three classifications of 8086 interrupts?(May/june 2007)
Predefined interrupts
User defined Hardware interrupts
User defined software interrupts.
43. What is Key bouncing?
Mechanical switches are used as keys in most of the keyboards. When a
key is pressed the contact bounce back and forth and settle down only after a
small time delay (about 20ms). Even though a key is actuated once, it will
appear to have been actuated several times. This problem is called Key
Bouncing..
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44. Define swapping in?
The portion of a program is required for execution by the CPU, it is
fetched from the secondary memory and placed in the physical memory. This is
called „swapping in‟ of the program.
45. What is an instruction set and enlist the types of instructions?
The instruction set is indeed one of the key features of computer
architecture, defining and describing the capabilities of any computing system,
including microprocessors.
Types as following,
Data movement instruction
Integer arithmetic and logic instructions
Shift and rotate instructions
Control transfer instructions
Bit manipulation instructions
System control instruction
Floating-point instruction
Special function unit instruction.
46. Enlist the different data-types supported by a microprocessor?
A typical set of integer data formats as practiced in modern microprocessor,
Signed and unsigned
ASCII characters,8 bits each
Packed and unpacked binary coded decimal(BCD) numbers,4 bits each
There are two ways of ordering the byte addresses within a word:
Little-endian
Big-endian
47. Enlist the different instruction formats in a microprocessor?
Instruction formats vary considerably among different microprocessors. In
some systems, instructions are formed in units of bytes, in some in units of 16-
bit half words (however, in some systems they are called “words”), and in
others in units of 32-bit words. The basic information included in an instruction
format consists primarily of:
Instruction opcode
Addresses of operands
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48. What do you mean by addressing mode? Enlist the different types of
addressing mode.
The address of the operand in memory is stored in one of registers that is
addressing modes.
Register addressing modes
Immediate addressing modes
Direct addressing modes
Register indirect addressing modes
Register indirect with post increment
Register indirect with pre decrement
Register indirect with displacement
49. What are the advantages & disadvantages of segmentation?
Advantages:
Segmentation supports well-structured software, since segments can
contains meaningful information units.
Supports more compact code, since reference within a segment can be
shorter.
Segmentation supports efficient typing of data, thus contribute g to the
narrowing of the semantic gap.
Disadvantages:
Increased hardware complexity
Execution time overhead in handling segmentation
Extra memory need for segmentation tables
Added memory fragmentation for small segments.
50. What are the four types of pipeline stages?
The four stages of pipelines are:
Fetch
Decode
Execute
Write back
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PART B
BIG QUESTIONS
1. Describe with a neat block diagram the internal architecture and
working of all the internal units of 8086 microprocessor.
Block diagram
Special purpose registers
General data register
Segment registers
Pointers and index registers
Bus interface unit
Execution unit
Memory segmentation
Explanation about each block in the block diagram
2. Explain the addressing modes of 8086 with example? Nov/Dec 05.
The address of the operand in memory is stored in one of registers that is
addressing modes.
There are 12 addressing modes present in 8086. They are,
Register and immediate addressing modes
Register addressing modes
Immediate addressing mode
Memory addressing modes.
Direct addressing modes
Register indirect addressing modes
Based addressing modes
Indexed addressing modes
Based Indexed addressing modes
String addressing modes
I/O addressing modes
Direct addressing mode
Indirect addressing mode
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Relative addressing mode
Implied addressing mode
Explanation about each addressing modes with an example
3. List the various Instructions available in 8086 processor.
Data transfer group – MOV,MVI
Arithmetic group – ADD, SUB, INR.
Logical group –AND, XOR
Branch group – JP, JZ, CALL.
Stack I/O and Machine control group – PUSH, POP, HLT
Processor control-CLC,CMC,STC,CLD
String Manipulations.-MOVS,CMPS,SCAS
Explanation about each instruction with an example
4 (a). Write short notes on macro?
Macro is a group of instruction. The macro assembler generates the code
in the program each time where the macro is called. Macros are defined by
MACRO & ENDM directives. Creating macro is similar to creating new
opcodes that can be used in the program
INIT MACRO
MOV AX, data
MOV DS
MOV ES, AX
ENDM
Explanation with program example
4 (b). Explain in detail the assembler directives of 8086.
DB,DW,DQ,DT
END,ENDP,ENDS,EVEN,EQU,EXTRN
GROUP,LABEL,LENGTH,LOCAL
OFFSET,ORG,PROCEDURE
PUBLIC,SEGMENT,SHORT,TYPE,GLOBAL
Explanations with Examples.
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5. Explain the 8086 interrupt cycle, IVT, and Interrupt Ack sequence?
Apr/May 04
Definition of interrupt
Interrupt cycle
Interrupt vector table
Draw and explain the interrupt Ack sequence
6. Write short notes on interrupt and interrupt service routines? Apr/May
Definition of interrupt
List out the interrupt types
Explanation about interrupt service routines
7. Draw and explain the flag register of 8086 in brief? Apr/May 05
Flag register format
List out the flags
Explanation about each flags in the flag register
8. Draw and explain the pipe line architecture of 8086? Nov/Dec 04
In 8086, to speed up the execution of program, the instructions fetching and
execution of instructions are overlapped each other. This technique is known as
pipelining. In pipelining, when the n th instruction is executed, the n+1 th
instruction is fetched and thus the processing speed is increased
Block diagram &Explanation about pipelining process
9. Explain memory organization of 8086? Nov/Dec 05
In 8086, an memory location is addressed by 20 bit address and the
address bus is 20 bit address and the address bus is 20 bits. So it can address up
to one mega byte (2^20) of memory space
Memory diagram of 8086 processor
Explanation about each parts in the memory
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10. Explain the various segment register and there usage in 8086
processor? Nov/Dec 03
There are 4 segment registers present in 8086. They are
Code Segment (CS ) register
Data Segment (DS ) register
Stack Segment (SS ) register
Extra Segment (ES ) register
The code segment register gives the address of the current code segment. ie.
It will points out where the instructions, to be executed, are stored in the
memory. The data segment register points out where the operands are stored in
the memory. The stack segment registers points out the address of the current
stack, which is used to store the temporary results. If the amount of data used is
more the Extra segment register points out where the large amount of data is
stored in the memory.
Draw the Segment register format of 8086
Explanation about each registers in the segment register format
11(a) Explain the interrupt structure of 8086. Apr/May 05
Definition of interrupt
Interrupt structure format
List out the interrupts
Explanation about each interrupts in the interrupt structure
11(b). Write an ALP to multiply two 8-bit numbers using 8086?
Program
Result Verification
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11 (c). Write an ALP to addition, subtraction &division using 8086?
Program
Result Verification
12 (a). Write a program to sort the numbers in ascending and descending
order/factorial of a number/average of a number/multiplication division .
Program
Result Verification
12 (b). Write a program to move a block of data from one place to other
Program
Result Verification
12 (c). Write a program to copy/move a string from one place to other .
Program
Result Verification
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UNIT II
8086 SYSTEM DESIGN
PART A (TWO MARKS)
1. What are the modes in which 8086 can operate?
The 8086 can operate in two modes and they are minimum or uni
processor mode and maximum or multiprocessor mode.
2. What is the data and address size in 8086?
The 8086 can operate on either 8-bit or 16-bit data.The 8086 uses 20-bit
address to access memory and 16-bit address to access I/O devices.
3. What is the difference between 8086 and 8088
The external data bus in 8086 is 16-bit and that of 8088 is 8-bit.i.e.,the
8086 access memory in words but 8088 access memory in bytes.
4. Explain the function of M/IO in 8086
The signal M/IO is used to differentiate memory address and I/O
address.when the processor is accessing memory locations M/IO is asserted
high and when it is accessing I/O mapped device it is asserted low.
5. What is ALE?
The ALE(Address Latch Enable) is a signal used to de multiplex the
address and data lines using an external latch. It is used as enable signal for the
external latch.
6. How the READY signal is used in microprocessor system?
The READY is an input signal that can be used by slow peripherals to get
extra time in order to communicate with 8086.The 8086 will work only when
READY is tied to logic high Whenever the READY is tied to low, the 8086 will
enter a wait state. When the system has Slow peripheral devices, additional
hardware is provided in the system to make the READY input low during the
required extra time while executing a bus cycle, so that the processor will
remain state during this extra time.
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7. What are control bits?
The flags TF,IF and DF of 8086 are used to control the processor
operation and so they are called control bits.
8. How memory is organized in 8086?
The 1MB physical memory space of 8086 are organized as two banks of
512kb each. The two banks are known as odd bank and even bank. The odd
bank is enabled using BHE and even bank is enabled using the address line A0
9. What is bus cycle?
The bus cycle is the Basic external operation performed by the processor.
it is also known as processor cycle or machine cycle. To execute an instruction,
the processor will run one or more bus cycles in a particular order.
10. List the bus cycles of 8086?
Memory read cycle
Memory write cycle
I/O read cycl
I/O write cycle
Interrupt Acknowledge cycle
11. What is T-state?
The T-state is the time period of the internal clock signal of the processor.
The time taken by the processor to execute a machine cycle is expressed in T-
state.
12. What is the need for timing diagram?
The timing diagram provides information regarding the status of various
signals, when a bus cycle is executed. The knowledge of timing diagram is
essential for system designer to select matched peripheral devices like
memories, latches, ports, etc., to form a microprocessor system.
13. What operation is performed during first T-state of every bus cycle in
8086?
In 8086,during the first T-state of every bus cycle the address is latched
into external latches using ALE signal.
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14. When the 8086 processor checks for an interrupt?
The 8086 check for an interrupt in the last T-state of the last bus cycle of
an instruction.
15. What is interrupt acknowledge cycle?
The interrupt acknowledge cycle is a bus cycle executed by 8086
processor after acceptance of an interrupt to get the interrupt type number or
pointer, in order to service the interrupting device.
16. When the READY signal is sampled by the processor?
The 8086 processor samples or checks the READY signal at the second
T-state of every bus cycle.
17. What are wait states?
The T-state introduced between T2 and T3 of a bus cycle by the slow
peripherals are called wait states.
18. When the 8086 processor will enter wait state?
The 8086 processor will check for READY signal at the second T-state of
a bus cycle. If the READY is tied low at this time, then it will enter into wait
state. That the processor will come out of wait state only when READY is again
made high
19. How clock signal is generated in 8086?what is the maximum internal
clock frequency of 8086?
The 8086 does not have on-chip clock generation circuit. Hence the clock
generator chip, 8284 is used to generate the required clock. The frequecncy of
clock generated by 8284 is thrice that of internal clock frequency of 8086.The
8284 divides the generated clock by three and modify the duty cycle to33% and
then supply as clock signal to 8086.The maximum internal clock frequency of
8086 is 5MHz.
20. What is the use of HOLD and HLDA signals? Nov/Dec 2007
HOLD-This signal indicates that another master is requesting the host
8086 to handover the system bus.
HLDA-(Hold Acknowledge)On receiving HOLD signal, 8086 outputs
HLDA signal high as an acknowledgement.
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21. What is physical memory space?
The memory locations that are directly addressed by the microprocessor
is called physical memory space.
22. What is memory word size?
The size of data that can be stored in memory location is called memory
word size.
23. What is meant by memory mapping?
The memory mapping is the process of interfacing memories to
microprocessor and allocating address to each memory locations
24. What is memory access time?
The memory access time is the time taken by the processor to read or
write a memory location. During read operation it is the time between a valid
address on the bus and end of read control signal. During write operation it is
the time between a valid address on the bus and the end of write control signal.
25. What are the signals involved in memory bank selection?
In 8086 based system the even bank is selected by the address line A0
and the odd bank is selected by the control signal BHE.
26. How the memory space is organised in 8086?
In 8086, the one megabyte of addressable memory space is divided into
two banks: Even(or lower)memory bank and odd(or upper)memory bank. Each
bank will have an addressable space of 512kb.
27. How the data lines are connected to memory banks in 8086?
In 8086 based system the lower eight lines of data bus,D0-D7 are
connected to even bank memory bank memory ICs and the upper eight lines of
data bus ,D8-D15 are connected to odd bank memory ICs.
28. What is the purpose of CLK signal in an 8086 system? Nov/Dec 2006
The clock signal provides the basic timing for processor operation and
bus control activity. The Clock frequency may be 5MHz or 8MHz of 10MHz
for different 8086 versions.
Microprocessor and its Applications
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29. What does it imply if the states of 8086 signals-BHE and A0 are at 0
and 1, respectively. Nov/Dec 2008
When BHE=0 and A0=1,8086 can access even byte address(D0-D7).
30. What happen in 8086 when DEN=0 DT/R=1?(April/May 2008)
The DEN and DT/R signals are used for buffering the data. The data
enable (DEN) Signal informs the transceivers that the 8086 is ready to transmit
or receive data. When DEN=0 and DT/R=1,8086 is ready to transmit the data to
transceivers.
31. What is Packed BCD Format?
Packed BCD Format: Packed BCD Numbers are stored in two digits to a
byte, in 4 bit groups referred to as nibbles. ALU is capable of performing only
binary addition and subtraction, but by adjusting the sum or difference the
correct result in packed BCD format.
32. What is difference between DIV and IDIV instruction in 8086 ?
DIV: It operates only on unsigned number.
IDIV: It operates only on signed numbers.
33. What is Programmed I/O ?
Programmed I/O : It consists of continually examining the status of an Interface
and performing an I/O operation with the Interface when its status indicates that
it has data to be input or its data- out buffer register is ready to receive data
from the CPU.
34. What is the use of Directives in 8086 ?
Directives in 8086 give directions to the assembler during the assembly process
but are not translated into machine instruction.
35. What is Unpacked BCD Format?
Unpacked BCD Format: In Unpacked BCD, there is only one digit per
byte and because of this, unpacked multiplication and division can be done.
Binary operations act on single bytes and the results are adjusted. For Division,
the adjustment is done before the binary division.
Microprocessor and its Applications
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PART B
BIG QUESTIONS
1. Draw the Pin Diagram of 8086 and explain the function of various
signals.
Pin diagram
Common signals
Bus high enable signals/Status
Ready,INTR,TEST,NMI,RESET,CLK
Minimum mode signals
maximum mode signals
Explanation about each signals in the pin diagram
2. Draw and explain the Timing diagrams of 8086 maximum and minimum
mode.
Draw the timing diagram for Minimum mode in Read and Write
Operation
Explanation of the signals involved.
Draw the timing diagram for Maximum mode in Read and Write
Operation
Explanation of the signals involved.
3. With neat sketch explain the minimum mode operation of 8086
processor.
The processor 8086 is in minimum mode when its MN/MX pin is strapped to
+5 V
Block Diagram
Explanation about all signals involved in the block diagram
Microprocessor and its Applications
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4. With neat sketch explain the maximum mode operation of 8086
processor.
The processor 8086 is in maximum mode when its MN/MX pin is grounded.
Block Diagram
Explanation about all signals involved in the block diagram
5. Explain the System bus cycle for memory i/p and memory o/p devices of
8086.
System bus
Memory i/p
Memory o/p
Explanation about all blocks in the block diagram
Microprocessor and its Applications
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UNIT-III
INTERFACING CONCEPTS
PART A (TWO MARKS)
1. What is DMA? Nov/Dec04
The direct data transfer between I/O device and memory is called DMA.
2. What is meant by DMA data transfer? May/ june 2009
DMA stands for direct memory access. In order to transfer bulk amount
of data between memory and I/O device without the involvement of CPU, this
technique is used.
3. Name the modes of operation Nov/Dec 2006
Slave mode operation
Master mode operation
4. What are the modes of operations supported by 8255?Nov/Dec
2008,May/June 2009
Simple I/O mode
Strobed I/O mode
Bidirectional I/O mode
5. List out three of data transmission. Nov/Dec 2008
Simplex
Half duplex
Full duplex
6. What is the usage of IRR (Interrupt Request Register)? Nov/Dec 2008
IRR is the register available in programmable interrupt controller(8259).It
is used to store all the interrupt levels which are requesting service.IRR is
cascaded with Interrupt Service Register(ISR).
Microprocessor and its Applications
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7. What does it imply if 8259’s ICW-1 bit fields LTM and SNGL bits are
set to zero? Nov/Dec 2008
LTM=0;Edge triggered mode
SNGL=0;Cascading with other 8259‟s.
8. What is key bouncing?(April/may 2008)
Key bouncing is the mechanical vibratory action of the contact making
and breaking when keys are pressed in keyboard. Key bounce can be confused
as the rapid pressing of a key. Since the circuit is rapidly switching ON and
OFF.
9. List the uses of USARAT. Nov/Dec 2007/April/May 2006
USART provides serial communication
USART functions are integrated into standard PC interface chip.
Used in GPS navigation system
Mobile Applications
Industrial and control applications
10. What is the function of gate signal in 8253 timer?May/June 2007
The gate signal in 8253 is used as the gate i/p of counters.CLK0,CLK1
gate signals are given to counter 0,counter 1 and counter 2 respectively.
11. List the features of 8251.May/June 2007
It is a universal synchronous and asynchronous communication controller
It allows full duplex transmission
It has built-in Baud rate generator
it provides error detection logic, which detects parity ,overrun and
framing errors
It has 28 pins; DIP package is available.
12. What is the internal operating frequency of the 8279?how can you
derive it from any available clock signal? May/June 2009/Nov/dec 2005
The internal operating frequency of the 8279 is 100kHz.By dividing the
available clock signal by the program clock work, it is obtained.
Microprocessor and its Applications
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13. Name the six modes of operations of an 8253 programmable interval
timer?
Mode-0 =Interrupt on terminal count
Mode-1=Hardware triggerable one-shot
Mode-2=Rate generator
Mode-3=Square wave mode
Mode-4=Software triggered mode
Mode-5=Hardware triggered mode
14. Name any two important methods available for error correction during
serial communication
Parity bits
Check sum
Cyclic redundancy check
Hamming code with 4 bit parity to encode 8-bit of data
15. What is load cell?
A load cell consists of Strain gauges which are arranged in bridge form
and when excited by DC input, it produces an output voltage propostional to the
weight or load placed on it.
16. What is the need for Port? Nov/Dec 03
The I/O devices are generally slow devices and their timing
characteristics do not match with processor timings. Hence the I/O devices are
connected to system bus through the ports.
17. What is a port?
The port is a buffered I/O, which is used to hold the data transmitted from
the microprocessor to I/O device or vice-versa.
18. What is handshake port? Nov/Dec 2003
The port used for exchanging the signals between i/o devices and port or
between port and processor for checking or informing various condition of the
device is called handshake port.
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19. Specify the two types serial communication. Nov/Dec 2003
Synchronous serial data communication
Asynchronous serial data transmission
20. Define PPI Nov/Dec 2003
PPI is programmable peripheral interface. It is programmable parallel i/o
device. it can be programmed to transfer data between microprocessor and i/o
devices under various conditions.
21. Write a short note on INTEL 8255? Apr/May 04
The INTEL 8255 is a I/O port device consisting of 3 numbers of 8 –bit
parallel I/O ports. The ports can be programmed to function either as a input
port or as a output port in different operating modes. It requires 4 internal
addresses and has one logic LOW chip select pin.
22. How DMA is initiated? Nov/Dec 04
When the I/O device needs a DMA transfer, it will send a DMA request
signal to DMA controller. The DMA controller in turn sends a HOLD request to
the processor. When the processor receives a HOLD request, it will drive its tri-
stated pins to high impedance state at the end of current instruction execution
and send an acknowledge signal to DMA controller. Now the DMA controller
will perform DMA transfer.
23. What is Polling?
Polling is a scheme or an algorithm to identify the devices interrupting
the processor. Polling is employed when multiple devices interrupt the
processor through one interrupt pin of the processor.
24. What are the different types of Polling?
The polling can be classified into software and hardware polling. In
software polling the entire polling process is govern by a prograrn.1n hardware
polling, the hardware takes care of checking the status of interrupting devices
and allowing one by one to the processor.
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25. What is the need for interrupt controller?
The interrupt controller is employed to expand the interrupt inputs. It can
handle the interrupt request from various devices and allow one by one to the
processor.
26. List some of the features of INTEL 8259 (Programmable Interrupt
Controller)? Nov/Dec04
It manage eight interrupt request
The interrupt vector addresses are programmable.
The priorities of interrupts are programmable.
The interrupt can be masked or unmasked individually.
27. What is a programmable peripheral device? Nov/Dec 04
If the functions performed by a peripheral device can be altered or
changed by a program instruction then the peripheral device is called
programmable device. Usually the programmable devices will have control
registers. The device can be programmed by sending control word in the
prescribed format to the control register.
28. What is synchronous data transfer scheme?
For synchronous data transfer scheme, the processor does not check the
readiness of the device after a command has been issued for read/write
operation. fu this scheme the processor will request the device to get ready and
then read/W1.ite to the device immediately after the request. In some
synchronous schemes a small delay is allowed after the request.
29. What is asynchronous data transfer scheme?
In asynchronous data transfer scheme, first the processor sends a request
to the device for read/write operation. Then the processor keeps on polling the
status of the device. Once the device is ready, the processor executes a data
transfer instruction to complete the process.
30. What are the internal devices of 8255?
The internal devices of 8255 are port-A, port-B and port-C. The ports can
be programmed for either input or output function in different operating modes.
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31. What is baud rate? Nov/Dec04
The baud rate is the rate at which the serial data are transmitted. Baud
rate is defined as l /(The time for a bit cell). In some systems one bit cell has
one data bit, then the baud rate and bits/sec are same.
32. What is USART? Nov/Dec04
The device which can be programmed to perform Synchronous or
Asynchronous serial communication is called USART (Universal Synchronous
Asynchronous Receiver Transmitter). The INTEL 8251A is an example of
USART.
33. What are the functions performed by INTEL 8251A? Apr/May 05
The INTEL 825lA is used for converting parallel data to serial or vice
versa. The data transmission or reception can be either asynchronously or
synchronously. The 8251A can be used to interface MODEM and establish
serial communication through MODEM over telephone lines.
34. What are the control words of 8251A and what are its functions?
Apr/May 05
The control words of 8251A are Mode word and Command word. The
mode word informs 8251 about the baud rate, character length, parity and stop
bits. The command word can be send to enable the data transmission and
reception.
35. What is the information that can be obtained from the status word of
8251?
The status word can be read by the CPU to check the readiness of the
transmitter or receiver and to check the character synchronization in
synchronous reception. It also provides information regarding various errors in
the data received. The various error conditions that can be checked from the
status word are parity error, overrun error and framing error.
36. What are the tasks involved in keyboard interface? Apr/May 05
The task involved in keyboard interfacing are sensing a key actuation,
Debouncing the key and Generating key codes (Decoding the key). These task
are performed software if the keyboard is interfaced through ports and they are
performed by hardware if the keyboard is interfaced through 8279.
Microprocessor and its Applications
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37. How a keyboard matrix is formed in keyboard interface using 8279?
The return lines, RL0 to RL7 of 8279 are used to form the columns of
keyboard matrix. In decoded scan the scan lines SL0 to SL3 of 8279 are used to
form the rows of keyboard matrix. In encoded scan mode, the output lines of
external decoder are used as rows of keyboard matrix.
38. What is scanning in keyboard and what is scan time?
The process of sending a zero to each row of a keyboard matrix and
reading the columns for key actuation is called scanning. The scan time is the
time taken by the processor to scan all the rows one by one starting from first
row and coming back to the first row again.
39. What is scanning in display and what is the scan time?
In display devices, the process of sending display codes to 7 –segment
LEDs to display the LEDs one by one is called scanning ( or multiplexed
display). The scan time is the time taken to display all the 7-segment LEDs one
by one, starting from first LED and coming back to the first LED again.
40. What is the drawback in memory mapped I/0?
When I/O devices are memory mapped, some of the addresses are allotted
to I/O devices and so the full address space cannot be used for addressing
memory (i.e., physical memory address space will be reduced). Hence memory
mapping is useful only for small systems, where the memory requirement is less
41. List the components of microprocessor (single board microcomputer)
based system
The microprocessor based system consist of microprocessor as CPU,
semiconductor memories like EPROM and RAM, input device, output device
and interfacing devices
42. What is interrupt 1/0?
If the 1/0 device initiate the data transfer through interrupt then the 1/0 is
called interrupt driven 1/0.
Microprocessor and its Applications
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PART B
BIG QUESTIONS
1. Make an note on Memory interfacing and I/O interfacing
Basic concepts in memory interfacing
The primary function of memory interfacing is that the microprocessor
should be able to read from and write into a given register of a memory chip. To
perform these operations the microprocessor should
Be able to select the chip
Identify the register
Enable the appropriate buffer
Why interfacing is needed for 1/0 devices?
Generally I/O devices are slow devices. Therefore the speed of I/O
devices does not match with the speed of microprocessor. And so an interface is
provided between system bus and I/O devices
Explanation about memory and i/o interfacing with examples
2. With neat sketch explain the functions of 8255 PPI. Apr/May 04,
Nov/Dec 05
Block Diagram
Explanation about all the ports available.
Explanation about the modes of transfer
Explain the control Word Register
3. With neat sketch explain the functions of 8251(serial communication)
Apr/May 04
Architecture of 8251
Operating modes
Asynchronous mode
Synchronous mode
Ref diagram page no 252 A.K.Ray
Microprocessor and its Applications
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4. Explain 8253/8254 Timer
Operation modes
Mode0-Interrupt on terminal count
Mode1-HW triggered /programmable one shot
Mode2-Rate generator
Mode3-Squre wave generator
Mode4-software triggered strobe
Mode5 -Hardware triggered strobe
Ref diagram page no A.K.Ray
Ref diagram page no 240 A.K .Ray
5. With neat sketch explain the function of Keyboard and display
controller. Apr/May 04
Block Diagram
Types of Display Available
Types of keys available
Explanation about all blocks in the block diagram
6. With neat sketch explain the function of DMA controller. Nov/Dec 04,05
Apr/May04
8237 DMA controller
Signal description of 8237
Register organizations of 8257
DMA address registers
Terminal count registers
Mode set registers
Status registers
Data bus buffer ,priority resolver
Ref diagram page no268 A.K.Ray
Microprocessor and its Applications
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7. With neat sketch explain the function of Programmable Interrupt
Controller. Nov/Dec 05
Features
Block diagram
Initialisation command word
Interrupt sequence
Interrupt Request Register
In service register
Priority Resolver
Interrupt mask register
Data bus buffer
Ref diagram page no 226 A.K.Ray
8. With neat block diagram, explain the features of programmable interval
timer. Nov/Dec 95
Block diagram
Explanation about each blocks in the block diagram
9. With neat diagram explain how the memory is interfaced to 8086 as odd
and even page.
The primary function of memory interfacing is that the microprocessor
should be able to read from and write into a given register of a memory chip. To
perform these operations the microprocessor should
Be able to select the chip
Identify the register
Enable the appropriate buffer
Block diagram
Explanation about all blocks in the block diagram
10. Write an 8086 subroutine to test a system in address 00200H-07FFFH.
Program & verify the results
Microprocessor and its Applications
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UNIT-IV
ADVANCED MICROPROCESSORS
PART A (TWO MARKS)
1. What is the different clock frequencies used in 80286?
The 80186 is available with internal clock frequency no f 6,8,10 and
12MHz.
2. What are the different packages available in 80186?
PLCC: Plastic Leaded Chip carrier
LCC: Ceramic leadless Chip carrier
PGA: Ceramic Pin Grid Array
3. What are the three types of timer units in 80186?
Timer 0
Timer 1
Timer 2
Timer 0,timer 1 can be used in processor clock or external clock. Timer 2 is
used for internal timing operations.
4. What are all the blocks used in 80186 architectures?
Bus interface unit
Execution unit
Clock generator
Programmable interrupt controller
Programmable timers
DMA controller
Chip select unit
5. What are all functional units in 80286?
Bus unit
Instruction unit
Execution unit
Address unit
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6. What is the different clock frequencies used in 80286?
Various versions of 80286 are available that run on 12.5MHz, 10MHz
and 8MHz clock frequencies.
7. Define swapping in?
The portion of a program is required for execution by the CPU, it is
fetched from the secondary memory and placed in the physical memory. This is
called „swapping in‟ of the program.
8. What are the different operating modes used in 80286?
The 80286 works in two operating modes
Real addressing mode
Protected virtual address mode.
9. What are the CPU contents used in 80286?
The 80286 CPU contains almost the same set of registers, as in 8086
Eight 16-bit general purpose register
Four 16-bit segment registers
Status and control register
Instruction pointer.
9. Give the features of 80386?
The processor registers and ALU are 32-bit wide and the instruction set is
extended to support 32-bit address and data.
The main memory and the data path to memory can be 32 bit wide,so
instruction and data read/write operations will be two times faster.
The maximum size of physical memory is extended from 16Mb to 4Gb.
The on chip memory management supports paging
10. What is status flag bit?
The flag register reflects the results of logical and arithmetic instructions.
The flag register digits D0, D2, D4, D6, D7 and D11 are modified according to
the result of the execution of logical and arithmetic instruction. These are called
as status flag bits.
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11. What is a control flag?
The bits D8 and D9 namely, trap flag (TF) and interrupt flag (IF) bits,
are used for controlling machine operation and thus they are called control
flags.
12. What are the functional blocks used in 80386?
Bus interface unit
Instruction prefetch unit
Instruction decode unit
Execution unit
Segment unit
Paging unit
13. What are the seven types of registers used in 80386 microprocessor?
General purpose registers
segment registers
Instruction pointer and flag register
Control registers
System address and segment registers
Debug registers
Test registers
14. What are the different clock frequencies used in 80386?
The 80386 is available with maximum clock speed rating of
12.5,16,20,25 or 33MHz
15. What is the different clock frequencies used in 80486?
The 80486 is available with maximum clock speed rating of 33,66 and
100MHz
16. What are all the functional units in 80486?
Data processing unit consisting of ALU, Barrel shifter and array of
registers
Bus interface unit consisting of drivers and various control logic unit
32-byte instruction prefetch queue
Instruction decode unit
Floating point unit
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8db cache memory unit
Memory management unit consisting of segmentation and paging
uniforms
17. What is instruction pipelining?
Super scalar architecture
Dynamic branch prediction
Separate code and data caches
Fractional bus operation
Dual processing support
System management mode
performance monitoring
Internal parity checking
Major function of the bus unit is to fetch instruction bytes from the
memory. In fact, the instructions are fetched in advance and stored in a queue to
enable faster execution of the instructions. This concept is known as instruction
pipelining.
18. What is swapping?
The procedure of fetching the chosen program segments or data from the
secondary storage into the physical memory is called „swapping‟.
19. What are the segments registers available in Pentium processor?
There are six 16bit segment registers available in Pentium processor.
Code segment register
Data segment register
Stack segment register
Extra segment register
FS
GS
20. Mention the features of 80286 processors
Multitasking
Instruction pre-decode
Memory protection
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Virtual memory
Auto-shutdown
21. Mention the features of 80386 processors
Instruction pipelining
Break point instruction
Built in self test,
32-bit internal registers
22. Mention the features of 80486 processor
Cache memory
Internal floating point unit
Restart able instruction
Data bus parity
23. What are new ten instructions used in 80186?
ENTER-Enter a procedure
LEAVE-Leave a procedure
BOUND-Check if any array index in a register is in range of array
INS-Input string byte 0r string word
OUTS-Output string byte or string word
PUSHA-Push all registers to stack
POPA-pop all registers from stack
PUSH imm-push immediate data to stack
IMUL reg,sou,imm-Multiply the immediate data and source data,and
store the results in register
SHIFT des, imm-Shift destination register/memory contents specified
immediate number of times.
24. What are two types of memory management unit?
Segment unit
Paging unit
25. What are all the control units used in 80486 family?
Bus cycle control
Burst bus cycle
Bus size control
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Cache control logic units
26.List out the difference between the 8086, 80286, 80386 & 80486
Processor.
Features 8086 80286 80386 80486
Year 1978 1982 1985 1989
Address
lines
Data
lines
20 bits
16 bits
24 bits
16 bits
32 bits
32 bits
32 bits
64 bits
No of
pins
20 68 132 168
Memory
capacity
1 MB Physical
memory16 MB
Cache
memory1GB
Physical
memory16 MB
Cache
memory1GB
Physical
memory 16MB
Cache
memory1GB
Clock
frequency
4,6,8MHZ 4,6,8MHZ 4,6,8MHZ 4,6,8MHZ
Modes of
Operation
Real Real, Protected,
virtual
Real, Protected,
virtual
Real,
Protected,
virtual
27. List out the features of 80286 Processor
Physical memory-16 MB
Cache memory-1GB
Memory management section supports
Virtual memory
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Paging
4 levels of protection
28. What are the base architecture register (or) Application register set in
x86?
The architecture registers are classified into following types
General purpose registers
Instruction pointer
Flag register
Segment registers
29. What are the system register in x86?
The system registers are classified into following types
Memory management registers
Control registers
Code segment
Data segment
Stack segment
30. List out the floating point registers in x86.
The floating point registers are classified into following types
Data registers
Tag word
Status word
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Control word
Instruction and data pointers
31. Define Debug registers
The base architecture and floating –point registers are accessible by
applications programs. The system and debug registers are accessible only by
system programs (such as OS), running on the highest privilege level.
32. Enlist data formats of 80286 Processor
The different types of data formats are
Signed integer data
Binary coded decimal data
Bit, byte, word, strings
33. List out the features of 80386 Processor
Features
32-bit microprocessor
Physical memory space is 4Gbytes(232
)
Virtual memory space is 64 terabytes.
The memory management section of 80386 supports
Virtual memory
Paging
Four levels of protection
Operates in two mode
Real address mode
Protected mode
The concept of paging is introduced in 80386
34. List out the Memory address of 8086, 80286, 80386 Processor
8o86/8088=1MB
80286=16MB
80386=4GB
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35. Mention the two versions of 80386 Processor
Two versions are
80386 DX(in 1985)
80386 SX (in 1988)
36. Comparison between 80386 DX & 80386 SX
80386 DX 80386 SX
32-Bit address bus and 32-bit data
bus
24 Bit address bus and 16 bit
data bus
Packed in 132 pin ceramic pin grid
array((PGA
100 Pin flat package
Address 4GB of memory 16 MB of memory
37. List out the functional units of 80386 Processor
The functional units are
Bus interface unit
Code pre-fetch unit
Decode unit
Execution unit
Segmentation unit
38. Define Addressing modes& mention the types of 80386
Address of source and destination operands in an instruction. The manner
in which a microprocessor determines the effective.
The different types of the 80386 processor are
Register operand mode
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Immediate operand mode
Direct mode
Register mode
Based mode
Indexed mode
Based indexed mode
Based indexed mode with displacement
Scaled indexed
Based Scaled indexed
Based Scaled indexed mode with displacement
39. List out the instruction set of 80386 Processor
The instruction extends the 8086/80286 instruction set in two ways. 32-
bit formats of all 16-bit instructions are included to support the 32 bit data types
and 32-bit addressing modes are provided for all memory reference instructions.
The 80386 instruction set is divided into nine types
Data transfer
Arithmetic
String
Logical
Bit manipulation
Program control
High-level language
Protection model
Processor control
40. Define interrupt
An interrupt is usually understood to be an event when an external signal
stops the execution of a program. While the program is interrupted, the
processor runs an interrupt service routine.
41. What are types of operating modes present in x86 Processor?
The types of operating modes are
Real mode
Protected mode
Virtual 8086 mode
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42. Make a note on Real mode operation
This has the same base architecture as the 8086 but allows access to the
32-bitregister set. When the processor is reset or powered up, it is initialized in
real mode.
43. Make a note on Virtual mode operation
This allows the execution of 8086 applications, while still allowing the
system designer to take full advantage of the protection mechanism.
44. Enlist data types of 80386 Processor
The different data types are
Bit
Bit sting
Bit field
Signed/unsigned
Integer word, Long integer
Unsigned integer word
Unsigned long integer word
Signed quad word
Pointer, Strings
BCD, packed BCD
Offsetr
45. Enlist the additional instruction set of 80386 Processor.
The newly added instructions may be categorized in to the following
groups
Bit scan instructions
Bit test instructions
Conditional instructions
Shift double instructions
Control transfer instructions
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46. PIPELINE HAZARDS
Hazards are situations in pipelining where one instruction cannot
immediately follow another.
Hazards reduce the ideal speedup gained from pipelining and are
classified into three classes
Structural hazards: Arise from hardware resource conflicts when
the available hardware cannot support all possible combinations of
instructions.
Data hazards: Arise when an instruction depends on the results of
a previous instruction in a way that is exposed by the overlapping
of instructions in the pipeline
Control hazards: Arise from the pipelining of conditional
branches and other instructions that change the PC
Can always resolve hazards by waiting
47. List out the different signals provided by 80486 Processor
Signals
Address bus (A31-A2)
Data bus (D0-D31)
Lock
Read /write
Reset
NMI
HOLD
HLDA
BOFF
D/C
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48. List out the addressing modes present in 80486 Processor
Address of source and destination operands in an instruction. The manner
in which a microprocessor determines the effective.
The different types of the 80486 processor are
Register operand mode
Immediate operand mode
Direct mode
Register mode
Based mode
Indexed mode
Based indexed mode
Based indexed mode with displacement
Scaled indexed
Based Scaled indexed
Based Scaled indexed mode with displacement
49. Enlist data types of 80486 Processor
Signed/Unsigned data types
Floating point
BCD
String
ASCII, Pointer data types
50. Make a note on Virtual memory
An operating system technique that allows programs or data to exceed the
physical size of the main, internal, directly accessible memory of the
microcomputer. Program or data segment pages are swapped from external disk
storage as needed. The swapping is invisible (transparent) to the programmer.
Therefore, the programmer does need not to be concerned with the actual
physical size of internal memory while writing the code.
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51. What are the 5 types of descriptors tables in 80386?
The 5 types of descriptors that the 80386 has are as follows
Code or data segment descriptors
System descriptors
Local descriptors
Task state descriptors
Gate descriptors
52. Segment Descriptor tables
Segmentation scheme is a way of offering protection to different types of
data and code. In 80386 Processor consist of following segment descriptor
tables
Global Descriptor table(GDT)
Local descriptor table(LDT)
Interrupt Descriptor table(IDT)
Their respective significances are also similar to the corresponding
descriptor table significances in 80286.
53. Make a note on Paging
PAGING OPERATION Paging is one of the memory management
techniques used for virtual memory multitasking operating system.
The segmentation scheme may divide the physical memory into a
variable size segments but the paging divides the memory into a fixed
size pages.
The segments are supposed to be the logical segments of the program, but
the pages do not have any logical relation with the program.
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The pages are just fixed size portions of the program module or data.
54. Make a note a note Virtual 8086 Mode
In its protected mode of operation, 80386DX provides a virtual 8086
operating environment to execute the 8086 programs.
The real mode can also used to execute the 8086 programs along with the
capabilities of 80386, like protection and a few additional instructions.
Once the 80386 enters the protected mode from the real mode, it cannot
return back to the real mode without a reset operation.
Thus, the virtual 8086 mode of operation of 80386, offers an advantage of
executing 8086 programs while in protected mode
55. List the various instructions available in Pentium processor
The instructions set are classified into the following types.
Data transfer
Arithmetic
Bit manipulation
String
Program transfer
Processor control
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PART B
BIGQUESTIONS
1. Explain the architecture of Intel 80286 the help of a block diagram
Block diagram
Registers Available
Functions of Accumulator
Explanation about all blocks in the block diagram
2. Explain the operating modes of 80386 Processor
The 80386 Processor operates in following types.
Real mode operation
Protected mode operation
Virtual mode of 8086
Explanation about each operating modes
3. What are the addressing modes present in 80286 processor, explain with
examples
The addressing modes are classified into the following types
Immediate operand mode
Direct mode
Register mode
Based mode
Indexed mode
Based indexed mode
Based indexed mode with displacement
Scaled indexed
Based Scaled indexed
Based Scaled indexed mode with displacement
Explanation about each addressing modes with examples
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4. Draw and discuss the register set of 80286 and explain a typical function
of each of the register in brief.
Diagram of register set format
Registers Available
Explanation about all register in the register set format
5.Explain the registration organisation of i386, i486 and Pentium
processors.
Diagram of register set format
Registers Available
Explanation about all register in the register set format
6. Explain the architecture of Intel 80386 the help of a block diagram
Block diagram
Registers Available
Functions of Accumulator
Explanation about all blocks in the block diagram
7. List the various instructions set available in 80286 and 80386 processor
The 80286 & 80386 instruction set is divided into nine types
Data transfer
Arithmetic
String
Logical
Bit manipulation
Program control
High-level language
Protection model
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Processor control
Explanation about each instruction set with example
8. Mention the privilege levels and explain in its detail.
Definition of privilege levels
List out the privilege levels
Explanation about each privilege levels
9. Explain the following
(i) 80386 memory management
Features of 80386 processor
Explanation about memory management techniques
(ii) Virtual 8086 mode
Explanation about virtual mode of 8086 processor
(iii) Enlist the different functional groups of signals provided by 80386
&80486 Processor.
Pin diagram (80386 & 80486)
Explanation about different signals provided by 80386 processor
Explanation about different signals provided by 80486 processor
10. What are the addressing modes present in 80386 & 80486 processor,
explain with examples
The addressing modes are classified into the following types
Immediate Direct mode
Register mode
Based mode
Indexed mode
Based indexed mode
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Based indexed mode with displacement
Scaled indexed
Based Scaled indexed
Based Scaled indexed mode with displacement
operand mode
Explanation about each addressing modes with examples
11. Give architectural features of i386,i486,and Pentium processors.
Explanation about all other features
12. Explain the architecture of Intel Pentium processor the help of a block
diagram
Block diagram
Registers Available
Functions of Accumulator
Explanation about all blocks in the block diagram
Parameters 80386 80486 Pentium
1.Specification 32 bit processor 32 bit processor 32 bit processor
2.Number of
pins
132 132 296
3.Memory
capacity
Physical memory-
4GB
Virtual memory
64TB
Physical
memory16 MB
Cache
memory1GB
Total of 4GB
4.Number of
transistors
275,000 275,000 3.1 million
5.Clock
frequency
12.5,16,20,25,33MHz 4,6,8MHZ 60-233MHz
Microprocessor and its Applications
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UNIT-V
BUILDING SYSTEM
PART A (TWO MARKS)
1. What is a bus?
Bus is a group of conducting lines that carries data, address and control
signals.
2. What do you mean by address bus?
The address bus is a group of 16 lines generally identified as A0 to A15.
The address bus is unidirectional: bits flow from MPU to peripheral devices.
3. What is control bus?
This is single line that is generated by the MPU to provide timing of
various operations.
4. Why data bus is bi-directional?
The microprocessor has to fetch (read) the data from memory or input
device for processing and after processing, it has to store (write) the data to
memory or output device. Hence the data bus is bi-directional.
5. Why address bus is unidirectional?
The address is an identification number used by the microprocessor to
identify or access a memory location or I / O device. It is an output signal from
the processor. Hence the address bus is unidirectional.
7. What is bus arbitration? Nov/Dec 09
8289 popularly called bus arbiter, takes care of all the bus access control
functions and bus handshake activities.
8. What is meant by bus control ?
While operating hand-in-hand with the bus controller 8288,the 8289
controls the access of the bus for its host CPU and maintains status about the
current access of the bus.
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9. Define Bus window.
It is a part of memory which can be addressed by more than one
processor for communication.
10. What is bus contention?
If two devices drives the data bus simultaneously then it is called bus
contention. It may lead to following undesirable events.
Damaging one or both IC chip.
The high current may cause a voltage spike in the supply system leading
to data loss.
11. What is Topology? Apr/May 04
Interconnections of networks or systems form the topology.
12. What are the commands used in PCI?
INTA sequence
Special cycle
I/O Read cycle
I/O write cycle
Memory read cycle
Memory write cycle
Configuration read
13. What is PCI?
The peripheral component interconnect bus, interface contains a series of
registers, located in a small memory device on the PCI interface, that contain
information about the board, The information in these registers allows the
computer to automatically configure the PCI card.
14.What is plug and play?
The PCI bus has replaced the VESA local bus because of its plug and
play characteristics and its ability to function with a 64-bit data bus. A PCI
interface contains a series of registers, located in a small memory device on the
PCI interface ,that contain information about the board, The information in
these registers allows the computer to automatically configure the PCI
card.This feature is called as Plug and play.
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14. Different types of bus interface?
ISA (Industry Standard Architecture)
EISA (Extended ISA)
VESA (Video Electronics Standard Association)
PCI (Peripheral Component Interconnect)
USB (Universal Serious Bus)
AGP(Advanced graphics Port)
15. What is ISA?
ISA (Industry Standard Architecture).It contains 8MHz
8-bit(8086/8088)
16-bit(80286-pentium)
16. What is EISA?
EISA (Extended ISA).It contains 8MHz,32-bit (older 386 and 486
machine).
17. What is PCI?
PCI(Peripheral Component Interconnect).It cotains 33 MHz
32-bit or64-bit(Pentiums)
New: PCI express and PCI-X 533 MTS
18. What is VESA?
VESA (Video Electronics Standard Association).It runs at processor
speed. It contains 32-bit or 64 -bit (Pentiums).Only disk and video,competes
with the PCI
but is not popular.
19. What is TXD?
TXD-Transmitter Data Output This output pin carries serial stream of the
transmitted data bits along with other information like start bit, stop bits and
priority bit.
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20. What is RXD?
RXD-Receive Data Input This input pin of 8251A receives a composite
stream of the data to be received by 8251A.
21. What is meant by key bouncing?
Microprocessor must wait until the key reach to a steady state; this is
known as Key bounce.
22. Write the function of crossbar switch?
The crossbar switch provides the inter connection paths between the
memory module and the processor. Each node of the crossbar represents a bus
switch. All these nodes may be controlled by one of these processors or by a
separate one altogether.
23. What is a data amplifier?
Transceivers are the bi-directional buffers are some times they are called
as data amplifiers. They are required to separate the valid data from the time
multiplexed address data signal. They are controlled by 2 signals
i.e DEN & DT/R.
24. What are the different inter connection topologies?
Shared bus
Multiport Memory
Linked Input/Output
Bus window
Crossbar Switching.
25. What are the configurations used for physical interconnections?
Star Configuration
Loop configuration
Complete interconnection
Regular topologies
Irregular topologies
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PART B
BIG QUESTIONS
1. Explain about bus concepts and bus Standards(Refer notes)
Bus is a group of conducting lines that carries data, address and control
signals.
The bus standards are
Address bus
Data bus
Control bus
Address bus:
The address bus is a group of 16 lines generally identified as A0 to A15.
The address bus is unidirectional: bits flow from MPU to peripheral devices.
Control bus:
This is single line that is generated by the MPU to provide timing of
various operations.
Why data bus is bi-directional?
The microprocessor has to fetch (read) the data from memory or input
device for processing and after processing, it has to store (write) the data to
memory or output device. Hence the data bus is bi-directional.
Why address bus is unidirectional?
The address is an identification number used by the microprocessor to
identify or access a memory location or I / O device. It is an output signal from
the processor. Hence the address bus is unidirectional.
2. Explain in detail about peripheral component interconnect
bus(PCI).(Refer Barry B.Brey)
PCI Explanation
VESA Local bus connector and card
System block diagram of PCI
Explanation about each block in the block diagram
PCI commands
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3. Explain in detail about universal serial bus(USB) system. P.no582-
585(Refer Barry B.Brey)
PCI Explanation
System block diagram of PCI
Explanation about each block in the block diagram
4. Explain in detail about platform architectures.(Refer notes)
Block diagram
List out the parts
Explanation about each parts in the block diagram
5. Explain the Applications of microprocessors
List few applications of microprocessor-based system.
It is used:
For measurements, display and control of current, voltage,
For temperature, pressure, etc.
For traffic control and industrial tool control.
For speed control of machines
Explanation about each applications
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ANNA UNIVERSITY CHENNAI
UNIVERSITY QUESTION BANKS
M.C.A- Microprocessor and its Applications
Microprocessor and its Applications
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M.C.A DEGREE EXAMINATION, NOVEMBER/DECEMBER 2007
Third Semester
MC 1702-MICROPROCESSOR AND ITS APPLICATION
(Regulation 2005
Time: Three hours Maximum:100 marks
Answer ALL questions
PART A-(10 x 2=20 marks)
1. List the register set available in 8085.
B-C register pair
D-E register pair
H-L register pair
Stack pointer (SP)
Program counter (PC).
2. How are the instructions of 8085 classified?
Data transfer group – MOV, MVI, LXI.
Arithmetic group – ADD, SUB, INR.
Logical group –ANA, XRA, CMP.
Branch group – JMP, JNZ, CALL.
Stack I/O and Machine control group – PUSH, POP, IN, HLT.
3. Compare 8085 and 8086 flag registers.
8085 Flag registers are
S- Sign Flag
Z-Zero flag.
AC-Auxiliary flag.
P-Parity Flag.
CY-Carry Flag.
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8086 Flag registers are
The 8086 has nine flags and they are
1. Carry Flag (CF) 6. Overflow Flag (OF)
2. Parity Flag (PF) 7. Trace Flag (TF)
3. Auxiliary carry Flag (AF) 8. Interrupt Flag (IF)
4. Zero Flag (ZF) 9. Direction Flag (DF)
5. Sign Flag (SF)
4. What are the two modes of operation supported by 8086 architecture?
How do you choose the mode of operation?
The 8086 can operate in two modes and they are minimum (or
uniprocessor) mode and maximum (or multiprocessor) mode.
When the 8086 processor is in minimum mode?
The processor 8086 is in minimum mode when its MN/MX pin is
strapped to +5 V
When the 8086 processor is in maximum mode?
The processor 8086 is in maximum mode when its MN/MX pin is grounded
5. Give the function of the following pins in 8086
(a) Ready (b) ALE.
What is ALE?
The ALE (Address Latch Enable) is a signal used to de multiplex the
address and data lines using an external latch. It is used as enable signal for the
external latch.
6. How the READY signal is used in microprocessor system?
The READY is an input signal that can be used by slow peripherals to get
extra time in order to communicate with 8086.The 8086 will work only when
READY is tied to logic high. Whenever the READY is tied to low, the 8086
will enter a wait state. When the system has Slow peripheral devices.
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7. Define instruction cycle, machine cycle and T-state
Instruction cycle is defined, as the time required completing the execution
of an instruction. Machine cycle is defined as the time required completing one
operation of accessing memory, I/O or acknowledging an external request. T-
cycle is defined as one subdivision of the operation performed in one clock
period.
8. What is the function of the LOCK, BE3 – BEO?
LOCK signal in 8086
If 8086 is working at maximum mode, there are multiprocessors are
present. If the system bus is given to a processor then the LOCK signal is made
low. That means the system bus is busy and it cannot be given of any other
processors. After the use of the system bus again the LOCK signal is made high.
That means it is ready to give the system bus to any processor
BHE signal
BHE signal means Bus High Enable signal. The BHE signal is made low
when there is some read or write operation is carried out. ie . When ever the
data bus of the system is busy i.e. whenever there is some data transfer then the
BHE signal is made low.
9. List the major sections of the 8279 keyboard/display interface
Keyboard section
Scan Section
Display section
CPU interface section
10. Mention any two coprocessors
8087
80287
80387
80487
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PART B-(5 x 16=80 marks)
11 (a) (i) Draw the Architectural diagram of 8085 and explain. (10)
ALU
Timing and control unit
Instruction Register & Decoding
Interrupt control
Serial I/O control
Ref diagram page no 59 Gaonkar
11 (a) (ii) Write a detailed note on the Serial I/O control. (6)
Block diagram
Explanation about each blocks in block diagram
11 (b) Discuss the complete interrupt structure of 8085 CPU. (16)
Maskable interrupt
Non maskable interrupt
Vectored interrupt
Hardware interrupt
Software interrupt
12. (a) (i) Give the Instruction format of 8086 and explain the use of the
byte addressing mode. (10)
The instruction set is grouped into the following formats
One byte instruction MOV C,A
Two byte instruction MVI A,39H
Three byte instruction JMP 2345H
Explanation about each instruction format with example
12(a) (ii) How is 20 bit physical address generated in 8086 CPU explain
with examples? (6)
Draw the diagram
Consider one example
Find out the solution for that example
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12 (b) List the various addressing mode of 8086 with suitable examples and
Explain. (16)
The address of the operand in memory is stored in one of registers that is
addressing modes.
There are 12 addressing modes present in 8086. They are,
Register and immediate addressing modes
Register addressing modes
Immediate addressing mode
Memory addressing modes.
Direct addressing modes
Register indirect addressing modes
Based addressing modes
Indexed addressing modes
Based Indexed addressing modes
String addressing modes
I/O addressing modes
Direct addressing mode
Indirect addressing mode
Relative addressing mode
Implied addressing mode
Explanation about each addressing modes with an example
13. (a) (i) With a neat sketch explain the memory organization and access
of the 8086 processor. (10)
In 8086, an memory location is addressed by 20 bit address and the address
bus is 20 bit address and the address bus is 20 bits. So it can address up to one
mega byte (2^20) of memory space
Memory diagram of 8086 processor
Explanation about each parts in the memory
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13(a) (ii) Draw the memory Write Bus cycle diagram of 8086 working in
maximum mode.(6)
Draw the timing diagram for Maximum mode in Write
Operation
Explanation of the signals involved.
13(b) Draw the schematic of the 8086 sytem working in the maximum mode
with all necessary peripheral the components and explain. (16)
The processor 8086 is in maximum mode when its MN/MX pin is
grounded.(16)
Block Diagram
Explanation about all signals involved in the block diagram
14 (a) Describe the 80386 memory management. (16)
80386 memory management
Features of 80386 processor
Explanation about memory management techniques
14(b) Draw the block diagram of the Pentium processor and discuss the
features of the same. (16)
Block diagram
Registers Available
Functions of Accumulator
Explanation about all blocks in the block diagram
15.( a) Give the Basic description of the 8279 pin configuration and explain
how you will interface a 8 digit display and a 64 keys keyboard to the
CPU using the 8279. (16)
Block Diagram
Types of Display Available
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Types of keys available
Explanation about all blocks in the block diagram
15 (b) Short notes on:
(i) CRT Controller. (8)
Block diagram
Explanation about each block in the bloc diagram
(ii) Coprocessor. (8)
List out the coprocessor
Explanation about how they are interfaced with main processor
Microprocessor and its Applications
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M.C.A. Degree Examination,Nov/Dec 2008
Third Semester
MC 1702 - MICROPROCESSORS AND ITS APPLICATION
(Regulation-2005)
Answer all the questions
PART – A(10X2=20)
1. What are the functions of a microprocessor within the microcomputer?
It is a program controlled semiconductor device (IC}, which fetches,
decodes and executes instructions. A computer that is designed using a
microprocessor as its CPU is called microcomputer.
2. What is the use of SP register in 8085 and how can the contents of HL
register be located to sP in 8085 Microprocessors?
The stack is a group of memory locations in the R/W memory that is used
for the temporary storage of binary information during the execution of the
program. The stack related instructions are PUSH & POP
3.Define pipelining?
In 8086, to speedup the execution of program, the instructions fetching
and execution of instructions are overlapped each other. This technique is
known as pipelining. In pipelining, when the n th instruction is executed, the
n+1 th instruction is fetched and thus the processing speed is increased?
4. What is the data and address size in 8086?
The 8086 can operate on either 8-bit or 16-bit data. The 8086 uses 20 bit
address to access memory and 16-bit address to access 1/0 devices.
5. How the signals BHE and AO are used in transferrring the data to and
from the memory to the microprocessor ?
BHE signal means Bus High Enable signal. The BHE signal is made low
whenthere is some read or write operation is carried out. ie . When ever the
data bus of the system is busy i.e. whenever there is some data transfer then the
BHE signal is made low.
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6. What are the instructions used by 8086 for data transfer using standard
I/O and memory mapped I/O ? Give example for ecah case.
Data transfer
Processor control
7. Explain the flag bits that are available in 80386 but not in 8086.
What is status flag bit?
The flag register reflects the results of logical and arithmetic instructions.
The flag register digits D0, D2, D4, D6, D7 and D11 are modified according to
the result of the execution of logical and arithmetic instruction. These are called
as status flag bits.
What is a control flag?
The bits D8 and D9 namely, trap flag (TF) and interrupt flag (IF) bits,
are used for controlling machine operation and thus they are called control
flags.
8. Which is the pin that makes the 80386 to interface 32 and 16 bit data
buses ? Explain the pin used in transferring either 16 bit or 32 bit data into
processor.
RESET PIN
Address bus (A31-A2)
Data bus (D0-D31)
9. List the major sections of the 8279 keyboard/display interface
Keyboard section
Scan Section
Display section
CPU interface section
10.Enlist data types of 80386 Processor
Signed/Unsigned data types
Floating point
BCD, ASCII, Pointer data types
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PART B (5X16=80)
11(a). With a functional block diagram of 8086 explain its register
architecture and use of each registers. (16)
Block diagram
Special purpose registers
General data register
Segment registers
Pointers and index registers
Bus interface unit
Execution unit
Memory segmentation
Explanation about each block in the block diagram
11(b)(i). Distinguish between instruction cycle, machine cycle and clock
cycle. (4)
Instruction cycle is defined, as the time required completing the execution
of an instruction. Machine cycle is defined as the time required completing one
operation of accessing memory, I/O or acknowledging an external request. T-
cycle is defined as one subdivision of the operation performed in one clock
period
11(b)(ii). Explain the timing signals that are triggered when executing the
following instruction in 8085. (12)
(i). MVI M,data
(ii). MOV M ,B
12(a). Describe in detail the internal architecture of 8086. Also explain how
pipelining is achieved in 8086. (16)
Block diagram
Special purpose registers
General data register
Segment registers
Pointers and index registers
Bus interface unit
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Execution unit
Memory segmentation
Explanation about each block in the block diagram
Explanation about pipelining process
12(b). Explain with example the different addressing modes available in
8086. (16)
The address of the operand in memory is stored in one of registers that is
addressing modes.
There are 12 addressing modes present in 8086. They are,
Register and immediate addressing modes
Register addressing modes
Immediate addressing mode
Memory addressing modes.
Direct addressing modes
Register indirect addressing modes
Based addressing modes
Indexed addressing modes
Based Indexed addressing modes
String addressing modes
I/O addressing modes
Direct addressing mode
Indirect addressing mode
Relative addressing mode
Implied addressing mode
Explanation about each addressing modes with an example
13(a)(i). Why there are two different modes of operation exist in 8086?
How is it selected? 8086 MINIMUM AND MAXIMUM MODES of
operation MN/MX. (5)
The 8086 can operate in two modes and they are minimum (or
uniprocessor) mode and maximum (or multiprocessor) mode.
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When the 8086 processor is in minimum mode?
The processor 8086 is in minimum mode when its MN/MX pin is
strapped to +5 V
When the 8086 processor is in maximum mode?
The processor 8086 is in maximum mode when its MN/MX pin is
grounded
13(a)(ii).Explain the functions of all the signals used in minimum
modeof8086. (11)
The processor 8086 is in minimum mode when its MN/MX pin is strapped to
+5 V
Block Diagram
Explanation about all signals involved in the block diagram
13(b)(i). 8086 is interfaced to an byte organized memory. Justify this
statement. (5)
Block diagram of 8086 interfaced with memory
Explanation about interfacing process
13(b)(ii). How is ROM/EPROM interfaced to the 8086 processor? Explain
with a diagram. (11)
Diagram of ROM interfaced with 8086 processor
Diagram of EPROM interfaced with 8086 processor
Explantion about the interfacing process
14 (a). Describe in detail the 3 different modes of operation of 80386. (16)
The 80386 Processor operates in following types.
Real mode operation
Protected mode operation
Microprocessor and its Applications
Prepared by P. SELVAN M.E, AP/ECE, Chettinad Tech, Karur Page 95
Virtual mode of 8086
Explanation about each operating modes
14.(b). With a block diagram showing the internal functional units of
Pentium processor explain its working. (16)
Block diagram
Registers Available
Functions of Accumulator
Explanation about all blocks in the block diagram
15.(a).(i). Give the fundamental description on how a CRT works. (6)
15.(a).(ii). Explain as to how a 8275 CRT controller is interfaced to a
microcomputer system. (10)
Block diagram
Explanation about each blocks in the block diagram
15(b)(i). What do you mean by serial and parallel printers? Explain how
the characters are generated in LRC 7040 printers. (6)
Block diagram
Explanation about each blocks in the block diagram
15.(b).(ii). Describe the working of 8295 printer controller chip as a printer
interface to a microprocessor with a diagram.
Block diagram
Explanation about each blocks in the block diagram