Download - Logic Design - Chapter 2: Logic Gates
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CHAPTER 2
Logic Gates
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Contents Boolean Variables & Truth Tables OR Operation AND Operation NOT Operation NOR Operation NAND Operation The Exclusive- OR Gate The Exclusive-NOR Gate INTEGRATED CIRCUIT LOGIC FAMILIES
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Boolean Variables & Truth Tables
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LOGIC 0 LOGIC 1 False True Off On Low High No Yes Open Switch Close Switch
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OR Operation
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Timing Diagrams of OR gates
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An application: Alarm System
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AND Operation
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Timing Diagrams of AND gates
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An application: A Seat Belt Alarm System
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-1-I
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NOT Operation
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NOR Operation
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Negative AND equivalent of a NOR gate
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An application: An aircraft landing indicator
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NAND Operation
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Negative OR Equivalent Operation of the NAND Gate
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An application: A Manufacturing Plant Tank Indicator
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The sensors produce a 5 V level when the tanks are more than one-quarter full.
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The Exclusive- OR Gate
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Inputs output
A B X 0 0 0 0 1 1 1 0 1 1 1 0
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The Exclusive-NOR Gate
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Inputs output
A B X 0 0 1 0 1 0 1 0 0 1 1 1
•equivalence 0coincidenceX-NORto
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Timing diagram
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INTEGRATED CIRCUIT LOGIC FAMILIES Diode Logic (DL) Resistor-Transistor Logic (RTL) Diode-Transistor Logic (DTL) Transistor-Transistor Logic (TTL) Emitter-Coupled Logic (ECL) CMOS Logic
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Fan-in & Fan-out Fan-in
The number of standard loads drawn by an input to ensure reliable operation. Most inputs have a fan-in of 1.
Fan-out The number of standard loads that can be
reliably driven by an output, without causing the output voltage to shift out of its legal range of values.
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Comparison of performance characteristics of CMOS, TTL and ECL logic gates.
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Technology CMOS (silicon gate)
CMOS (metal gate)
TTL std
TTL LS
TTL S
TTL ALS
TTL AS
ECL
Device series
74HC 4000B 74 74LS 74S 74ALS 74AS 10KH
Power dissipation: Static
1 uW
10 mW
2 mW
19 mW
1 mW
8.5 mW
25 mW
At 100 kHz 0.17 mW
0.1 mW
10 mW
2 mW
19 mW
1 mW 8.5 mW
25 mW
Propagation delay time
8 ns 50 ns 10 ns
10 ns 3 ns 4 ns 1.5 ns
1 ns
Fan-out 10 20 20 20 40
Std : standard LS: Low power Schottky S: Schottky
ALS: Advanced Low power Schottky AS: Advanced Schottky