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Preliminary Datasheet | Rev. 0.4 | 2020
Industrial BGA SSD PCIe Gen3x2 11.5x13 mm 345Ball
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Content 1. PRODUCTFEATURES...................................................................................................................................................................42. PARTNUMBERDECODER...........................................................................................................................................................53. PRODUCTSPECIFICATION...........................................................................................................................................................64. ELECTRICALSPECIFICATIONS.......................................................................................................................................................95. INTERFACE................................................................................................................................................................................126. PACKAGEDIMENSIONS............................................................................................................................................................257. ENVIRONMENTALSPECIFICATION............................................................................................................................................288. COMMANDSETS......................................................................................................................................................................329. MANAGEMENT.........................................................................................................................................................................37
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List of Figures
FIGURE1–BLOCKDIAGRAM................................................................................................................................................................................6FIGURE2–POWERDIAGRAM............................................................................................................................................................................11FIGURE3-PINASIGNMENT...............................................................................................................................................................................12FIGURE4-PINASIGNMENT(BOTTOMVIEW).........................................................................................................................................................13FIGURE5-PACKAGEDIMENSIONS.......................................................................................................................................................................25FIGURE6-BOTTOMVIEW.................................................................................................................................................................................26
List of Tables TABLE1–SEQUENTIALPERFORMANCEWITHOUTHMB(HOSTMEMORYBUFFER).........................................................................................................7TABLE2–SEQUENTIALPERFORMANCEWITHHMB(HOSTMEMORYBUFFER)...............................................................................................................7TABLE3–RANDOMPERFORMANCEWITHOUTHMB(HOSTMEMORYBUFFER).............................................................................................................7TABLE4–RANDOMPERFORMANCEWITHHMB(HOSTMEMORYBUFFER)...................................................................................................................8TABLE5–TEMPERATURERANGE..........................................................................................................................................................................8TABLE6–AVERAGEPOWERCONSUMPTION...........................................................................................................................................................8TABLE7–SUPPLYVOLTAGE.................................................................................................................................................................................9TABLE8–POWERCONSUMPTIONATEACHPOWERSTATE..........................................................................................................................................9TABLE9–REGULATEDPOWERRAILPARAMETERSFORBGASSDTYPES......................................................................................................................9TABLE10–PACKAGESPECIFICATION...................................................................................................................................................................27TABLE11–HIGHTEMPERATURE........................................................................................................................................................................28TABLE12–LOWTEMPERATURE.........................................................................................................................................................................28TABLE13–HIGHHUMIDITY..............................................................................................................................................................................28TABLE14–TEMPERATURECYCLE.......................................................................................................................................................................28TABLE15–SHOCK...........................................................................................................................................................................................28TABLE16–VIBRATION.....................................................................................................................................................................................29TABLE17–DROP............................................................................................................................................................................................29TABLE18–BENDING........................................................................................................................................................................................29TABLE19–TORQUE.........................................................................................................................................................................................29TABLE20–ESD..............................................................................................................................................................................................29TABLE21–EMI..............................................................................................................................................................................................30TABLE22–COMMANDSLIST.............................................................................................................................................................................32TABLE23–IDENTIFYCONTROLLERDATASTRUCTURE.............................................................................................................................................33TABLE24–IDENTIFYNAMESPACEDATASTRUCTURE&NVMCOMMANDSETSPECIFIC................................................................................................35TABLE25–LISTOFIDENTIFYNAMESPACEDATASTRUCTUREFOREACHCAPACITY........................................................................................................36
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1. Product Features § Capacity
- 64, 128GB, 256GB, 512GB1 § Host Interface
- PCIe Gen3 x2 § Nand Flash Type
- 3D TLC § Form Factor / Dimension
- BGA 11.5x13mm § Compliance
- NVMe 1.3 - PCI Express Base 3.1
§ ECC Scheme - LDPC + RAID
§ Power Saving Modes - Support APST - Support ASPM - Support L1.2
§ Estimated Performance - Read up to 1,700MB/s - Write up to 1,10MB/s
§ Power consumption - L1.2 < 2mW
§ Features Supported - End to end data protection - Thermal Throttling - Support HMB - Support TCH OPAL(optional) - Support TCG Pyrite(optional) - Support Three Speed Mode
§ Mode 0_PS0: High speed mode § Mode 1_PS1: Middle speed mode § Mode 3_PS2: Low speed mode
§ Temperature range - Operation:
§ Commercial Grade: 0℃~70℃
§ Industrial Grade: -40℃~85℃ - Storage:
§ -40℃~85℃ § RoHS compliant (for detailed RoHS declaration, please contact your I‘M representative.)
Notes: 1 512GB is under development
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2. Part Number Decoder
IMPB XXXX T46 NE3 C - C ⌴
Intelligent Memory Remarks PCIe BGA Blank = No Remarks
Capacity Operating Temperature 064G = 64GB C = Commercial (0°C to 70°C) 128G = 128GB I = Industrial (-40°C to 85°C) 256G = 256GB
512G = 512GB Package C = BGA 1113 345 balls
Flash Information Reserved
Hardware Information Reserved
Product Part Number NAND Density Type Package Operating Voltage
IMPB064GT26NE3C-C 64GB
Commercial
BGA 345Ball
PWR_1: 2.5V PWR_2: 1.2V PWR_3: 0.9V
IMPB128GT46NE3C-C 128GB
IMPB256GT86NE3C-C 256GB
IMPB512GT86NE3C-C* 512GB
IMPB064GT26NE3C-I 64GB
Industrial IMPB128GT46NE3C-I 128GB
IMPB256GT86NE3C-I 256GB
IMPB512GT86NE3C-I* 512GB Note * 512GB is under development
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3. Product Specification
I’M PCIe BGA product family provides the ideal embedded BGA storage solution for industrial applications, which require high bandwidth, performance, low power consumption and good technical support. I’M BGA SSD integrates newest technology of 3D NAND Flash memory and a sophisticated controller inside a standard package, providing a standard interface to the host. The controller directly manages the NAND flash, implementing functions like bad block management, raw error handling (LDPC Error Correct), cross die error correction (RAID), static and dynamic wear-leveling, IOPS optimization and read sensing. With performance up to 1,700MB/s read as well as 1,100MB/s write, this product is an ideal storage choice for high performance demanding devices. Device Capacity
3.1 Block Diagram
Figure 1 – Block Diagram
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3.2 Device Performance Table 1 – Sequential Performance without HMB(Host Memory Buffer)
Capacity Mode 0_PS0 Mode 1- estimated Mode 2- estimated
Read (MB/s) Write (MB/s) Read (MB/s) Write (MB/s) Read (MB/s) Write (MB/s)
64GB 630 300 <500 <300 >350 TBD
128GB 1,600 600 <650 <400 >350 TBD
256GB 1,700 1,100 <800 <600 >350 TBD
512GB under development, TBD Notes: 1. The test is performed under Win10(64bit) with CrystalDiskMark 6.0, 1GB range, QD=32
2. Performance numbers might be subject to changes without notice.
Table 2 – Sequential Performance with HMB(Host Memory Buffer)
Capacity Mode 0_PS0 Mode 1- estimated Mode 2- estimated
Read (MB/s) Write (MB/s) Read (MB/s) Write (MB/s) Read (MB/s) Write (MB/s)
64GB 630 300 <500 <300 >350 TBD
128GB 1,600 600 <650 <400 >350 TBD
256GB 1,700 1,100 <800 <600 >350 TBD
512GB under development, TBD Notes: 1. The test is performed under Win10(64bit) with CrystalDiskMark 6.0, 1GB range, QD=32
2. Performance numbers might be subject to changes without notice.
Table 3 – Random Performance without HMB(Host Memory Buffer)
Capacity Mode 0_PS0 Mode 1- estimated Mode 2- estimated
Read (IOPS) Write (IOPS) Read (IOPS) Write (IOPS) Read (IOPS) Write (IOPS)
64GB 50K 60 K TBD TBD TBD TBD
128GB 100K 130K TBD TBD TBD TBD
256GB 195 K 245K TBD TBD TBD TBD
512GB under development, TBD Notes: 1. The test is performed under Win10(64bit) with IOMeter, 8GB range, 4K data size, QD=32, 4workers
2. Performance numbers might be subject to changes without notice.
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Table 4 – Random Performance with HMB(Host Memory Buffer)
Capacity Mode 0_PS0 Mode 1- estimated Mode 2- estimated
Read (IOPS) Write (IOPS) Read (IOPS) Write (IOPS) Read (IOPS) Write (IOPS)
64GB 50K 60 K TBD TBD TBD TBD
128GB 100K 130K TBD TBD TBD TBD
256GB 195 K 250K TBD TBD TBD TBD
512GB under development, TBD Notes: 1. The test is performed under Win10(64bit) with IOMeter, 8GB range, 4K data size, QD=32, 4workers
2. Performance numbers might be subject to changes without notice.
3.3 Temperature
Table 5 – Temperature Range
Parameter Grade Range Remark
Operating Temperature
Industrial -40~+85 ℃
Commerical 0~+70 ℃
Storage All -40~+85 ℃
3.4 Power Consumption
Table 6 – Average Power Consumption
Capacity Mode 0_PS0 Mode 1- estimate Mode 2- est.
Read (mW) Write (mW) Read (mW) Write (mW) Read (mW) Write (mW)
64GB 975 790 <1000 <1000 <1000 <1000
128GB 1420 1035 <1000 <1000 <1000 <1000
256GB 1540 1510 <1000 <1000 <1000 <1000
512GB under development, TBD Notes: 1. Use IOmeter with the setting of 1000MB. Sequentially read and write the disk and measure power consumption
during sequential Read and sequential Write 2. Power Consumption may differ according to platforms.
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4. Electrical Specifications
4.1 Supply Voltage Table 7 – Supply Voltage
Parameter Rating
Operating Voltage PWR_1 (P1 2.5V) = 2.45 V to 2.75 V PWR_2 (P2 1.2V) = 1.14 V to 1.26 V PWR_3 (P3 0.9V) = 0.86 V to 0.98 V
Rise Time (Max/Min) 100 ms / 0.1 ms
Fall Time (Max/Min) 5 s / 1 ms
Min. Off Time1 1 s (TBD)
Maximum Ripple 10mV (Peak to peak) Notes: 1. Minimum time between power removed from SSD (Vcc < 100 mW) and power re-applied to the drive.
4.2 Power Consumption Table 8 – Power Consumption at each power state
Capacity PS0 PS1 (Est) PS2 (Est) PS3 (Est) PS4 (Est)
64GB 975 <1000 <1000 15 1
128GB 1420 <1000 <1000 15 1
256GB 1540 <1000 <1000 15 1
512GB under development-TBD
Notes: 1. The test is performed under ambient temperature. 2. The average value of power consumption is achieved based on 100%
conversion efficiency. 3. The temperature of a storage device in PS1 should remain constant or
should slightly decrease for all workloads so the actual power in PS1 should be lower than PS0.
4. The temperature of a storage device in PS2 should decrease sharply for all workloads so the actual power in PS2 should be lower than PS1.
Table 9 – Regulated Power Rail Parameters for BGA SSD Types
Nominal Voltage Voltage Range Platform Rail Type
+ 3.3 V 2.8 V to 3.6 V1 Always on
+ 1.8 V 1.7V to 1.9 V Always on
+ 1.2 V 1.14 V to 1.26 V Always on
+ 1.1 V 1.06 V to 1.17 V Always on
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+ 0.9V 0.86 V to 0.98 V Always on Notes: 1. + 3.3 V tolerance for BGA SSD.
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Figure 2 – Power Diagram Power Saving Description
§ The power states of the is from PS0-PS4. § PS0 and PS4 represent the highest power and lowest power states respectively. § When the BGA SSD is at PS4, our controller will trigger the GPIO pin and it will de-activate the
load switch therefore resulting in the P11 being switched off. § When the power states goes back higher the GPIO switch will activate the load switch therefore
turning the P1* back ON. Pin Assignment
Notes: 1.P1 is the 2.5V NAND core voltage
P2-1.2V
P1-2.5V Load Switch
Controller
NAND flash
NAND flash
NAND flash
NAND flash
GP
IO
P1-2.5V
P2-1.2V
P3-0.9V
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5. Interface
5.1 Pin Assignment and descriptions
Figure 3 – Pin Asignment
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Figure 4 – Pin Asignment(Bottom View)
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5.2 Pin Descriptions Pin Name BGA 345 Pin Type Description IO Voltage
UART/GPIO
XGPIO0 C15 I Debug only 1.8V
XGPIO1_UART_RX D12 I Debug only 1.8V
XGPIO2_SPI_MISO C17 I/O General Purpose Input/output Pins 1.8V
XGPIO3_UART_TX C13 O Debug only 1.8V
XGPIO4_SMB_DATA C11 I/O Debug only 1.8V
XGPIO5_SMB_CLK D11 I/O Debug only 1.8V
XGPIO6_SPI_MOSI C16 I/O General Purpose Input/output Pins 1.8V
XGPIO7_SPI_CS# B18 I/O General Purpose Input/output Pins 1.8V
XGPIO8_SPI_CLK B17 I/O General Purpose Input/output Pins 1.8V
PCIe Interface signals
PERP0 Y7
I/O PCIe TX/RX Differential signals defined by the PCI Express Card Electromechanical Specification.
--
PERN0 Y8
PERP1 Y13
PERN1 Y14
PETP0 Y10
PETN0 Y11
PETP1 AA16
PETN1 AA17
REFCLKP AA4 I PCIe Reference Clock signals (100 MHz) defined by the PCI Express Electromechanical Specification. Card
--
REFCLKN AA5 I --
XPERSTN W4 I PE-Reset is a functional reset to the card as defined by the PCI Express Electromechanical Specification Mini Card
1.8V
XCLKREQB W3 I -- 1.8V
Optional Signals
JTAG_TCK D15 I Refer to JTAG Specification (IEEE 1149.1), Test Access Port and Boundary Scan Architecture for definition of these balls.
1.8V
JTAG_TMS C14 I Debug only 1.8V
FLASH_RZQ L2 -- Flash Calibration REF RESISTENC 1.2V
PLA_S3# D10 O -- 1.8V
PLN# C10 I Power Loss Notification 1.8V
VCC_NAND B5 -- Flash Core Power VDT 2.5V
XPERSTN W4 I General Purpose Input Pins 1.8V
+VDDFD B4 O Flash IO Power 1.2V
+1.8V_LDO B6 Debug only --
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Pin Name BGA 345 Pin Type Description IO Voltage SSD Specific Signals
DAS Y2 O
Open drain, active low signal. This signal is used to allow the Adapter to provide status indication via LED device that will be provided by the system.
3.3V
Power Supply Signals
PWR_1
H18
+2.5 V source
H19
H2
H3
J18
J19
J2
J3
K18
K3
PWR_2
D18
I +1.2 V Source
D19
D2
D3
E18
E19
E2
E3
F18
F19
F2
F3
T18
T19
T2
T3
U18
U19
U2
U3
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Pin Name BGA 345 Pin Type Description IO Voltage Power supply Signals
PWR_3
M18
I +0.9 V source
M3
N18
N19
N2
N3
P18
P19
P2
P3
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Pin Name BGA 345 Description
NC
B16
Not Connect
C12
D13
D14
D17
L19
W17
W18
W19
W2
Y19
Pin Name BGA 345 Description
RFU
C6
Reserved for future use.
C7
C8
C9
D16
D6
D7
D8
D9
W16
Pin Name BGA 345 Description
RFU
A1
Reserved for future use.
A12
A15
A18
A19
A2
A20
A3
A6
A9
GND AA1
Return current path AA12
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Pin Name BGA 345 Description
GND
AA15
Return current path
AA18
AA19
AA2
AA20
AA3
AA6
AA9
AB1
AB12
AB15
AB18
AB19
AB2
AB20
AB3
AB6
AB9
B1
B12
B15
B19
B2
B20
B3
B9
C1
C18
C19
C2
C20
C3
E1
E17
E20
E4
F17
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Pin Name BGA 345 Description
GND
F4
Return current path
G18
G19
G2
G3
G4
H1
H17
H20
J4
K17
K19
K2
L1
L18
L20
L3
L4
M1
M17
M19
M2
M20
N4
P17
R1
R18
R19
R2
R20
R3
R4
T17
U17
U4
V1
V17
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Pin Name BGA 345 Description
GND
V18
Return current path
V19
V2
V20
V3
V4
W10
W11
W12
W13
W14
W15
W5
W6
W7
W8
W9
Y1
Y12
Y15
Y16
Y17
Y18
Y20
Y3
Y4
Y5
Y6
Y9
Pin Name BGA 345 Description
DNU
C4
Do not use. Manufacturing purpose only
C5
D4
D5
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Pin Name BGA 345 Description
HSB
E10
Host specific balls
E11
E12
E13
E14
E15
E16
E5
E6
E7
E8
E9
F10
F11
F12
F13
F14
F15
F16
F5
F6
F7
F8
F9
G10
G11
G12
G13
G14
G15
G16
G17
G5
G6
G7
G8
G9
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Pin Name BGA 345 Description
HSB
H15
Host specific balls
H16
H4
H5
H6
H7
J10
J11
J12
J13
J15
J16
J17
J5
J6
J8
J9
K13
K15
K16
K4
K5
K6
K8
L13
L15
L16
L17
L5
L6 L8
M13
M15
M16
M4
M5
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Pin Name BGA 345 Description
HSB
M6
Host specific balls
M8
N13
N15
N16
N17
N5
N6
N8
P10
P11
P12
P13
P15
P16
P4
P5
P6
P8
P9
R15
R16
R17
R5
R6
T10
T11
T12
T13
T14
T15
T16
T4
T5
T6
T7
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Pin Name BGA 345 Description
HSB
T8
Host specific balls
T9
U10
U11
U12
U13
U14
U15
U16
U5
U6
U7
U8
U9
V10
V11
V12
V13
V14
V15
V16
V5
V6
V7
V8
V9
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6. Package Dimensions
Dimension:11.5 x 13mm(W)
Figure 5 – Package Dimensions
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Figure 6 – Bottom View
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Table 10 – Package Specification
Symbol Dimension in mm
Min. Nom. Max. Total Thickness A ── 0.95 1.00 Stand off A1 0.17 0.22 0.27 Substrate Thickness A2 0.26 0.18 16 Mold Thickness A3 ── 0.55 ──
Body Size D 12.9 13 13.1 E 11.4 11.5 11.6
Ball Diameter(Pre-reflow) 0.3 Ball Opening 0.275 Body Width b 0.25 0.3 0.35 Ball Pitch e 0.5 BSC Ball Count N 345 Edge Ball Center to Center E1 9.5 BSC.
Body Center to Contact Ball SD 0.25 BSC. SE 0.25 BSC.
JEDEC(ref.) MO-276(ref.) Package Edge Tolerance aaa 0.15 Mold Flatness bbb 0.2 Coplanarity ddd 0.08 Ball Offset(Package) eee 0.15 Ball Offset(Ball) fff 0.05
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7. Environmental Specification
7.1 Environmental Conditions 7.1.1 Temperature and Humidity
Table 11 – High Temperature Temperature Humidity
Operation 70℃ 0% RH
Storage 85℃ 0% RH
Table 12 – Low Temperature Temperature Humidity
Operation 0℃ 0% RH
Storage -40℃ 0% RH
Table 13 – High Humidity Temperature Humidity
Operation 70℃ 90% RH
Storage 85℃ 93% RH
Table 14 – Temperature Cycle Temperature
Operation 0℃
70℃1
Storage -40℃
85℃ Notes: 1. Operation temperature is measured by device temperature sensor. Airflow is
suggested and it will allow device to be operated in at appropriate temperature for each component during heavy workloads environment.
7.1.2 Shock
Table 15 – Shock Acceleration Force
Non-operational 1500G
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7.1.3 Vibration Table 16 – Vibration
Condition
Frequency/Displacement Frequency/Acceleration
Non-operational 20Hz~80Hz/1.52mm 80Hz~2000Hz/20G
7.1.4 Drop
Table 17 – Drop Height of Drop Number of Drop
Non-operational 80cm free fall 6 face of each unit
7.1.5 Bending
Table 18 – Bending Force Action
Non-operational ≥ 20N Hold 1min/5times
7.1.6 Torque
Table 19 – Torque Force Action
Non-operational 20Hz~80Hz/1.52mm Hold 1min/5times
7.1.7 Electrostatic Discharge (ESD)
Table 20 – ESD Specification +/- 4KV
EN 55024, CISPR 24 EN 61000-4-2 and IEC 61000-4-2
Device functions are affected, but EUT will be back to its normal or operational state automatically.
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7.1.8 EMI Compliance Table 21 – EMI
Specification
EN 55032, CISPR 32(CE) AS/NZS CISPR 32(CE) ANSI C63.4 (FCC) VCCI-CISPR 32 (VCCI) CNS 13438 (BSMI
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7.2 MTBF MTBF, Mean Time between Failures, is a measure of reliability of a device. Its value represents the average time between a repair and the next failure. The unit of MTBF is in hours. The higher the MTBF value, the higher the reliability of the device. Our MTBF result is based on Telcorida methodology. Please note that a lower MTBF should be expected for higher capacity drives, and we apply the lowest MTBF for all capacities
7.3 Certification & Compliance § RoHS § WHQL § PCI Express Base 3.1 § UNH-IOL NVM Express Logo
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8. Command Sets
8.1 NVMe Command List Table 22 – Commands List
Admin Commands
Opcode Command Description
00h Delete I/O Submission Queue 01h Create I/O Submission Queue 02h Get Log Page 04h Delete I/O Completion Queue 05h Create I/O Completion Queue 06h Identify 08h Abort 09h Set Features 0Ah Get Features 0Ch Asynchronous Event Request 10h Firmware Activate 11h Firmware Image Download 14h Device Self-Test 15h Namespace Attachment 18h Keep Active
NVM Command Set Specific
pcode Command Description 80h Format NVM 81h Security Send 82h Security Receive 84h Sanitize
NVM Commands
Opcode Command Description
00h Flush 01h Write 02h Read 04h Write Uncorrectable 05h Compare 08h Write Zeroes 09h Dataset Management
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Table 23 – Identify Controller Data Structure Bytes O/M Description Default Value 01:00 M PCI Vendor ID (VID) 0x1987
03:02 M PCI Subsystem Vendor ID (SSVID) 0x1987
23:04 M Serial Number (SN) SN
63:24 M Model Number (MN) Model Number
71:64 M Firmware Revision (FR) FW Name
72 M Recommended Arbitration Burst (RAB) 0x01
75:73 M IEEE OUI Identifier (IEEE) 0
76 O Controller Multi-Path I/O and Namespace Sharing Capabilities (CMIC) 0x00
77 M Maximum Data Transfer Size (MDTS) 0x09
79:78 M Controller ID (CNTLID) 0x0000
83:80 M Version (VER) 0x00010300
87:84 M RTD3 Resume Latency (RTD3R) (TBD)
91:88 M RTD3 Entry Latency (RTD3E) (TBD)
95:92 M Optional Asynchronous Events Supported (OAES) 0x00000100
99:96 M Controller Attributes (CTRATT) 0x00000002
111:100 - Reserved 0x00
127:112 O FRU Globally Unique Identifier (FGUID) 0x00
239:128 - Reserved 0x00
255:240 - Refer to the NVMe Management Interface Specification for definition 0
257:256 M Optional Admin Command Support (OACS) 0x0017
258 M Abort Command Limit (ACL) 0x00
259 M Asynchronous Event Request Limit (AERL) 0x03
260 M Firmware Updates (FRMW) 0x12(TBD)
261 M Log Page Attributes (LPA) 0x06
262 M Error Log Page Entries (ELPE) 0x0F
263 M Number of Power States Support (NPSS) 0x04
264 M Admin Vendor Specific Command Configuration (AVSCC) 0x01
265 O Autonomous Power State Transition Attributes (APSTA) 0x01
267:266 M Warning Composite Temperature Threshold (WCTEMP) (TBD)
269:268 M Critical Composite Temperature Threshold (CCTEMP) (TBD)
271:270 O Maximum Time for Firmware Activation (MTFA) 0x0000
275:272 O Host Memory Buffer Preferred Size (HMPRE) Up to 2TB
279:276 O Host Memory Buffer Minimum Size (HMMIN) 3KB per 1GB
295:280 O Total NVM Capacity (TNVMCAP) non-zero
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Bytes O/M Description Default Value 311:296 O Unallocated NVM Capacity (UNVMCAP) 0
315:312 O Replay Protected Memory Block Support (RPMBS) (TBD)
317:316 O Extended Device Self-test Time (EDSTT) 0x001E
318 O Device Self-test Options (DSTO) 0x01
319 M Firmware Update Granularity (FWUG) 0x1
321:320 M Keep Alive Support (KAS) 0x0001
323:322 O Host Controlled Thermal Management Attributes (HCTMA) 1
325:324 O Minimum Thermal Management Temperature (MNTMT) (TBD)
327:326 O Maximum Thermal Management Temperature (MXTMT) (TBD)
331:328 O Sanitize Capabilities (SANICAP) 0x00000006
511:316 - Reserved 0
NVM Command Set Attributes
Bytes O/M Description Default Value 512 M Submission Queue Entry Size (SQES) 0x66
513 M Completion Queue Entry Size (CQES) 0x44
515:514 M Maximum Outstanding Commands (MAXCMD) 0x0080
519:516 M Number of Namespaces (NN) 0x000000001
521:520 M Optional NVM Command Support (ONCS) 0x005F
523:522 M Fused Operation Support (FUSES) 0
524 M Format NVM Attributes (FNA) 0x01
525 M Volatile Write Cache (VWC) 0x01
527:526 M Atomic Write Unit Normal (AWUN) 0x00FF
529:528 M Atomic Write Unit Power Fail (AWUPF) 0x0000
530 M NVM Vendor Specific Command Configuration (NVSCC) 0x01
531 M Reserved 0x00
533:532 O Atomic Compare & Write Unit (ACWU) 0x0000
535:534 M Reserved 0x0000
539:536 O SGL Support (SGLS) 0x0000000000
767:540 M Reserved 0x00
IO Command Set Attributes
Bytes O/M Description Default Value 2047:704 M Reserved (TBD)
2079:2048 M Power State 0 Descriptor (TBD)
2111:2080 O Power State 1 Descriptor (TBD)
2143:2112 O Power State 2 Descriptor (TBD)
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Bytes O/M Description Default Value 2175:2144 O Power State 3 Descriptor (TBD)
2207:2176 O Power State 4 Descriptor (TBD)
… - (N/A) 0
3071:3040 O Power State 31 Descriptor (TBD)
Vendor Specific
Bytes O/M Description Default Value 4095:3072 O Vendor Specific (VS Reserved
Table 24 – Identify Namespace Data Structure & NVM Command Set Specific
Bytes Description 07:00 Namespace Size (NSZE)
15:08 Namespace Capacity (NCAP)
23:16 Namespace Utilization (NUSE)
24 Namespace Features (NSFEAT)
25 Number of LBA Formats (NLBAF)
26 Formatted LBA Size (FLBAS)
27 Metadata Capabilities (MC)
28 End-to-end Data Protection Capabilities (DPC)
29 End-to-end Data Protection Type Settings (DPS)
30 Namespace Multi-path I/O and Namespace Sharing Capabilities (NMIC)
31 Reservation Capabilities (RESCAP)
32 Format Progress Indicator (FPI)
33 Deallocate Logical Block Features (DLFEAT)
35:34:00 Namespace Atomic Write Unit Normal (NAWUN)
37:36:00 Namespace Atomic Write Unit Power Fail (NAWUPF)
39:38:00 Namespace Atomic Compare & Write Unit (NAWWU)
41:40:00 Namespace Atomic Boundary Size Normal (NABSN)
43:42:00 Namespace Atomic Boundary Offset (NABO)
45:44:00 Namespace Atomic Boundary Size Power Fail (NABSPF)
47:46:00 Namespace Atomic Optimal IO Boundary (NOIOB)
63:48:00 NVM Capacity (NVMCAP)
103:64 Reserved
119:104 Namespace Globally Unique Identifier (NGUID)
127:120 IEEE Extended Unique Identifier (EUI64)
131:128 LBA Format 0 Support (LBAF0)
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135:132 LBA Format 1 Support (LBAF1)
Bytes Description
139:136 LBA Format 2 Support (LBAF2)
143:140 LBA Format 3 Support (LBAF3)
147:144 LBA Format 4 Support (LBAF4)
151:148 LBA Format 5 Support (LBAF5)
155:152 LBA Format 6 Support (LBAF6)
159:156 LBA Format 7 Support (LBAF7)
163:160 LBA Format 8 Support (LBAF8)
167:164 LBA Format 9 Support (LBAF9)
171:168 LBA Format 10 Support (LBAF10)
175:172 LBA Format 11 Support (LBAF11)
179:176 LBA Format 12 Support (LBAF12)
183:180 LBA Format 13 Support (LBAF13)
187:184 LBA Format 14 Support (LBAF14)
191:188 LBA Format 15 Support (LBAF15)
383:192 Reserved
4095:384 Vendor Specific (VS)
Table 25 – List of Identify Namespace Data Structure for Each Capacity
Capacity (GB)
Byte[7:0]: Namespace Size (NSZE)
64 7740AB0h
128 EE7C2B0h
256 1DCF32B0h
512 3B9E12B0h
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9. Management
9.1 Flash Management 9.1.1 Error Correction Code (ECC)
Flash memory cells will deteriorate with use, which might generate random bit errors in the stored data. Thus, IMPBxxxGT46NE3C PCIe SSD applies LDPC (Low Density Parity Check) of ECC algorithm, which can detect and correct errors occur during read process, ensure data been read correctly, as well as protect data from corruption.
9.1.2 Wear Leveling NAND flash devices can only undergo a limited number of program/erase cycles, when
flash media is not used evenly, some blocks get updated more frequently than others and the lifetime of device would be reduced significantly. Thus, wear leveling is applied to extend the lifespan of NAND flash by evenly distributing write and erase cycles across the media.
IMPBxxxGT46NE3C adopts Advanced wear leveling algorithm, which can efficiently spread out the flash usage through the whole flash media area. Moreover, by implementing both dynamic and static wear leveling algorithms, the life expectancy of the NAND flash is greatly improved.
9.1.3 Bad Block Management Bad blocks are blocks that do not function properly or contain more invalid bits causing
stored data unstable, and their reliability is not guaranteed. Blocks that are identified and marked as bad by the manufacturer are referred to as “Early Bad Blocks”. Bad blocks that are developed during the lifespan of the flash are named “Later Bad Blocks”. IMPBxxxGT46NE3C implements an efficient bad block management algorithm to detect the factory-produced bad blocks and manages bad blocks that appear with use. This practice prevents data being stored into bad blocks and further improves the data reliability.
9.1.4 TRIM TRIM is a feature which helps improve the read/write performance and speed of solid
state drives (SSD). SSDs are not able to overwrite existing data, so the available space gradually becomes smaller with each use. With the TRIM command, the operating system can inform the SSD so that blocks of data that are no longer in use can be removed permanently. Thus, the SSD will perform the erase action, which prevents unused data from occupying blocks at all time.
9.1.5 SMART SMART, an acronym for Self-Monitoring, Analysis and Reporting Technology, is an open
standard that allows a solid state drive to automatically detect its health and report potential failures. When a failure is recorded by SMART, users can choose to replace the drive to prevent unexpected outage or data loss. Moreover, SMART can inform users impending failures while there is still time to perform proactive actions, such as save data to another device.
9.1.6 Over-Provision Over Provisioning refers to the preserving additional area beyond user capacity in a SSD,
which is not visible to users and cannot be used by them. However, it allows a SSD controller to utilize additional space for better performance and WAF. With Over Provisioning, the performance and IOPS (Input/Output Operations per Second) are improved by providing the controller additional space to manage P/E cycles, which enhances the reliability and
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endurance as well. Moreover, the write amplification of the SSD becomes lower when the controller writes data to the flash.
9.1.7 Firmware Upgrade Firmware can be considered as a set of instructions on how the device communicates
with the host. Firmware will be upgradable when new features are added, compatibility issues are fixed, or read/write performance gets improved. IMPBxxxGT46NE3C has its own secure firmware. The firmware codes are all RSA signed and are checked by download and boot ROM. Any unauthorized firmware cannot be loaded into our SSD.
9.1.8 Thermal Throttling The purpose of thermal throttling is to prevent any components in a SSD from over-
heating during read and write operations. IMPBXXXGT46NE3C is designed with an on-die thermal sensor and with its accuracy, firmware can apply different levels of throttling to achieve the purpose of protection efficiently and proactively via SMART reading.
9.2 Device Security Features 9.2.1 Secure Erase
Secure Erase is a standard NVMe format command and will write all “0xFF” to fully wipe all the data on hard drives and SSDs. When this command is issued, SSD controller will erase its storage blocks and return to its factory default settings.
9.3 SSD Lifetime Management 9.3.1 Terabytes Written (TBW)
TBW (Terabytes Written) is a measurement of SSDs’ expected lifespan, which represents the amount of data written to the device. To calculate the TBW of a SSD, the following equation is applied:
TBW = [(NAND Endurance) x (SSD Capacity)] / [WAF] NAND Endurance: NAND endurance refers to the P/E (Program/Erase) cycle of a NAND flash. SSD Capacity: The SSD capacity is the specific capacity in total of a SSD. WAF: Write Amplification Factor (WAF) is a numerical value representing the ratio between the amount of data that a SSD controller needs to write and the amount of data that the host’s flash controller writes. A better WAF, which is near 1, guarantees better endurance and lower frequency of data written to flash memory.
TBW in this document is based on JEDEC 218/219 workload. 9.3.2 Media Wear Indicator
Actual life indicator reported by SMART Attribute byte index [5], Percentage Used, recommends User to replace drive when reaching to 100%.
9.3.3 Read Only Mode (End of Life) When drive is aged by cumulated program/erase cycles, media worn-out may cause
increasing numbers of later bad block. When the number of usable good blocks falls outside a defined usable range, the drive will notify Host through AER event and Critical Warning to enter Read Only Mode to prevent further data corruption. User should start to replace the drive with another one immediately.
9.4 Adaptive Approach to Performance Tuning 9.4.1 Throughput
Based on the available space of the disk, IMPBXXXGT46NE3C will regulate the read/write speed and manage the performance of throughput. When there remains a lot of space, the firmware will continuously perform read/write action. There is still no need to
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implement garbage collection to allocate and release memory, which will accelerate the read/write processing to improve the performance. Contrarily, when the space is going to be used up, IMPBXXXGT46NE3C will slow down the read/write processing, and implement garbage collection to release memory. Hence, read/write performance will become slower.
9.4.2 Predict & Fetch Normally, when the Host tries to read data from the PCIe SSD, the PCIe SSD will only
perform one read action after receiving one command. However, IMPBXXXGT46NE3C applies Predict & Fetch to improve the read speed. When the host issues sequential read commands to the PCIe SSD, the PCIe SSD will automatically expect that the following will also be read commands. Thus, before receiving the next command, flash has already prepared the data. Accordingly, this accelerates the data processing time, and the host does not need to wait so long to receive data.
9.4.3 SLC Caching IMPBxxxGT46NE3C firmware design currently adopts dynamic caching to deliver better
performance for better
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Revision History
Revision Descriptions Release Date
0.1 Preliminary Apr, 2019
0.2 Add performance and power consumption information May, 2019
0.3 Add capacity 64GB Nov, 2019
0.4 Revise part number decoder Apr, 2020