Two-Phase Microchannel Heat Sinks for an Electrokinetic VLSI Chip Cooling System

Linan Jiang, Jae-Mo Koo, Shulin Zeng, James C. Mikkelsen, Lian Zhang, Peng Zhou, Juan G. Santiago, Thomas W. Kenny, Kenneth E. Goodson Department of Mechanical Engineering, Stanford University

James G. Maveety, Quan A. Tran Intel Corporation Components Research Laboratory

Abstract The trend towards higher speed and greater integration of

modem ICs requires improved cooling technology. This paper describes the design and characterization of a two-phase microchannel heat sink in an electrokinetic VLSI chip cooling system. The heat sink achieves a thermal resistance of 1 WW for a 1.2 cm x 1.2 cm silicon thermal test chip under an open- loop operation with a water flowrate of 5 ml/min. Preliminary tests show that a closed-loop EK-pumped system running at 1.2 mumin and 12 psi removes 17.3 W, with heat rejection at an aluminum fin array. Further optimization of the microchannel dimensions and the operating pressure of the working fluid are expected to lower the resistance below 0.25 WW.

Keywords: Elelectrokinetic pump, microchannel heat sinks, twe

phase heat transfer, IC cooling technology

Introduction The total power and power density per unit surface area of

VLSI chips are increasing. According to the International Roadmap for Semiconductors, which provides conservative estimates, chip power densities will be more than 25 W/cd by the year 2005 [l]. There are a variety of attractive techniques for high-performance IC heat removal based on liquid-vapor loops, including spray cooling loops, two-phase microchannel loops, thennosyphons, and heat pipes. Among these alternatives, microchannel heat sinks are attractive because they are extremely compact and do not interfere with multi-chip integration. However, twephase microchannel cooling may not provide the lowest thermal resistance, motivating research on optimizing the performance.

Microchannel heat sinks have received attention since the early 1980's. Tuckerman and Pease [2] demonstrated that a silicon microchannel heat sink with channel crosssectional dimensions of 50 pm x 300 pm can remove 790 W/cm2 with forced convective water at a substrateto-coolant temperature difference of 7 1 K. However, this singlephase liquid cooling requires a water flowrate exceeding 500 ml/min and achieves relatively poor temperature uniformity. Twephase boiling flow in microchannels promises comparable or better performance at much lower flowrates with improved temperature uniformity. Bowers and Mudawar [3] reported that microchannels with hydraulic diameter of 5 1 Opm yielded 28% higher critical heat flux (CHF) than minichannels with hydraulic diameter of 2.45 mm with water flowrate of 64 mumin. Peng et uf [4] suggested that nucleate boiling was

intensified in microchanenls with dimensions of 600 pm x

700 pm. Stanley et al. [5 ] conducted two-phase flow experiments in rectangular channels with hydraulic diameters between 56 pm and 256 pm using mixed inert gases and liquid water. A homogeneous flow model was proposed, based on the pressure drop and conductance data, in which the liquid and gas flow velocities are identical. Jiang et a1 [6] integrated a heater and micro temperature sensors on a silicon microchannel heat sink to investigate twephase heat transfer. These authors found that the CHF increased linearly with increasing flowrate in channels with hydraulic diameters of 40 pm and 80 pm. Power densities of more than 20 W/cm* were removed at a water flowrate of 5 mVmin for a heat sink with 34 channels with hydraulic diameter of 80pm. Zhang et a1 [7] developed a single microchannel with nearlpconstant heat flux boundary condition and integrated temperature sensors and heaters. The channel hydraulic diameter was in the range of 30 pm to 60 pm. Based on the experimental data of Zhang et af [7], Koo et a1 [SI develop a two-phase heat transfer model in microchannels and predicted that two-phase flow in microchannels with hydraulic diameter of 170pm can remove heat power of 30 W/cm2 with 5 ml/min water flowrate.

For space-critical desktop and portable applications, a practical closed-loop microchannel cooling system requiers a compact, highly reliable, and efficient pump, in order to minimize the manufacturing and maintainence cost of the cooling system. High pressure delivery is also required for two-phase microchannel applications because of the increasing contributions of acceleration and viscous to the total pressure drop due to the narrow hydraulic diameters. This motivates the development of electrokinetic pumps, which use electroosmosis to propel the liquid and are extremely compact for a given flowrate, have no moving parts, and are well suited for delivery of large pressures. Zeng et a1 [9] developed an electrokinetic pump (EK pump) with working volume of 1.4 cm' delivering 0.5 mVmin water flowrate with 12 psi operating at 750 V. At present the disadvantages of EK pumps are the large operating voltage and the relatively low flowrates. However, EK pumps have not previously been optimized for VLSI cooling applications, and further progress is anticipated on increasing the flowrate, reducing the operating voltage, and developing alternative dielectric working liquids.

This manuscript presents the design and characterization of a two-phase microchannel heat sink for applications in VLSI chips cooling. The microchannel heat sink is tested under an open-loop condition using a syringe pump with flow-rates comparable to an EK pump. The feasibility of the

0-7803-6649-2/01/$10.00 02001 IEEE 153 Seventeenth IEEE SEMI-THERM Symposium

closed-loop EK-pump system is demonstrated using a silicon microchannel heat sink and a finneckaluminum heat rejection structure.

Structure Heat exchanger

Heat Sink Design and Fabrication Our past research has developed a practical modeling

approach for two-phase microchannel heat sinks [8], which integrates approximate 1-D energy equations for both the silicon walls and the evaporating fluid. The simulation [8] accounts for thermal conductance to the ambient air, and the temperature and pressure dependence of fluid properties. It also assumes homogeneous flow conditions in the channel. Figure 1 is the physical schematic of the flow regimes in a microchannel used in [SI. Based on flow visualization studies in the literature [4-71, the calculations in [SI assume a very rapid transition from purely-liquid phase flow to a misty liquid-vapor two-phase flow. The bubbly-flow and plug-flow regimes, known to exist in conventional channels, are assumed to be absent in microchannels.

Dimension 20 mm x 29 mm x 500 pn (width x length x thickness)

. .

Channel geometry

No. of channels InleVoutlet manifold

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

100 pm x 100 pm x 15 mm (width x depth x length) 40 (with pitch of 350pm) lmm x 100 pm x 1 mm (width x depth x length)

. . . . . .

I A I B I C I D I Liquid Flow Annular flow Vapor

eruption

Figure 1: A physical schematic of the flow regimes in a microchannel.

The simulation [8] has been verified using experimental data obtained in a dedicated single-channel microchannel test structure with nearly-constant heat flux boundary conditions [7]. The simulations have also been extended for the design optimization of multichannel heat sinks in an EK-pumped cooling system. The design parameters, such as the geometry of the microchannels and the number of the channels, are optimized for the dissipation of 20 W/cm2, using two-phase forced convection. The liquid flowrate of the heat sink is less than 5 mumin, with a pressure of less than 20 psi. The optimized overall schematic geometry of the heat sink is plotted in Fig. 2. The predicted optimal heat sink dimensions are listed in Table 1. Thermal resistance is estimated to be less than 0.25 WW under optimized operating conditions.

The microchannel heat sinks are fabricated using deep reactive ion etching (DRIE) in a standard <loo> silicon substrate followed by anodic bonding of the silicon wafer to a 500 p n thick Pyrex 7740 glass (Coming). Two pre-drilled holes serve as the inlet and outlet of the working fluid. The silicon heat sink is aligned and attached at the backside of the IC chip using a thermal grease with a thermal conductivity of 1.1 Wm-IK-' and working temperature greater than 200 OC.

29 mm

15 mm

In1

L'Jcl---.'c- I5 m m

1 mm

Figure 2: A schematic of the microchannel heat sink.

Experimental procedure Figure 3 shows the setup for two-phase heat transfer

experiments on a microchannel heat sink using DI water as the working fluid with an ambient temperature of 23'C. The thermal test chip (provided by Intel Corporation) has a integrated heater and temperature sensors. Two ceramic adapters are attached to the heat sink at the inlet and outlet access holes. Each adapter is, in turn, connected to a flow tube. The inlet of the heat sink is connected to a mechanical pump supplying liquid water while the outlet of the heat sink is open to the ambient. The pressure drop across the heat sink is measured using a pressure sensor at the inlet and the water flowrate is recorded using a volumetric graduator at the outlet.

graduator Pressure sensor

\ (+) ( - )

Figure 3: Experimental set-up.

154 Seventeenth IEEE SEMI-THERM Symposium

Results and discussions Figure 4 plots the dependence of the chip temperature rise

on the input power under various conditions. The temperature increases steeply with the input power in the absence of the heat sink, indicating a high junction to ambient thermal resistance. The chip temperature rise is 100 K for 4 W with the heat sink attached, without forced convection (QFO). The corresponding thermal resistance is 25 WW.

200

180 vdo heat sink

0 I Q p W m i n

40 Q,=O Q,-2mVnin

0 10 20 30 40 Input PoHlsr

Figure 4: Dependence of wall temperature on input power.

The chip temperature decreases when water flows through the channels. A linear increase of chip temperature with increasing input power is observed when the fluid is purely in the liquid phase, with liquid flowrates of Q i 2 mYmin and Q,=S mumin. The thermal resistances are found to be 5.7 WW and 2.7 WW for Q 7 2 mumin and QFS mumin, respectively. The results show that the junction to ambient thermal resistance can be reduced greatly using forced convection in microchannels, and can be further reduced by increasing the flowrate.

Two-phase occurs in the microchannels at higher input power levels. A periodic temperature oscillation is observed when two-phase flow develops in the channels, with upper and lower bounds depicted in Fig. 4. The time-averaged chip temperature rise is several degrees higher than 80 K for both conditions of Q,=2 mumin and Q,=S mYmin. The thermal resistance is estimated to be 1 WW when the flow is under two-phase conditions, regardless of the flowrate. However, the transient temperature oscillates in a range of 60 K and the chip temperature rise can be higher than 130 K. This high temperature rise could induce the dryout in the microchannels, resulting in the thermal failure of the IC chip.

The corresponding pressure dependence on the input power is shown in Fig. 5, for the conditions of Q,=2 mumin and Q,=S mumin. Under singleliquid-phase conditions, the pressure decreases with the increasing power since the viscosity of water decreases with the increasing temperature. Starting at the onset of two-phase flow, the pressure drop increases rapidly with increasing input power due to the acceleration of the fluid due to phase change. Periodic pressure oscillation is also observed after the two-phase flow develops in the channels. Pressure drop for two-phase flow is several to ten times higher than that of the single-liqui&phase. It is suspected that the rapid increase of the pressure during phase change is enhanced during the higher flow resistance induced by the small channel size. Moreover, the fluid saturation temperature changes greatly with the pressure. Therefore, the high pressure during the phase change results in a high saturation temperature greater than the fluid temperature. This leads to the condensation of the vapor phase, and the drop of the pressure.

10.0 Ql=SmUmin c

i Q I =2mUmin

room temperature: 23C inlet water temperature: 2Ot

0.1 ' . . " ' ' . . ' ' . ' . " ' * '

0 10 20 30 40 Input Power

Figure 5. Dependence of the pressure drop on input power.

The calculated chip temperature rise and the pressure for different input power of the heat sink are compared with the measurements, as shown in Fig. 6. Reasonable agreement is obtained for both the temperature and pressure predictions when the fluid is purely in the liquid phase. However, the model can only estimate time-averaged chip temperature and pressure under two-phase conditions since it is based on stable state assumption.

155 Seventeenth IEEE SEMI-THERM Symposium

6.0 140

/ ' ,' 120

symbols with dotted iinar experimental data solid lines prediction by model m

4.0

c. B p 3.0

% t z 2.0

t a

- 0

1 .o

0.0

100 g 0) . m -

80 e 60 f

40 $

*

P

20

0 0 6 10 16 20 26

Input Power [wl

Figure 6: Comparison of calculations with measurements.

Proposed closed-loop system The experiments described in Fig. 4 and 5 are performed

using a syringe pump and an openloop configuration. To demonstrate the feasibility of a closed-loop EK-pumped system, this work integrates a twephase microchannel heat sink with an EK-pump and a finned-aluminum condenser. Figure 7 is a conceptual schematic and Fig. 8 is a picture of the experimental closed-loop system. An EK-pump device consists of silica particles of diameters near 3.5 micrometer restrained using two polymerized frits and an acrylic chamber. The pump is an array of two parallel EK devices providing 1.2 mVmin, 12 psi gauge pressure, with a total working volume of 1.4 cm'.

1 I . 1 -t

1:- I I Packaging

Figure 7. A conceptual schematic of the proposed EK cooler.

Downstream of the hightemperature heat sink, the two- phase fluid is collected and fed through a condenser to cool the fluid upstream of the pump n liquid phase. The condenser can be operated with or without a fan to diminish the thermal impedance. With a fan power of 1.56 W, the thermal impedance of the heat rejection heat exchanger is 0.35 WW, and 1.1 WW without the fan. The flow impedance for

156

the liquid phase in the condenser is 7 x 10" atm/(ml/min). The cooled fluid exiting from the condenser is pumped back into the heat sink forming a closed flow loop. For present testing of the closed-loop system, a thermal test chip with a 2 cm x 2 cm heated area and 40 microchannels of 100 pm in width, 40 pm in depth and 20 mm in length is used. The feasibility demonstration removes 17.3 W under steady conditions from a 2 cm x 2 cm silicon chip with an average temperature rise of 84 K.

Figure 8. An image of the closed-loop cooling system.

Concluding Remarks Despite the high thermal resistance achieved in the

closed-loop EK micro cooler experiments, the results have demonstrated that an ultra-compact EK system is feasible. Improvements in thermal resistance and total heat removal capability are anticipated as the pump technology evolves.

The temperature and pressure oscillations illustrated in Fig. 4 cause much higher maxima in the chip temperature and microchannel pressure than the predictions of the stable state model, showing that transient modeling is needed. We believe that the oscillations can be overcome through the use of a feedback loop, in which the pump pressure is governed by the chip temperature. This hypothesis is the subject of ongoing work.

Much process can be done on the optimization of the EK pumps for higher flowrates, the microchannel heat sink dimensions and operating pressure of the working fluid to lower the thermal resistance and to minimize the instability of the system.

Acknowledgments

and by the Semiconductor Research Corporation. This work is supported by DARPA HERETIC Program

Seventeenth IEEE SEMI-THERM Symposium

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2.

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