Download - F-14 “Tomcat” Microprocessor Chip Set Ray Holt ©Copyright 1998-2011 Ray M. Holt ALL RIGHTS RESERVED
F-14 “Tomcat”F-14 “Tomcat”Microprocessor Chip SetMicroprocessor Chip Set
Ray Holt
©Copyright 1998-2011 Ray M. Holt ALL RIGHTS RESERVED
Available DocumentsAvailable Documents
• FirstMicroprocessor.com First revealed in 1998 (30 year secret)
Design notebook (excerpts)
This slide show
Original design paper – 1971
(approved by IEEE Computer Design Magazine in 1970)
“Analysis” paper – 1998
Wall Street Journal article
Electronic Business article
Smithsonian Museum Air & Space Magazine
“From Dust to the Nano Age” Leo Sorge
Technology Education in Rural Mississippi
• Robotics
• Web Page Design
• Intro to Logic Design
• Intro to Computers
• PowerPoint
37 students
Ages 10 -17
Mt Olive, MS
Mississippi RuralEducation Consortium
• Started Statewide in 2010
• 28 university professors & rural educators
Robotics & Engineering Education/Research Center
• Reduce dropout rateIncrease ACT test scoresIncrease college attendanceMotivate new engineers
Forestry to Cal PolyForestry to Cal Poly
• University of Idaho Forestry Major & R.O.T.C. Army Ranger Unit
Junior ready to graduate – took
Physics of Electricity at Dean's request
Forestry to Cal PolyForestry to Cal Poly
• Cal Poly Pomona Electronic Engineering Major
Tubes to transitors
Junior year: took Switching Theory as elective
Cal Poly to F-14Cal Poly to F-14
• Garrett AiResearch Engineering Hired to design amplifiers for aircraft audio Only one in department with computer class
Special project: Mechanical – Electronic Computer
Microcomputer HistoryMicrocomputer History
2000's• Multi-core processors• Flash drives• Terabyte portable drives• USB interface everywhere• ipod/ipad type devices• Smart phones: email, internet, wifi,
hot spots, apps
Microcomputer HistoryMicrocomputer History
1990's• Embedded processors• Pentiums 100Mhz – 3Ghz+ • 486’s 30Mhz – 100Mhz• 386 10Mhz – 50Mhz• Windows• MS Office (Word, PowerPoint, etc.)
Microcomputer HistoryMicrocomputer History
1980’s• 286’s 4Mhz – 20Mhz • IBM PC introduced (1981)
Time “Man of the Year”• DOS Operating System• Wordstar Word Processor• Lotus 1-2-3 Spreadsheet
Microcomputer HistoryMicrocomputer History
1970’s• 1977 - Radio Shack TRS-80• 1977 - Commodore Pet• 1977 - Apple I / KIM / SYM• 1975 - Intel 8080 CPU• 1975 - Microsoft Basic / Altair / Jolt• 1973 - CP/M Operating System• 1972 - Intel 4004 CPU
Microcomputer HistoryMicrocomputer History
1968• Apollo 7 & 8 Launched• Intel Founded• IBM 8” Floppy Drive• Bill Gates turned 13• F-14 Microprocessor design started
Make A New
Integrated Circuit Computer
From A
ElectromechanicalComputer
The Big ChallengeThe Big Challenge
F4 Phantom CADCF4 Phantom CADC
United States NavyUnited States Navy
F-14 “Tomcat” Fighter jet
Companies InvolvedCompanies Involved
Prime Contractor:
Grumman AircraftSubContractor:
Garrett AiResearchIntegrated Circuits:
American MicroSystems
The TeamThe Team
2 – Computer Logic Designers3 – High-level Programmers
4 – Analog Designers1 – Mathematician
1 – Test / Mfg Engineer3 – Electronic Technicians
2 – Draftsmen4 – Managers
5 – Integrated Circuit Engineers(American MicroSystems)
What Did We Do?What Did We Do?
Designed and Developed
A
Central Air Data Computer
(CADC)
Started: June 1968
Completed: June 1970
1st Flight: Dec 21, 1970
Design Time FrameDesign Time Frame
1st Flight1st Flight
December 21, 1970
F-14 “Tom Cat” CADCF-14 “Tom Cat” CADC
Dual Redundant
• 2 - computers
• 2 - power supplies
• 4 - quartz sensors
• 2 - sets A/D and D/A
F-14 AircraftF-14 AircraftIncentive / PenaltiesIncentive / Penalties
• $440,000 each 100 lbs overweight
• $440,000 for each second slow
• $1M for each 10 miles short escort radius
• $1M for each knot fast on carrier landing
• $450,000 for each extra maintenance hour
• $5,000 for each day late
F-14 AircraftF-14 AircraftSuccessesSuccesses
• on time• on cost• under weight - 6/10th of one percent• better performance than expected• 1st flight one month ahead of schedule• demonstrated operational in 1/2 the time• 712 F-14’s made, 478 (F-14A’s, 100-Iran)
Computer (CADC)Computer (CADC)Design ConstraintsDesign Constraints
• Size: 40 sq inches for microprocessor• Power: 10 watts• Cost: $3,000-$5,000• Temperature: -55 to +125 deg C• Provide data for control & firing of 6 Phoenix
/ Sidewinder missiles at the same time• Others: Acceleration, mechanical shock,
reliability, project schedule
F-14 In-FlightF-14 In-Flight
• Three minute YouTube Video http://www.youtube.com/watch?v=yhyprrof0JM
• Observe the various positions of the wings. They are 100% computer controlled.
• Observe the dynamic flow of air across the plane. The computer is constantly correcting for stability.
• When there is a cloud formation around the plane it is breaking the sound barrier (the Danger Zone)
What Is A C.A.D.C.?What Is A C.A.D.C.?
A Flight Computer to:
• compute and display– altitude– air speed– vertical speed– mach number– temperature
A Flight Computer to:
• compute and control
– wing speed, position, and rate
– maneuver flap position
– glove vane position
– angle of attack correction
A Flight Computer to:
• provide other critical flight information
– real-time data to other systems
(weapons and communications)
– in-flight self-diagnostics
– redundant switchover to dual system
State-of-the-ArtState-of-the-Art in 1968? in 1968?
The Technology
TTL Bipolar - high power
MOS logic modules - too many packages
LSI - new, not proven
CADC Block DiagramCADC Block Diagram
Microprocessor Arithmetic Microprocessor Arithmetic FunctionsFunctions
• Arithmetic functions
• Logical functions
• Inputs (switches, A/D’s)
• Outputs (lights, D/A’s)
• Self Test Diagnostics
MicroprocessorMicroprocessorSelf Test FunctionsSelf Test Functions
• In-Flight Diagnostics
– 100% of all connections/data paths– 100% of all ROM bits– 100% non-arithmetic circuits– 98% all arithmetic unit single failures– dual redundant system– pilot notification
RequiredRequiredArithmetic CalculationsArithmetic Calculations
6th Order Polynomials F(x) = a6x6+a5x5 +a4x4 +a3x3 +a2x2 +a1x1+a0
x = input from sensors or stored values
We implemented using Horner’s Rule
F(x) = (- - - ((a0 x + a1) x + a2) x + - - -
MicroprocessorMicroprocessorData StructureData Structure
Number System
• fractional fixed point computation
• two’s complement arithmetic
• 20 bit data length (based on flight requirements)
MicroprocessorMicroprocessorTechnologyTechnology
• high level of integration - P Channel MOS
• minimum package and lead count
• lowest possible power
• mil spec temp range -55C to +125C
MicroprocessorMicroprocessorDesign DecisionsDesign Decisions
• serial instruction and data transfer
• distributive instruction command
• ‘pipeline’ instruction and arithmetic
• ROM master/slave instructions
• ROM built-in counter and conditional jump
MicroprocessorMicroprocessorF-14 System DiagramF-14 System Diagram
MicroprocessorMicroprocessorSystem TimingSystem Timing
• 375Khz Clock, 2.66 us bit time
• One word = 20 bit times or 53.3 us
• Operation time - two words
• 512 Op times - computational Cycle
• 18.3 Cycles per second
• 9370 Op times per second for each
computational unit
MicroprocessorMicroprocessorFunctional UnitsFunctional Units
• Parallel Multiplier Unit (PMU)
• Parallel Divider Unit (PDU)
• Special Logic Function (SLF)
• Data Steering Unit (SLU)
• Random Access Storage (RAS)
• Read-Only Memory Unit (ROM)
Computational Computational RequirementsRequirements
Req/Sec Max/CU
• Multiply (20-bit) 5490 9370• Divide (20-bit) 1922 9370• Add/Sub (20-bit) 293 9370• Limits Comparisons 1373 9370 • Square Roots 73 *• Logical And/Or 26 *• IF Transfers 72 9370• Discrete inputs/output 842 9370• A/D and D/A I/O 695 9370
Microprocessor Chip Set Microprocessor Chip Set PMU FunctionsPMU Functions
• 20-bit parallel multiplier
• three internal storage registers
• ‘pipelined’ overlap I/O and operation
• Booth’s multiply algorithm
• 53.3 μs multiply / 53.3 μs transfer
• continuous operation
PMU
Microprocessor Chip Set Microprocessor Chip Set PDU FunctionsPDU Functions
• 20-bit parallel divider
• three internal storage registers
• ‘pipelined’ overlap I/O and operation
• Non-restoring division algorithm
• 53.3 μs divide / 53.3 μs transfer
• continuous operation
PDU
Microprocessor Chip Set Microprocessor Chip Set SLF FunctionsSLF Functions
• logical and arithmetic operations
• Gray code conversions
• three internal storage registers
• ‘pipelined’ overlap I/O and operation
• 53.3 μs multiply / 53.3 μs transfer
• 4-bit instruction word
SLF
Microprocessor Chip Set Microprocessor Chip Set SLU FunctionsSLU Functions
• three channel digital data multiplexer
• 16 inputs - 3 channels out
• four inputs combined for arithmetic
operations
• 53.3 μs operation / 53.3 μs command
• 15-bit instruction word
SLU
Microprocessor Chip Set Microprocessor Chip Set RAS FunctionsRAS Functions
• sixteen 20-bit static registers
• random access read-write storage
• 53.3 μs I/O time
• 5-bit instruction word
RAS
Microprocessor Chip Set Microprocessor Chip Set ROM FunctionsROM Functions
• 2560-bit random access/sequential access
fixed memory - 128 words x 20-bits
• can parallel eight ROM’s for 1024 words
• program counter - cleared / +- increment /
hold / external
• data out / parity out
• 20-bit instruction word
ROM
Microprocessor Microprocessor Technology Spec’sTechnology Spec’s
CHIP DEVICES SIZE PKG # USED TOTAL
PMU 1063 150 x 153 24 pin 1 1063
PDU 1241 141 x 151 24 pin 1 1241
SLF 743 120 x 130 24 pin 1 743
SLU 771 128 x 133 24 pin 3 2313
RAS 2330 115 x 130 14 pin 3 6990
ROM 3268 143 x 150 14 pin 19 62092
TOTAL 28 74442
PMU
PDU
SLF
SLU
RAS
ROM
MicroprocessorMicroprocessorInstruction SetInstruction Set
• PMU - continuous - co-processor
• PDU - continuous - co-processor
• SLF - 16 instructions
• SLU - 48 instructions
• RAS - 32 instructions
• Executive ROM - 37 instructions
TOTAL = 133 instructions
MicroprocessorMicroprocessorEquations - Angle of AttackEquations - Angle of Attack
MicroprocessorMicroprocessorNumeric Scaling - Angle of AttackNumeric Scaling - Angle of Attack
MicroprocessorMicroprocessorEquation Flow - Angle of AttackEquation Flow - Angle of Attack
MicroprocessorMicroprocessorProgram Flow - Angle of AttackProgram Flow - Angle of Attack
MicroprocessorMicroprocessorTypical Binary Coding SheetTypical Binary Coding Sheet
MicroprocessorMicroprocessorInitial Programming AidsInitial Programming Aids
• No assembler
• No compiler
• No simulator
• No debugger
• No hardware prototype
MicroprocessorMicroprocessorTesting/Computer AidsTesting/Computer Aids
• Failure analysis simulation
(circuit logic level simulation) • Programming simulation
(chip level with timing)• Card deck for ROM masking• Program flow chart• Flight test software changes• Hardware prototype for real testing
Simulator/Debugger Output Values Report
ROM Binary Programming Report
Program Flowchart Report from Plotter
Hardware Prototype of F-14 CADC
Simulated Pilot Display from CADC
General Design General Design AccomplishmentsAccomplishments
1st microprocessor chip set
1st aerospace microprocessor
1st fly-by-wire flight computer
1st military microprocessor
1st production microprocessor
1st fully integrated chip set microprocessor
1st 20-bit microprocessor
Specific Design Specific Design AccomplishmentsAccomplishments
1st microprocessor with built-in programmed self- test and redundancy1st microprocessor in a digital signal (DSP) app1st with execution pipeline1st with parallel processing1st integrated math co-processors1st Read-Only Memory (ROM) with a built-in counter
1970 - 2006
F-14 “Tomcat”
F14 “TomCat” In FlightF14 “TomCat” In Flight
• Navy information film
• “Top Gun” movie
LSI Comments - The Experts
• May 1967 Jack Fischel
• Oct 1967 Joseph Earl
• Oct 1967 Saul Levy
• Nov 1968 CG Feth
• 1968 Franz Alt
MicroprocessorMicroprocessorLogical FunctionsLogical Functions
• Data Limit Comparison
Select P if U >= P >= L
Select L if P > L
Select L if P < L
MicroprocessorMicroprocessorLogical FunctionsLogical Functions
• Logical– and– or– conditional transfer– unconditional transfer
MicroprocessorMicroprocessorI/O FunctionsI/O Functions
• Input / Output– receive on/off switch information– receive A/D information– output on/off information– output D/A information
Who Did It?Who Did It?
• Garrett AiResearch– Electronic Systems, Torrance, CA
• American Micro Systems, Inc.– Santa Clara, CA
What Is A CADC?What Is A CADC?
A Flight Computer to:
• compute and display– altitude– air speed– vertical speed– mach number– temperature
A Flight Computer to:
• compute and control
– wing speed, position, and rate
– maneuver flap position
– glove vane position
– angle of attack correction
A Flight Computer to:
• provide other critical flight information
– real-time data to other systems
– in-flight self-diagnostics
– redundant switchover to dual system
MicroprocessorMicroprocessorGeneral System DiagramGeneral System Diagram
MicroprocessorMicroprocessorData FunctionsData Functions
• Data Conditioning & Scaling
A +/- B
F = -----------
C
A - B
F = -----------
A + C
What Is A CADC?What Is A CADC?
A Flight Computer to:
• Real-time computing and display
• Real-time computing and control
• Real-time flight data to other
systems: weapons &
communications
F14 Aircraft RequirementsF14 Aircraft Requirements
• two man crew
• two engines
• advanced weapon system
• internal gun
• land on aircraft carrier fully loaded
• ‘pipeline’ instruction and arithmetic
• master/slave instruction ROM’s
• ROM retain mode
• ROM external conditional jump
MicroprocessorMicroprocessorNumeric Scaling - Angle of AttackNumeric Scaling - Angle of Attack
Dual Quartz Sensors
Microprocessor Chip Prototype
Final TestFinal Test
The
Ultimate Extreme Test
of a
Computer and Aircraft
Breaking
The
Sound Barrier - Twice
MACH 2