Digital Logic Design
Lecture 6: Digital arithmetic operations and circuits
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Binary addition of unsigned numbers
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Neal S. Widmer, Gregory L. Moss, and Ronald J. Tocci. Digital Systems: Principles and Applications, 12th ed. Pearson Education, Inc. 2017.
The addition of two binary numbers is performed in exactly the same manner as the addition of decimal numbers.
1
carry out
carry in
sum
augendaddend
Binary addition of unsigned numbers: examples
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carries
John F. Wakerly. Digital Design: Principles and Practices. 4th ed. Pearson Education, Inc. 2006.
Binary subtraction of unsigned numbers
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Neal S. Widmer, Gregory L. Moss, and Ronald J. Tocci. Digital Systems: Principles and Applications, 12th ed. Pearson Education, Inc. 2017.
Likewise, binary subtraction is performed just like the subtraction of decimal numbers.
minuendsubtrahenddifference
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borrow inborrow out (from the 3rd column)(from the 5th column)
Binary subtraction of unsigned numbers: examples
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borrows
A very common use of subtraction in computers is to compare two numbers.
If the operation X - Y produces a borrow out of the most significant bit position, then X is less than Y; otherwise, X is greater than or equal to Y.
John F. Wakerly. Digital Design: Principles and Practices. 4th ed. Pearson Education, Inc. 2006.
Binary addition and subtraction of signed numbers
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Stephen Brown and Zvonko Vranesic. Fundamentals of Digital Logic with Verilog Design, 3rd ed. The McGraw-Hill Companies, Inc. 2014.
Addition of positive numbers is the same for all three number representations (sign and magnitude, 1’s complement, 2’s complement) and follows the rules of addition and subtraction of unsigned numbers.
Sign-and-magnitude addition
If both operands have the same sign, then the addition of sign-and-magnitude numbers is simple. The magnitudes are added, and the resulting sum is given the sign of the operands.
However, if the operands have opposite signs, the task becomes more complicated. Then it is necessary to subtract the smaller number from the larger one.
This means that logic circuits that compare and subtract numbers are also needed.
For this reason, the sign-and-magnitude representation is not used in computers.
1’s complement addition
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Stephen Brown and Zvonko Vranesic. Fundamentals of Digital Logic with Verilog Design, 3rd ed. The McGraw-Hill Companies, Inc. 2014.
carry out
Consequently, the time needed to add two 1’s complement numbers may be
twice as long as the time needed to add two unsigned numbers.
extra addition
2’s complement addition
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Stephen Brown and Zvonko Vranesic. Fundamentals of Digital Logic with Verilog Design, 3rd ed. The McGraw-Hill Companies, Inc. 2014.
The addition process is the same, regardless of the signs of the operands.
Hence the 2’s complement notation is highly suitable for the implementation of addition operations.
2’s complement subtraction
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Stephen Brown and Zvonko Vranesic. Fundamentals of Digital Logic with Verilog Design, 3rd ed. The McGraw-Hill Companies, Inc. 2014.
The easiest way of performing subtraction is to negate the subtrahend and add it tothe minuend.
The subtraction operation can be realized as the addition operation, using a 2’s complement of the subtrahend, regardless of the signs ofthe two operands.
Therefore, it should be possible to use the same adder circuit to perform both addition and subtraction.
Graphical interpretation of 4-bit 2’s complement numbers
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Stephen Brown and Zvonko Vranesic. Fundamentals of Digital Logic with Verilog Design, 3rd ed. The McGraw-Hill Companies, Inc. 2014.
(+5) – (2) = +3
(+5) + (-2) = +3
counterclockwise: subtraction of positive numbers
clockwise: addition of positive numbers
Two's-complement numbers are added and subtracted by the same basic binary addition and subtraction algorithms as unsigned numbers of the same length.
Summary of addition and subtraction rules for binary numbers
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John F. Wakerly. Digital Design: Principles and Practices. 4th ed. Pearson Education, Inc. 2006.
Overflow
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If an addition operation produces a result that exceeds the range of the number system, overflow is said to occur.
an out-of-range result
Addition of two numbers with different signs can never produce overflow,but addition of two numbers of like sign can.Overflow examples in the 2’s complement format:
John F. Wakerly. Digital Design: Principles and Practices. 4th ed. Pearson Education, Inc. 2006.
Determination of overflow
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John F. Wakerly. Digital Design: Principles and Practices. 4th ed. Pearson Education, Inc. 2006.
The key to determining whether overflow occurs is the carry out from the MSB position (c3) and carry out from the sign-bit position (c4).
Overflow occurs when these carry-outs have different values, and a correct sum is produced when they have the same value.
Examples in the 2’s complement format:
overflow
overflow
For n-bit numbers:
Overflow in the signed 2’s-complement numbers
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Neal S. Widmer, Gregory L. Moss, and Ronald J. Tocci. Digital Systems: Principles and Applications, 12th ed. Pearson Education, Inc. 2017.
Overflow occurs when the sum is too big to fit into four-bit signed format, meaning we have exceededthe maximum value of 7. On the number circle this is indicated when adding two positive values causes us to cross the line between 0111 (max positive) and 1000 (max negative).
Any subtraction operation between four-bit numbers of opposite signs that produces a result greater than 7 or less than -8 is an overflow of the four-bit format and results in an incorrect answer. i.e. (+3) - (-6) = +9
i.e. (+5) + (+6) = +11
Hexadecimal addition
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Addition of hexadecimal numbers is done in much the same way as decimal addition.
1. Add the two hex digits in decimal, mentally inserting the decimal equivalent for those digits larger than 9.
2. If the sum is 15 or less, it can be directly expressed as a hex digit.
3. If the sum is greater than or equal to 16, subtract 16 and carry a 1 to the next digit position.
John F. Wakerly. Digital Design: Principles and Practices. 4th ed. Pearson Education, Inc. 2006.
Finding 2’s complement of hex numbers
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Method 1: Convert it to binary, take the 2’s complement of the binary equivalent, and then convert it back to hex.
Method 2: Subtract each hex digit from F; then, add 1.
Neal S. Widmer, Gregory L. Moss, and Ronald J. Tocci. Digital Systems: Principles and Applications, 12th ed. Pearson Education, Inc. 2017.
Hexadecimal subtraction
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We can subtract hex numbers using the same method we used for binary numbers.
Example: Subtract 3A516 from 59216.
1. Convert the subtrahend (3A5) to its 2’s-complement form by using eithermethod presented above. The result is C5B.
2. Add this to the minuend (592)
3. Ignore the carry out of the MSD addition; the result is 1ED. We can prove thatthis is correct by adding 1ED to 3A5 and checking to see that it equals 59216.
Neal S. Widmer, Gregory L. Moss, and Ronald J. Tocci. Digital Systems: Principles and Applications, 12th ed. Pearson Education, Inc. 2017.
Radix’s complement schemes
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Consider the subtraction of two-digit decimal numbers.
No borrow is needed in the subtraction:
e.g. 74 −33 = 41 a simple computation
A borrow is needed in the subtraction:
e.g. 74 −36 = 38 a complicated computation
The subtraction in parentheses does not require borrows. It is performed by subtracting each digit of the subtrahend from 9.
63: the 9’s complement of 36
Radix’s complement schemes
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the 10’s complement of 36
the 9’s complement of 36
The subtraction 138 − 100 is trivial because it means that the leading digit in 138 is simply deleted.
Thus, the required subtraction (74 − 36) can be performed by addition of the 10’s complement of the subtrahend.
Radix’s complement schemes
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Binary Decimal
1’s complement: 9’s complement:
2’s complement: 10’s complement:
For an n-digit decimal number, NFor an n-digit binary number, N
𝐾𝐾1 = 2𝑛𝑛 − 1 − 𝑁𝑁
𝐾𝐾2 = 2𝑛𝑛 − 𝑁𝑁
𝐾𝐾9 = 10𝑛𝑛 − 1 − 𝑁𝑁
𝐾𝐾10 = 10𝑛𝑛 − 𝑁𝑁
Examples of 10’s and 9’s complements of 4-bit decimal numbers
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John F. Wakerly. Digital Design: Principles and Practices. 4th ed. Pearson Education, Inc. 2006.
BCD addition
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Neal S. Widmer, Gregory L. Moss, and Ronald J. Tocci. Digital Systems: Principles and Applications, 12th ed. Pearson Education, Inc. 2017.
Sum of the two decimal digits equals 9 or less:
Sum of the two decimal digits is greater than 9:
The correction is done to skip the six invalid states of binary coded decimal, i.e. from 10 to 15 and again return to the BCD codes.
More examples of BCD addition
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Neal S. Widmer, Gregory L. Moss, and Ronald J. Tocci. Digital Systems: Principles and Applications, 12th ed. Pearson Education, Inc. 2017. http://www.electrical4u.com/bcd-or-binary-coded-decimal-bcd-conversion-addition-subtraction/
BCD subtraction
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There are several methods of BCD subtraction:
1’s compliment, 9’s compliment, and 10’s compliment method.
preferable methods
EAC (end-around-carry):
If EAC = 1, the result of the subtraction is positive.
If EAC = 0, then the result is negative.
1’s compliment method:
BCD subtraction using 1’s complement method
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http://www.electrical4u.com/bcd-or-binary-coded-decimal-bcd-conversion-addition-subtraction/
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EAC = 1
(step 1)adder 1(step 2)
If any carry occurs then it will be added to the next group of numbers.
Addition result (before adding the carries)
adder 2
EAC = 1: The result of the subtraction is positive.
(step 3)
(step 4)
(step 5)
Final result:
Cout 1 1 0
True result of adder 1
(0101 0100 0001)BCD = (541)10(0010 0001 0110)BCD = (216)10(0011 0010 0101)BCD = (325)10
(0011 0010 0101)BCD = (325)10
BCD subtraction using 1’s complement method
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http://www.electrical4u.com/bcd-or-binary-coded-decimal-bcd-conversion-addition-subtraction/
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EAC = 0
(step 1)adder 1(step 2)
If any carry occurs then it will be added to the next group of numbers.
Addition result (before adding the carries)
adder 2
EAC = 0: The result of the subtraction is negative.
(step 3)
(step 4)
(step 5)Final result:
Cout 0 1
1’s complement result of adder 1
(0100 1001)BCD = (49)10(0101 0001)BCD = (51)10(-0000 0010)BCD = (-2)10
(-0000 0010)BCD = (-2)10
BCD subtraction using 9’s complement method
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http://www.electrical4u.com/bcd-or-binary-coded-decimal-bcd-conversion-addition-subtraction/
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(0101 0001)BCD = (51)10(0010 0001)BCD = (21)10(0011 0000)BCD = (30)10
(step 1)9’s complement of 21
(step 2)
(step 3)Addition with the minuend
Addition with the carry (step 4)
Final result Change to BCD (step 5)
BCD subtraction using 10’s complement method
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http://www.electrical4u.com/bcd-or-binary-coded-decimal-bcd-conversion-addition-subtraction/
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(0101 0001)BCD = (51)10(0010 0001)BCD = (21)10(0011 0000)BCD = (30)10
(step 1)10’s complement of 21
(step 2)
(step 3)Addition with the minuend
Ignore the first digit(step 4)
Final result Change to BCD (step 5)
100- 21
79Add 79 with 51
79+ 51130
(0011 0000)BCD
Multiplication and division of binary numbers
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Stephen Brown and Zvonko Vranesic. Fundamentals of Digital Logic with Verilog Design, 3rd ed. The McGraw-Hill Companies, Inc. 2014.
Note that for a binary number, B, can be multiplied by 2 simply by adding a zero to the right of its least-significant bit. This effectively moves all bits of B to the left, and we say that B is shifted left by one bit position.
Thus, a number is multiplied by 2k by shifting it left by k bit positions. This is true for both unsigned and signed numbers.
Similarly, B is shifted right by one bit position after dividing by 2.
Note: For signed numbers it is necessary to preserve the sign. This is done by shifting the bits to the right and filling from the left with the value of the sign bit.
Multiplication of unsigned numbers
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The multiplication of binary numbers is done in the same manner as the multiplication of decimal numbers.Note: Most digital machines can add only two binary numbers at a time.
Stephen Brown and Zvonko Vranesic. Fundamentals of Digital Logic with Verilog Design, 3rd ed. The McGraw-Hill Companies, Inc. 2014.
In general, when we multiply an n-bit number by an m-bit number, the resulting product requires at most n + m bits to express.
shift-and-addalgorithm
Multiplication of fixed-point numbers
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http://www.exploringbinary.com/binary-multiplication/
The partial products are added using binary addition, and then the radix point is placed appropriately.
Multiplication of signed numbers: positive multiplier
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Positive multiplicand
Stephen Brown and Zvonko Vranesic. Fundamentals of Digital Logic with Verilog Design, 3rd ed. The McGraw-Hill Companies, Inc. 2014.
sign extension
If the multiplier operand is positive, it is possible to use essentially the same scheme as for unsigned numbers.
Multiplication of signed numbers: positive multiplier
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Negative multiplicand
Stephen Brown and Zvonko Vranesic. Fundamentals of Digital Logic with Verilog Design, 3rd ed. The McGraw-Hill Companies, Inc. 2014.
2’s complement format
2’s complement format
sign extension
Multiplication of signed numbers
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• For a negative multiplier operand, it is possible to convert both the multiplier and the multiplicand into their 2’s complements because this will not change the value of the result.
Then the scheme for a positive multiplier can be used.
• When the two numbers are negative, they will be in 2’s-complement form.
The 2’s complement of each is taken to convert it to a positive number, and then the two numbers are multiplied.
The product is kept as a positive number and is given a sign bit of 0.
Division of unsigned numbers
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Stephen Brown and Zvonko Vranesic. Fundamentals of Digital Logic with Verilog Design, 3rd ed. The McGraw-Hill Companies, Inc. 2014.
remainder
dividenddivisor
quotient
When checking to see how many times the divisor “goes into” the dividend, there are only two possibilities, 0 or 1.
The simplest binary division algorithm is based on the shift-and-subtractmethod. This is usually carried out using 2’s-complement subtraction, that is,taking the 2’s complement of the subtrahend and then adding.
Division of signed numbers
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Division of signed numbers can be accomplished using unsigned division.
Rules:
Perform an unsigned division of the magnitudes and make the quotient positive if the operands had the same sign, negative if they had different signs.
The remainder should be given the same sign as the dividend.
As in multiplication, there are special techniques for performing division directly on two's-complement numbers; these techniques are often implemented in computer division circuits.
Division of fixed-point numbers
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