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Design-for-Si Initiatives - Process-Design Integration -
M Nowak / Riko R March 2007
2Riko R
D
emo
at 65
Dep
loy at 45
D
emo
at
45
Dep
loy
at ?
-3-3
-4-4
-2-2
-1-1
Design–for–Si Initiatives for Post Design-Rule Era
Its the Process-Design Integration, Stupid !!! Improve product cost-performance by alignment of process and design sweet spots
Yield & LayoutYield & LayoutIts the DFM Simulators !
Yield & LayoutYield & LayoutIts the DFM Simulators !
Variability & CornersVariability & CornersIts Geometry Aware
Timing !
Variability & CornersVariability & CornersIts Geometry Aware
Timing !
Physical Design & CostPhysical Design & CostIts the RDR Opportunity !
Physical Design & CostPhysical Design & CostIts the RDR Opportunity !
Architecture Design & CostArchitecture Design & Cost
Its VAM & VSP !
Architecture Design & CostArchitecture Design & Cost
Its VAM & VSP !NOW-ishNOW-ish
3Riko R
1 : Zero Physical DFM Margin
Use “DFM ECO” Loop to add the DFM Pad only
where it may be necessary. Use the DFM
Simulators to identify where are the opportunities
Value Proposition : Smaller Die with Managed Functional Yield Risk
P&RP&R
SPICEmodelSPICEmodel
ECOECO
IPIP
Constra
ints
Constra
ints
CellSwapCell
Swap
LPCpoly
LPCpoly
LPCmodelLPC
model LPCmetal
LPCmetal
LibraryVariantsLibraryVariants
DaughterCell
DaughterCell
LayoutFix
LayoutFix
CMPCMPCMPmodelCMP
model
FilldepopFill
depop
FillFill
DRCDRC
XTXT
T/ OT/ O
CAACAACAAmodelCAA
modelD
FM E
CO
Loop
DFM
ECO
Loop
DFM
Desi
gn K
it (
DD
K)
CAACAA
LPCpoly
LPCpoly
DFM ECO LoopDFM ECO Loop
Start with an Aggressive Library that excludes (most
of ) DFM Rule padding
Its all about Layout Its all about Layout Polishing Polishing
4Riko R
Shapesim
Shapesim
model
model
GDSGDS
LPEdeckLPEdeck
SPICESPICE
BSimBSim
.lib.libNLNL
RTLRTL
Library / IP Flow
XTXTPDPD
STASTA
t/ ot/ o
RCxRCx
Chip Flow
LithomodelLithomodel
Shapesim
Shapesim
model
model
LithomodelLithomodel
CMPmodelCMP
model
Thick.sim
Thick.sim
GDSGDS
Pcorners
Pcorners
LPELPE
-1 ECO-1 ECO-1 ECO-1 ECO
Strainsim
Strainsim
StrainmodelStrainmodel
Mismatchmodel
Mismatchmodel
OCVmodelOCV
model
Tighten corners to exclude Shape
Tighten corners to
exclude Shape,
Thickness, OCV
ECO to correct
impact of block level
interactions on yield or performance
DFM LPE to account for non-
litho systematics
OCV to account for
global systematics
used in SSTA
Tighten corners to exclude Thickness
& Shape
2 : Zero Electrical DFM Margin
Value Proposition : Tighter Margins with Managed Parametric Yield Risk
Its all about Its all about Geometry Geometry
Awareness in the Awareness in the Timing FlowTiming Flow
5Riko R
3 : Correct by Construction Layout [= RDR ??] Not a new concept
Rigorous gridded design has been around for a while Traditionally it cost area vs. more flexible rules
– Hence rejected in 65 and 45 (so far) – especially by volume shops Reason for this (inevitable) conclusion
– Comparison based on same set of Design Rules
– Comparison based on same Design Methodology
New RDR (Compelling ? ) Drivers Some say RDR is inevitable – question is when (32 ?)
– But then that is what they said about it at 65 and 45 and …
– Dual Exposure Demands Design Fragmentation ?
– EUV Negates -29% / year Cost / Gate Reduction ?
– Strain Variability Management ?
New RDR Proposition (s) Negate area loss through better yield, or Tighter lay out rules, or Better design methodologies
Establishing
Collaborative
efforts with
select supply
chain partners
to explore
trade-offs
Value Proposition : DFM-Correct by Construction Layout
It (should be) all It (should be) all about about
manufacturable manufacturable topographiestopographies
6Riko R
4 : Holistic Process-Design Co Optimization Our Strategy : IFM
Fabless entities tend to Have an Intrinsic Disadvantage in this Arena – Less intimate with the process world
Morph the fabless model to address the challenge : Integrated Fabless Manufacturer– Necessary at the bleading edge
Requirement : A Structured Methodology for Co-Optimization Analyses To steer the design To steer the process
Two Exploratory Co-Optimization Initiatives In Parametric Domain :
– Performance vs power vs variability In Area (Cost) Domain :
– Area vs Yield vs Design Content ….
L - 1
N+2Process Options
N+2DesignOptions
Future product Concept
N+2Process Options
N+2DesignOptions
Future product Concept
L - 2 L0
“Holistic Pathfinding”
TECHNOLOGY DEVELOPMENT PHASES
PoR
Process
Design
Value Proposition : Optimized Process & Design “Sweet Spot” Alignment
It (should be) all It (should be) all about about
manufacturable manufacturable architecturesarchitectures
7Riko R
Restricted Design Rules = Designability Risks
Must manage via use of pushed rules or custom techniques to negate area loss
ADVANTAGE : better manufacturability and yields, and easy design interface
DISADVANTAGE : Cost Benefits vs Process Maturity
RDR Challenges DesignabilityDesignability
Cell Area Routability
ProcessabilityProcessability New Features Pushed Rules Interfaces & Transitions Redundancy
Quantified BenefitsQuantified Benefits Yield vs Process Maturity Area vs Process Cost Performance vs DFM Sim
Challenges
FEOL Litho Effects Variability due to printability corners+ DFM_LPE+dummy poly
CMP Polishing Effects Variability due to polishing density based look up tables
Strain Effects Variability in energy bands corners + DFM_LPE
BEOL Litho Effects Variability in wire width use average value
Challenges
FEOL Litho EffectsFEOL Litho Effects Variability due to printability corners+ DFM_LPE+dummy poly
CMP Polishing EffectsCMP Polishing Effects Variability due to polishing density based look up tables
Strain EffectsStrain Effects Variability in energy bands corners + DFM_LPE
BEOL Litho EffectsBEOL Litho Effects Variability in wire width use average value
3 : DFM Junction in the Road ? Flexible Design Rules = Manufacturability
Risks Must manage via Use of DFM Rules or DFM
Simulators & Models to “Polish” the Layout
ADVANTAGE : Minimum overhead for Area or margin for Performance
DISADVANTAGE : it is complex and carries overhead in the design flow
Product Specific Cost-Benefit Trade Off Analyses
DFM Solutions
Shape Simulation : Model “Contours” Modulate L & W in LPE
Thickness Simulation Simulate Cu/ ILD Thickness Modulate Extracted R&C
Strain Simulation Model Strain Driven E-k Curve Modulate mobility in LPE
BEOL Litho Effects Model Contours Modulate Extracted R&C
DFM Solutions
Shape Simulation :Shape Simulation : Model “Contours” Modulate L & W in LPE
Thickness SimulationThickness Simulation Simulate Cu/ ILD Thickness Modulate Extracted R&C
Strain SimulationStrain Simulation Model Strain Driven E-k Curve Modulate mobility in LPE
BEOL Litho EffectsBEOL Litho Effects Model Contours Modulate Extracted R&C
RDR Solutions
YIE
LD
time
YIE
LD
timetime
Pushed RulesPushed Rules a la RAMs ?
Complex MacrosComplex Macros a la Custom Design
Benefit ?Benefit ? Performance Spread Yield AREA