Download - Ddr2 Odt Control 200603
Product Planning &Application Eng. Team
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ApplicationNote
ApplicationNote
DDR2 Application Note
ODT(On Die Termination) Control
March 2006
Product Planning & Application Engineering TeamMEMORY DIVISION
SAMSUNG ELECTRONICS Co., LTD
Product Planning &Application Eng. Team
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ApplicationNote
ApplicationNoteDDR2 ODT (On Die Termination)
� On board termination resistance is integrated inside of DRAM
Slot Slot
DRAM
Controller
On Board termination
Vtt
DRAM
Motherboard Termination(MBT)
Slot Slot
DRAM
Controller
DRAM
On Die Termination (ODT)
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ApplicationNote
ApplicationNoteOn Die Termination On/Off Control
� ODT turn on/off is controlled by ODT pin� One ODT control pin per DRAM : Turn-on or Turn-off control� Two ODT control pin per DIMM to support rank by rank control
But in most application, one ODT pin per slot is being used
DQ, DQS, DQS#, RDQS, RDQS#
Input pin
Source
DDR2
Input buffer
ODT pinSW
Rtt
Controller CK
tAOND = 2*tCKtAOFD = 2.5*tCK
ODT
ODT turn-on period
tISsetup time
ODT turn on delay time ODT turn off
delay time
ODT high active
ODT On ODT Off
ODT On/Off Control
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ApplicationNote
ApplicationNoteOn Die Termination Value Selection
� ODT value should be determined during power-up by EMRS
MRS00EMRS(1)10
11
BA1
EMRS(3) : Reserved1EMRS(2)0
MRS ModeBA0
ODT Pin
DQ, DQS, DM Pin
300 ohm
300 ohm
300 ohm
300 ohm
VDD
VSS
ControlCircuit
300 ohm
300 ohm
A0A1A2A3A4A5A6A7A8A9
EMRS(1)
Address Field
DLLD.SRttAdditive latencyRttOCD program
50 ohm11150 ohm01
ODT Disabled0075 ohm10
A6 Rtt (Nominal)A2
ODT on
SW1 on
SW2 on
SW1
SW2
SW2
SW1
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ApplicationNote
ApplicationNoteTest Condition for ODT Verification
� Capacitance Specification for DDR2-667 & 800
-
2.5
-
1.0
-
1.0
MIN
DDR2-667/DDR2-800
0.5
3.5
0.25
2.0
0.25
2.0
MAXUNIT
pFInput capacitance Delta, DQ/DM/DQS
pFInput capacitance C/A
pFInput capacitance Delta, CK, /CK
pFInput capacitance CK, /CK
pFInput capacitance DQ/DM/DQS
pFInput capacitance Delta, C/A
Parameter
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ApplicationNote
ApplicationNoteODT Case Study @DDR2-667 Writes
� For two slot population, 50ohm seems to be better than 75ohmin term of signal integrity
� For one slot population, even 150ohm seems O.K.
50 ohm
75 ohm
150 ohm
X 1R1R XX 2R2R X1R 1R1R 1RODT value
50 ohm
75 ohm
150 ohm
1R 2R1R 2R2R 1R2R 1R2R 2R2R 2RODT value
Product Planning &Application Eng. Team
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ApplicationNote
ApplicationNoteODT Case Study @DDR2-800 Writes
� For two slot population, 50ohm seems to be better than 75ohmin term of signal integrity
� For one slot population, even 150ohm seems O.K.
50 ohm
75 ohm
150 ohm
X 1R1R XX 2R2R X1R 1R1R 1RODT value
50 ohm
75 ohm
150 ohm
1R 2R1R 2R2R 1R2R 1R2R 2R2R 2RODT value
Product Planning &Application Eng. Team
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ApplicationNote
ApplicationNoteRecommended ODT Control - Writes
� Termination Matrix for Writes to DRAM
Unpopulated150 ohmUnpopulatedUnpopulatedInfiniteslot 2Empty 1RUnpopulatedUnpopulatedUnpopulated150 ohmInfiniteslot 11R Empty
Infinite150 ohmUnpopulatedUnpopulatedInfiniteslot 2Empty 2RUnpopulatedUnpopulatedInfinite150 ohmInfiniteslot 12R EmptyUnpopulatedInfiniteUnpopulated75 or 50 ohmInfiniteslot 2Unpopulated75 or 50 ohmUnpopulatedInfiniteInfiniteslot 11R 1R
InfiniteInfiniteUnpopulated75 or 50 ohmInfiniteslot 2Infinite75 or 50 ohmUnpopulatedInfiniteInfiniteslot 1
1R 2R
UnpopulatedInfiniteInfinite75 or 50 ohmInfiniteslot 2Unpopulated75 or 50 ohmInfiniteInfiniteInfiniteslot 12R 1R
InfiniteInfiniteInfinite75 or 50 ohmInfiniteslot 2Infinite75 or 50 ohmInfiniteInfiniteInfiniteslot 12R 2R
Rank 2Rank 1Rank 2Rank 1Module in slot 2Module in slot 1Controller
Target DQ ODT Resistance RTTWriteTo
Configuration
� ODT on a controller always turned-off
� Example : 2R 2R (write to slot 1)
Slot 1 Slot 2
R1 R2 R1 R2
DRAM DRAM
Memory Controller
Vtt
75 or 50 ohm
Product Planning &Application Eng. Team
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ApplicationNote
ApplicationNoteODT Case Study @DDR2-667 Reads
� For two slot population, either 75ohm or 50ohm could be O.K.���� 50ohm does not help on reads that much
� For one slot population, even 150ohm seems O.K.
50 ohm
75 ohm
150 ohm
X 1R1R XX 2R2R X1R 1R1R 1RODT value
50 ohm
75 ohm
150 ohm
1R 2R1R 2R2R 1R2R 1R2R 2R2R 2RODT value
Product Planning &Application Eng. Team
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ApplicationNote
ApplicationNoteODT Case Study @DDR2-800 Reads
� For two slot population, either 75ohm or 50ohm could be O.K.���� 50ohm does not help on reads that much
� For one slot population, even 150ohm seems O.K.
50 ohm
75 ohm
150 ohm
X 1R1R XX 2R2R X1R 1R1R 1RODT value
50 ohm
75 ohm
150 ohm
1R 2R1R 2R2R 1R2R 1R2R 2R2R 2RODT value
Product Planning &Application Eng. Team
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ApplicationNote
ApplicationNoteRecommended ODT Control - Reads
� Termination Matrix for Reads to DRAM
UnpopulatedInfiniteUnpopulatedUnpopulated75 ohmslot 2Empty 1RUnpopulatedUnpopulatedUnpopulatedInfinite75 ohmslot 11R Empty
InfiniteInfiniteUnpopulatedUnpopulated75 ohmslot 2Empty 2RUnpopulatedUnpopulatedInfiniteInfinite75 ohmslot 12R EmptyUnpopulatedInfiniteUnpopulated75 or 50 ohm150 ohmslot 2Unpopulated75 or 50 ohmUnpopulatedInfinite150 ohmslot 11R 1R
InfiniteInfiniteUnpopulated75 or 50 ohm150 ohmslot 2Infinite75 or 50 ohmUnpopulatedInfinite150 ohmslot 1
1R 2R
UnpopulatedInfiniteInfinite75 or 50 ohm150 ohmslot 2Unpopulated75 or 50 ohmInfiniteInfinite150 ohmslot 12R 1R
InfiniteInfiniteInfinite75 or 50 ohm150 ohmslot 2Infinite75 or 50 ohmInfiniteInfinite150 ohmslot 12R 2R
Rank 2Rank 1Rank 2Rank 1Module in slot 2Module in slot 1Controller
Target DQ ODT Resistance RTTReadfrom
Configuration
� ODT on a controller always turned-on
� Example : 2R 2R (Read from slot 1)
Slot 1 Slot 2
R1 R2 R1 R2
DRAM DRAM
Memory Controller
Vtt
75 or 50 ohm
150 ohm
Product Planning &Application Eng. Team
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ApplicationNote
ApplicationNoteSummary of ODT Control
� ODT value should be decided depending on channelenvironment and set during initialization sequence
� ODT trun-on/off is controlled by ODT pin
� There’re more possible termination methods,but not covered in this material
� For one slot/channel implementation, 150ohm seems O.K.� For two slots/channel implementation, ODT value need to
be determined properly� For DDR2-400/533, 75ohm seems O.K.� For DDR2-667/800, 50ohm is better than 75ohm
� For example, 37.5ohm termination is possible with bothODTs turned-on on a dual rank DIMM, which may result“better signal integrity, but relatively small voltage swing
and more power consumption.”