CS 362: Computer DesignLecture 13: Addition
Mitchell TheysUniversity of Illinois at Chicago
October 9th, 2018
Announcements
Mealy vs Moore FSMS
• Moore FSMs– Output is associated with the state– Output changes on the rising edge of the clock
• Mealy FSMs– Output is associated with transitions– Output changes whenever input changes
Moore vs Mealy
x
y = 1
y
y = 0
bb’
b
b’
x y
b, y = 1b’, y = 0
b, y =1
b’, y = 0
clock
input
state
output
You have a mealy fsm that sends output to a clocked register. Is every output guaranteed to be saved to your
register?A. Yes
B. No
1‐bit Binary Adding
0 + 0 =
1 + 0 =
1 + 1 =
1‐bit Binary Adding
0 + 0 = 0
1 + 0 = 1
1 + 1 = 10
Need to account for two output bits!
Half Adder• Inputs a, b
• Outputs sum and carry out.
• Sum is the result of adding a and b.
• Carry out is the overflow bit.
Below is the truth table for the SUM output of a half adder. What is the boolean algebra function that will give us this truth table?
A. a OR b
B. a XOR b
C. a AND b
D. a NOR b
a b Sum
0 0 0
0 1 1
1 0 1
1 1 0
Below is the truth table for the CARRY output of a half adder. What is the boolean algebra function that will give us this truth table?
A. a OR b
B. a XOR b
C. a AND b
D. a NOR b
a b Carry out
0 0 0
0 1 0
1 0 0
1 1 1
Half‐Adder
• co = ab
• s = a’b + ab’
Binary Addition with Arbitrary Number of Bits
• Just like regular, 3rd grade style addition – Make sure we carry the overflow to the next digit
• Now we need to be able to account for the carry‐in from the next least‐significant bit
Full Adder
ci a b co s
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
• co =
• s =
Full Adder• co = ab + cia + cib
• s = cia’b’ + ci’a’b+ ci’ab’ + ciab
Full Adder from Half Adders
• Need carry‐in, as well as carry‐out
What if both half adders have carry‐out?
A. We will get the wrong answer.
B. We will ignore it, the answer will still be correct.
C. That will never happen
Ripple‐Carry Adder
• Create adder for an arbitrary number of bits simply by connecting carry‐out from adder n‐1 to the carry‐in for adder n
• Carry bit “ripples” up
Can we add a3 + b3 and a0 + b0 at the same time?
A. Yes
B. No
Recall: ‐7 as a 4 bit two’s compliment number is
A. 0111
B. 1000
C. 1001
D. 1111
E. None of the above
Subtraction: a‐b
• Just add negative version of b!
• To negate operand, transform to two’s compliment– Invert each bit– Add one to least significant bit
We can use a NOT gate to invert the input. To add one to the input, we should
A. Set the carry‐in for the least significant bit to 1.
B. Add a new “subtract” input that we set to 1 for subtraction.
C. Do something else.
Subtractor
• Invert bits of b
• Set cin to 1
Subtractor: 7 ‐ 5
Adder/Subtractor
• Use muxes to choose between regular/invert b• Sub input controls cin, muxes
Recall: Which of these will cause overflow in 4 bits?
A. 0011 + 0110
B. 1101 + 0110
C. 1100 + 1100
D. More than one of the above
E. None of the above
If there is overflowA. cout = 1
B. cout != s3
C. cout != s3, a3 = b3
A. None of the above
Overflow in ripple‐carry: 3 + 6
Overflow in ripple‐carry: ‐3 + ‐6
Overflow in ripple‐carry: ‐3 + 6
Overflow in ripple‐carry: ‐2 + ‐4
Reminders
• Next Time: Comparators, N‐bit Muxes, Load Registers 5‐4‐5.6