Download - CPU dsPIC30F
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TÉCNICAS DIGITALES III
MCU - DSP
Familia dspic30f
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Introducción• Arquitectura Harvard
• PC 24 bits – 4Mx24 bits
• Instrucciones: MCU, DSP clases
• RAM Y, X 4Kbytes
• Flash 144Kbytes
• EEPROM: 4Kbytes
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MCU
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SR: Registro de estado del CPU
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Diagrama en bloque de un DSP
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CORCON: Registro de CTRL
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Multiplicador
• 17x17 bits para MCU y DSP
• Un ciclo
• Operación: Signados, 1.31, 32 bits
• Entrada de 16 bits
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Multiplicador MCU
• 16 bits enteros
• Con signo, sin signo o mezclados
• Instrucciones: MUL.UU, MUL.SS, MUL.SU, MUL.US
• Resultado entero de 32 bits
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Multiplicador DSP
• IF: Entero o fraccionario
• US: Signados
• Instrucciones: ED, EDAC, MAC, MPY, MPY.N y MSC
• Resultado: ACCA o ACCB
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Representación 0x4001
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Representación 0xC002
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Multiplicación Fraccionaria con Signo (IF=0 US=0)
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Sumador DSP
• 40 Bits
• Entradas: _ Cero _ ACCA/B _ Sign- Extend
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Acumuladores
• ACCA y ACCB
• Bits de Estado: OA y OB ; SA y SB• Pto. Flotante: Entero o Fraccionario
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Saturación del Acumulador
• 2 Modos: Normal y Súper
• CORCON: SATA, SATB, ACCSAT
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Saturación Normal (1.31)• Signo Preservado• Valor Positivo (~+1.0)
• Valor Negativo (~-1.0)
• OB=0
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Súper Saturación (9.31)
• 40 bits• Valor Positivo (~+256.0)
• Valor Negativo (-256.0)
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Saturación Deshabilitada
• Desbordamiento Catastrófico
• Rango Dinámico: -256.0 a +256.0
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División
• Division Long: Num 32 bit Den 16 bit
DIV.SD, DIV.UD, DIV.SW, DIV.UW, DIVF
• 18 ciclos instrucción
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FINFIN