Download - Acer Aspire 3500 Compal La-2362
5
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2
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1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
1 52Friday, March 11, 2005
2005/03/01 2006/03/01
Sonoma Dothan EAL50_1LA2362 Schematic
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
2 52Friday, March 11, 2005
2005/03/01 2006/03/01
BT
PCI BUS
SO-DIMM X 1
Dothan
GMCH-M
ATA100
TransformerLPC BUS
Fan Control X1
RESERVED
& TV-OUT
uFCPGA CPU
IDSEL:AD17(PIRQA/B#,GNT#2,REQ#2)
KB910
VGA CONN.
3.3V 24.576MHz
VCOREUSB2.0
HA#(3..31)
Alviso Intel 915 PM/GM
JUSBP2
SST39VF080
PCI-E 16X
Clock Generator
HD#(0..63)
Compal confidential
DC IN
ICS
3.3V 33MHz
5V/3.3V/15V
USBPORT 0
Int.KBD
BANK 0, 1
USBPORT 1
DMI
CDROM
CHARGER
ICH6
3.3V 33MHz
USBPORT 2
ENE CB712
RTL 8110SBL/ G 8100CL /100
JUSBP1
USBPORT 3
CRT CONN.
System Bus
USBPORT 4
JUSBP3
609 BGA
X BUS
CardBusController
USBPORT 5
Block Diagram
400 / 533MHz
2.5V 333MHz
VGABoard
1.5V100MHz
1257 FC-BGA
AC-LINK
48MHz / 480Mb
USBPORT 6
USBPORT 7Touch Pad
& RJ45
MINI PCI
MemoryBUS(DDR) Dual Channel
BATT IN/+2.5V
LED/B
Slot 01394CONN.
HDD
RTL 250AC97 CODEC
AMP &Phone/ MICJack 1.8V / 0.9V
1.5V/1.05V(+VCCP)
RESERVED
FIR
SIOLPC47N217D
JUSBP1
SDIOCONN.
BT+MDC
ATI VGA
PIORESERVED
SO-DIMM X 1BANK 2, 3Channel A
3.3V 33MHz
VIA6301 1394
SW LED BD
T/P
Internal GM
External PM
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
C
3 52Friday, March 11, 2005
2005/03/01 2006/03/01
I2C / SMBUS ADDRESSING
External PCI Devices
IDSEL # PIRQREQ/GNT #DEVICE
Cardreader1394
LANCARD BUS
Wireless LAN(MINI PCI)
AD17AD20
AD18
1
3
0
BE
A
G,H
F
+3VALW
S0
S1
S3
S5 S4/AC
S5 S4/AC don't exist
State
Signal
ON
+5VALW
+12VALW +3V+2.5V
+1.25VS
+3VS+5VS
+1.5VS
+CPU_CORE +VCCP
ON ON
ON ON ON
ON ON
ON OFF
OFF
OFF
OFF OFF OFF
Power Managment table
CH
A
Ceramic Capacitor SpecGuide:
1
SL
CODE
0
C0G
9
SJ
B
+-3%
CODE
Symbol F
+40,-20%+-20%
43
G
+20,-10%
X
UK
5
EB C F
Z
+-0.05PF
Y5V Y5P
CK
V
+-0.1PF
J
X5R
A
Z5U
BJ
+100,-0%
Y5U X7R
P
D
M
+-30%
C
NP0 SH
8 G
H
CJ
+30,-10%
Symbol
I
K Q
+80,-20%
+-5%
7
H
6
+-0.5PF +-1PF
Z5V
+-10%
+-0.25PF
J
Tolerance:
+-2%
N
D
Z5P
2
UJ
Temperature Characteristics:
QT-Build
ST-Build
Bringup-Build 0.1SST-Build
PCB Rev Data
PT-Build
VERSION ISSUE DATE REMARK
SCHEMATICS VERSION LIST
0.0A First Release
VGA Thermal
ADM1032SERIAL SENSOR
(CPU)
SMB_EC_CK2
SOURCE
PC87591L
INVERTER BATTEEPROM
THERMALSODIMM CLK CHIP
SMBUS Control Table
ICH_SMBCLK
ICH_SMBDATAICH6-M
MINI PCI
SMB_EC_DA2
SMB_EC_CK1SMB_EC_DA1
PC87591L
(LM75)
LCD_DDCCLK
LCD_DDCDATA
AlvisoGM-GP
LCDSENSORTHERMAL
AD16 2
@ Depop1@ EAL512@ EAL50
+1.8VS+2.5VS
+5V+12V
1@ EAL51 VALUE (DELETE SIO/1394)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
4 52Friday, March 11, 2005
2005/03/01 2006/03/01
ACIN
+3/5/12VALW
RSMRST#
ON/OFF#
EC_ON#
PWRBTN_OUT#
SYSON
+12/2.5/3/5V
SLP_S3/4/5#
SUSP#
+1.25/1.5/1.8/2.5/3/5VS
VR_ON#
+VCCP
CPU_VID
+CPU_CORE
SYSPOK
Vgate
CPU_RST#
PCIRST/PLTRST#
t<100 us
2<t<3 RTCCLK
t>0
7.856mst<110 ms
t<=10 ms
t=100 mst=109 ms
t<110 ms
32ms
8.5/2.44/3.792ms
438ms
3/5V 400us 2.5V(1.8ms)
364us
117ms
92.88ms
1.25VS(104us) 1.5VS(2.64ms) 3VS(7.044ms) 5VS(10.26ms) 2.5VS(4.966ms)
2.166ms1.3ms PGD
5.6ms
726us
815.2us
99ms
1.036ms
61us
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ITP_TDIITP_TMS
ITP_TDO
ITP_TRST#
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#5
ITP_DBRESET# ITP_TDO
H_RESET#ITP_TMS
ITP_TDI
ITP_TRST#
ITP_TCK
ITP_DBRESET#
ITP_TCK
ITP_BPM#3
H_PWRGOOD
CLK_ITP_RCLK_ITP_R#
CLK_ITP#CLK_ITP
CLK_ITP_R
TEST1
H_RESET#
H_INTR
H_D#27
H_D#19
H_D#16
H_D#8
CLK_CPU_BCLK
H_REQ#4
H_REQ#2
H_A#25
H_D#30
H_D#26
H_D#14
H_D#12
H_A#20
H_FERR#
H_D#56
H_D#5
H_THERMDC
H_RS#2
H_RS#0
H_ADS#
H_A#29
H_A#26
H_A#7
H_A20M#
H_D#41
H_D#29
H_D#24
H_D#21
H_ADSTB#0
H_A#14
H_HIT#
H_BPRI#
H_A#22H_A#21
H_A#5
H_A#3
H_D#46
H_D#42
H_D#39
ITP_BPM#0
H_BR0#
H_A#28
H_A#23
H_A#15
H_A#13
H_D#58
H_D#37
H_D#0
CLK_CPU_BCLK#
H_A#24
H_A#11
H_A#8
H_INIT#
H_DSTBP#1
H_D#60
H_DRDY#
H_REQ#0
H_A#30
H_A#10
H_DSTBP#3
H_D#57
H_D#48H_D#47
H_D#28
H_D#22
H_RS#1
H_ADSTB#1
H_A#31
H_A#27
H_A#9
H_NMI
H_D#20
H_D#18
H_D#13
H_DEFER#
H_A#18
H_DSTBN#0
H_D#52H_D#51H_D#50
H_D#45
H_D#15
H_D#11
H_D#3
ITP_BPM#3
H_IGNNE#
H_DSTBP#2
H_DSTBN#1
H_D#33
H_D#23
H_D#7
H_D#1
H_REQ#3
H_DSTBP#0
H_D#63
H_D#59
H_D#49
H_D#32
H_D#17
ITP_BPM#2
H_TRDY#
H_HITM#
H_REQ#1
H_D#54
H_D#44H_D#43
H_D#9
H_D#4
ITP_BPM#1
H_A#19
H_D#53
H_D#40
H_D#36
H_D#2
H_IERR#
CPU_CK_ITP#CPU_CK_ITP
H_A#12
H_A#6
H_DSTBN#2
H_D#62H_D#61
H_D#35H_D#34
H_D#31
H_D#25
H_D#10
H_D#6
H_THERMDA
H_RESET#
H_DSTBN#3
H_D#55
H_D#38
H_LOCK#
H_BNR#
H_A#17H_A#16
H_A#4
H_DPRSLP#
TEST1TEST2
ITP_TCK
ITP_TRST#
ITP_TDO
H_CPUSLP#
ITP_TMS
ITP_TDI
ITP_BPM#5ITP_BPM#4
H_PROCHOT#
H_SMI#H_STPCLK#
ITP_DBRESET#
H_DPSLP#H_DBSY#
TEST2
H_PROCHOT#
ITP_BPM#5
ITP_BPM#4
H_A#[3..31]<8>
H_REQ#[0..4]<8>
H_ADSTB#0<8>H_ADSTB#1<8>
CLK_ITP<18>CLK_ITP#<18>
CLK_CPU_BCLK<18>CLK_CPU_BCLK#<18>
H_ADS#<8>H_BNR#<8>
H_BR0#<8>H_BPRI#<8>
H_DEFER#<8>H_DRDY#<8>H_HIT#<8>H_HITM#<8>
H_LOCK#<8>H_RESET#<8>
H_RS#[0..2]<8>
H_TRDY#<8>
H_DPSLP#<20>H_DPRSLP#<20>
H_CPUSLP#<8,20>
H_DBSY#<8>
H_DPWR#<8>
H_PWRGOOD<20>
H_THERMDA<34>H_THERMDC<34>H_THERMTRIP#<8,20>
H_A20M# <20>H_FERR# <20>H_IGNNE# <20>H_INIT# <20>H_INTR <20>H_NMI <20>
H_STPCLK# <20>H_SMI# <20>
H_DINV#0 <8>H_DINV#1 <8>H_DINV#2 <8>H_DINV#3 <8>
H_DSTBN#[0..3] <8>
H_DSTBP#[0..3] <8>
H_D#[0..63] <8>
PROCHOT# <32>
+VCCP
+VCCP
+VCCP
+3V
+VCCP
+VCCP
+VCCP
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
5 52Friday, March 11, 2005
2005/03/01 2006/03/01
This shall place near CPU
Add pullups for PWRGOOD and THERMTRIP per INTEL
Place near JITP
Check ITP connector.
Place near JITP 0.5"
Test pad as closed as posible
39.4
T7PAD
T12PAD
R100680_0402_5%
1 2
R110 0_0402_5%
@
1 2
T5 PAD
R464
1K_0402_5%@
1 2
R8722.6_0402_1%
1 2
T14PAD
T15PAD
R9054.9_0603_1%
1 2
R79150_0402_5%
1 2
T17PAD
R109 0_0402_5%@ 1 2
R530
1K_0402_5%@
1 2
R1321K_0402_5%
12
R7654.9_0603_1%1 2
T9PAD
C359
0.1U_0402_10V6K
1
2
R458200_0402_5% 1 2
T16PAD
R12456_0402_5%
12
C
BE
Q62SC2411K_SC59
1
2
3
T39 PAD
T13PAD
T8PAD
R7856_0402_5%
1 2
T11PAD
R745 56_0402_5%1 2
T4PAD
R47937.4_0402_1%
1 2
R112 0_0402_5%
@
1 2
T10PAD
ADDR GROUP
CONTROL GROUP
HOST CLK
MISC
DATA GROUP
THERMALDIODE
LEGACY CPU
DothanJCPU1A
TYCO_1612365-1_Dothan
A3#P4A4#U4A5#V3A6#R3A7#V2A8#W1A9#T4A10#W2A11#Y4A12#Y1A13#U1A14#AA3A15#Y3A16#AA2A17#AF4A18#AC4A19#AC7A20#AC3A21#AD3A22#AE4A23#AD2A24#AB4A25#AC6A26#AD5A27#AE2A28#AD6A29#AF3A30#AE1A31#AF1
REQ0#R2REQ1#P3REQ2#T2REQ3#P1REQ4#T1
ADSTB0#U3ADSTB1#AE5
BCLK0B15BCLK1B14
ITP_CLK0A16ITP_CLK1A15
ADS#N2BNR#L1BPRI#J3BR0#N4DEFER#L4DRDY#H2HIT#K3HITM#K4IERR#A4LOCK#J2RESET#B11
RS0#H1RS1#K1RS2#L2TRDY#M3
BPM0#C8BPM1#B8BPM2#A9BPM3#C9
DBR#A7DBSY#M2DPSLP#B7
DPWR#C19PRDY#A10PREQ#B10PROCHOT#B17
PWRGOODE4SLP#A6TCKA13TDIC12TDOA12TEST1C5TEST2F23TMSC11TRST#B13
THERMDAB18THERMDCA18THERMTRIP#C17
D0# A19D1# A25D2# A22D3# B21D4# A24D5# B26D6# A21D7# B20D8# C20D9# B24
D10# D24D11# E24D12# C26D13# B23D14# E23D15# C25D16# H23D17# G25D18# L23D19# M26D20# H24D21# F25D22# G24D23# J23D24# M23D25# J25D26# L26D27# N24D28# M25D29# H26D30# N25D31# K25D32# Y26D33# AA24D34# T25D35# U23D36# V23D37# R24D38# R26D39# R23D40# AA23D41# U26D42# V24D43# U25D44# V26D45# Y23D46# AA26D47# Y25D48# AB25D49# AC23D50# AB24D51# AC20D52# AC22D53# AC25D54# AD23D55# AE22D56# AF23D57# AD24D58# AF20D59# AE21D60# AD21D61# AF25D62# AF22D63# AF26
DINV0# D25DINV1# J26DINV2# T24DINV3# AD20
DSTBN0# C23DSTBN1# K24DSTBN2# W25DSTBN3# AE24DSTBP0# C22DSTBP1# L24DSTBP2# W24DSTBP3# AE25
A20M# C2FERR# D3
IGNNE# A3INIT# B5
LINT0 D1LINT1 D4
STPCLK# C6SMI# B4
DPRSTP#G1
R10627.4_0402_1%
1 2
T19PAD
R111 0_0402_5%@ 1 2
R12356_0402_5%
12
R85150_0402_5%
1 2
T6PAD
R7422.6_0402_1%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
COMP0
COMP3
COMP1COMP2
H_VID0
H_VID5
H_VID3
H_VID4
H_VID2
H_VID1
H_VID1H_VID0
H_VID2
H_VID5
VSSSENSE
H_VID3H_VID4
VCCSENSE
H_PSI#
CPU_BSEL0CPU_BSEL1
VID0 <45>
VID1 <45>
VID2 <45>
VID3 <45>
VID4 <45>
VID5 <45>
PSI#<45>
CPU_BSEL0<18>CPU_BSEL1<18>
+VCCP
+CPU_CORE
+VCCA_PROC
+VCCP
+V_CPU_GTLREF
+V_CPU_GTLREF
+1.5VS
+VCCP
+CPU_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
6 52Friday, March 11, 2005
2005/03/01 2006/03/01
Resistor placed within0.5" of CPU pin.Traceshould be at least 25miles away from anyother toggling signal.
R_B
R_A
For test only ,Cmos outputCPU Voltage ID
SHORT
OPEN OPEN OPEN OPEN OPEN OPEN
Layout close CPU
Layout Note:500 mil max length
20 mils
20 mils5 mils
5 mils
R4260_0402_5%
@
12
T31 PADT29 PAD
R4270_0402_5%
@
12
R436 0_0402_5%
12
R411
10K_0402_5%
@12
R15
6 27.4
_040
2_1%
12
R4240_0402_5%
@
12
R4230_0402_5%
@
12
T2 PAD
Dothan
POWER, GROUND
JCPU1C
TYCO_1612365-1_Dothan
VCCF20VCCF22VCCG5VCCG21VCCH6VCCH22VCCJ5VCCJ21VCCK22VCCU5VCCV6VCCV22VCCW5VCCW21VCCY6VCCY22VCCAA5VCCAA7VCCAA9VCCAA11VCCAA13VCCAA15VCCAA17VCCAA19VCCAA21VCCAB6VCCAB8VCCAB10VCCAB12VCCAB14VCCAB16VCCAB18VCCAB20VCCAB22VCCAC9VCCAC11VCCAC13VCCAC15VCCAC17VCCAC19VCCAD8VCCAD10VCCAD12VCCAD14VCCAD16VCCAD18VCCAE9VCCAE11VCCAE13VCCAE15VCCAE17VCCAE19VCCAF8VCCAF10VCCAF12VCCAF14VCCAF16VCCAF18
VSSM4VSSM5VSSM21VSSM24VSSN3VSSN6VSSN22VSSN23VSSN26VSSP2VSSP5VSSP21VSSP24VSSR1VSSR4VSSR6VSSR22VSSR25VSST3VSST5VSST21VSST23
VSS T26VSS U2VSS U6VSS U22VSS U24VSS V1VSS V4VSS V5VSS V21VSS V25VSS W3VSS W6VSS W22VSS W23VSS W26VSS Y2VSS Y5VSS Y21VSS Y24VSS AA1VSS AA4VSS AA6VSS AA8VSS AA10VSS AA12VSS AA14VSS AA16VSS AA18VSS AA20VSS AA22VSS AA25VSS AB3VSS AB5VSS AB7VSS AB9VSS AB11VSS AB13VSS AB15VSS AB17VSS AB19VSS AB21VSS AB23VSS AB26VSS AC2VSS AC5VSS AC8VSS AC10VSS AC12VSS AC14VSS AC16VSS AC18VSS AC21VSS AC24VSS AD1VSS AD4VSS AD7VSS AD9VSS AD11VSS AD13VSS AD15VSS AD17VSS AD19VSS AD22VSS AD25VSS AE3VSS AE6VSS AE8VSS AE10VSS AE12VSS AE14VSS AE16VSS AE18VSS AE20VSS AE23VSS AE26VSS AF2VSS AF5VSS AF9VSS AF11VSS AF13VSS AF15VSS AF17VSS AF19VSS AF21VSS AF24
R410
10K_0402_5%
@12
R435 0_0402_5%
12
R437 0_0402_5%
12
C51
60.
01U
_040
2_16
V7K 1
2
R1551K_0402_1%
12
R4250_0402_5%
@
12
R434 0_0402_5%
12
T3 PAD
R409
10K_0402_5%
@12
R41
7 54.9
_040
2_1%
12
R15
7 54.9
_040
2_1%
12
T20 PAD
R47054.9_0402_1%@
1 2
C15
010
U_1
206_
6.3V
6M
1
2
R41
6 27.4
_040
2_1%
12
R408
10K_0402_5%
@12
J2
PAD-OPEN 2x2m@
2 1
R412
10K_0402_5%
@12
R46554.9_0402_1%@
1 2
Dothan
POWER, GROUNG, RESERVED SIGNALS AND NC
JCPU1B
TYCO_1612365-1_Dothan
PSI#E1
GTLREFAD26
VCCQ0P23VCCQ1W4
VCCSENSEAE7VSSSENSEAF6
BSEL0C16BSEL1C14
VCCA0F26VCCA1B1VCCA2N1VCCA3AC26
VCCPD10VCCPD12VCCPD14VCCPD16VCCPE11VCCPE13VCCPE15VCCPF10VCCPF12VCCPF14VCCPF16VCCPK6VCCPL5VCCPL21VCCPM6VCCPM22VCCPN5VCCPN21VCCPP6VCCPP22VCCPR5VCCPR21VCCPT6VCCPT22VCCPU21
VCCD6VCCD8VCCD18VCCD20VCCD22VCCE5VCCE7VCCE9VCCE17VCCE19VCCE21VCCF6VCCF8VCCF18
VID0E2VID1F2VID2F3VID3G3VID4G4VID5H4
COMP0P25COMP1P26COMP2AB2COMP3AB1
RSVDAF7
RSVDB2RSVDC3RSVDE26
VSS A2VSS A5VSS A8VSS A11VSS A14VSS A17VSS A20VSS A23VSS A26VSS B3VSS B6VSS B9VSS B12VSS B16VSS B19VSS B22VSS B25VSS C1VSS C4VSS C7VSS C10VSS C13VSS C15VSS C18VSS C21VSS C24VSS D2VSS D5VSS D7VSS D9VSS D11VSS D13VSS D15VSS D17VSS D19VSS D21VSS D23VSS D26VSS E3VSS E6VSS E8VSS E10VSS E12VSS E14VSS E16VSS E18VSS E20VSS E22VSS E25VSS F1VSS F4VSS F5VSS F7VSS F9VSS F11VSS F13VSS F15VSS F17VSS F19VSS F21VSS F24VSS G2VSS G6VSS G22VSS G23VSS G26VSS H3VSS H5VSS H21VSS H25VSS J1VSS J4VSS J6VSS J22VSS J24VSS K2VSS K5VSS K21VSS K23VSS K26VSS L3VSS L6VSS L22VSS L25VSS M1RSVDAC1
R413
10K_0402_5%
@12
R438 0_0402_5%
12
R4220_0402_5%
@
12
R433 0_0402_5%
12
R1532K_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCP
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
7 52Friday, March 11, 2005
2005/03/01 2006/03/01
10uF 1206 X5R -> 85 degreeX7R
High Frequence Decoupling
Near VCORE regulator.
ESR <= 3m ohm
Capacitor > 880 uF
C48310U_0805_6.3V6M
1
2
+
C358
330U_D
2E_2.5V
M_R
9
1
2
C4240.1U_0402_10V6K
1
2
C46910U_0805_6.3V6M
1
2
C10910U_0805_6.3V6M
1
2
C38310U_0805_6.3V6M
1
2
C48110U_0805_6.3V6M
1
2
C10510U_0805_6.3V6M
1
2
C4410.1U_0402_10V6K
1
2
C4500.1U_0402_10V6K
1
2
C6690.1U_0402_10V6K
1
2
C48210U_0805_6.3V6M
1
2
C10010U_0805_6.3V6M
1
2
C11310U_0805_6.3V6M
1
2
C41510U_0805_6.3V6M
1
2
C4980.1U_0402_10V6K
1
2
C9110U_0805_6.3V6M
1
2
C6680.1U_0402_10V6K
1
2
C51210U_0805_6.3V6M
1
2
C9210U_0805_6.3V6M
1
2
C3980.1U_0402_10V6K
1
2
C6710.1U_0402_10V6K
1
2
+
C357
330U_D
2E_2.5V
M_R
9
@
1
2
C47010U_0805_6.3V6M
1
2
C46010U_0805_6.3V6M
1
2
C6700.1U_0402_10V6K
1
2
C41610U_0805_6.3V6M
1
2
+ C525150U_D2_6.3VM
1
2
C43010U_0805_6.3V6M
1
2
C48010U_0805_6.3V6M
1
2
C6640.1U_0402_10V6K
1
2
C5040.1U_0402_10V6K
1
2
C6730.1U_0402_10V6K
1
2
C50710U_0805_6.3V6M
1
2
C44610U_0805_6.3V6M
1
2
C6720.1U_0402_10V6K
1
2
C6670.1U_0402_10V6K
1
2
C5030.1U_0402_10V6K
1
2
C51810U_0805_6.3V6M
1
2
C42110U_0805_6.3V6M
1
2
C10410U_0805_6.3V6M
1
2
+
C377
330U_D
2E_2.5V
M_R
9 1
2
C45910U_0805_6.3V6M
1
2
C4990.1U_0402_10V6K
1
2
C10810U_0805_6.3V6M
1
2
C12110U_0805_6.3V6M
1
2
+
C378
330U_D
2E_2.5V
M_R
9
1
2
C11410U_0805_6.3V6M
1
2
C42210U_0805_6.3V6M
1
2
C4630.1U_0402_10V6K
1
2
C5000.1U_0402_10V6K
1
2
C43110U_0805_6.3V6M
1
2
C52210U_0805_6.3V6M
1
2
C12010U_0805_6.3V6M
1
2
C6650.1U_0402_10V6K
1
2
C9910U_0805_6.3V6M
1
2
C6660.1U_0402_10V6K
1
2
C44210U_0805_6.3V6M
1
2
C50210U_0805_6.3V6M
1
2
C44510U_0805_6.3V6M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_SWNG1
PM_EXTTS#0PM_EXTTS#1
PLTRST_R#
H_ADSTB#1
H_R_CPUSLP#
H_RS#2
H_RS#0H_RS#1
H_YSCOMPH_YRCOMP
H_SWNG0H_SWNG1
H_SWNG0
PM_EXTTS#0
PM_EXTTS#1
MCH_CLKSEL0
CFG6CFG5
CFG7
CFG12CFG13
CFG19
CFG16
CFG18
MCH_CLKSEL1
DDR_SCS#3DDR_SCS#2
DDR_SCS#0DDR_SCS#1
DDR_CKE3
DDR_CKE1DDR_CKE2
DDR_CKE0
DDR_CLK0#DDR_CLK1#
DDR_CLK3#DDR_CLK4#
DDR_CLK0DDR_CLK1
DDR_CLK3DDR_CLK4
DMI_RXP1DMI_RXP0
DMI_RXN0DMI_RXN1
DMI_TXP0DMI_TXP1
DMI_TXN0DMI_TXN1
SMRCOMPPSMRCOMPN
H_CPUSLP# H_R_CPUSLP#
CFG0
CFG9
DMI_RXP3DMI_RXP2
DMI_RXN2DMI_RXN3
DMI_TXP2DMI_TXP3
DMI_TXN2DMI_TXN3
M_OCDOCMP0M_OCDOCMP1
M_OCDOCMP0M_OCDOCMP1
H_THERMTRIP#
H_DRDY#
H_A#25H_A#24H_A#23
H_REQ#3
H_DSTBP#0
H_REQ#2
H_A#12
H_A#5H_A#4
H_BNR#
H_A#18
H_DSTBN#0
H_A#21H_A#20
H_A#14
H_A#9
TP_H_EDRDY#
H_ADS#
H_A#29
H_REQ#0
H_A#31H_A#30
H_BPRI#
H_RESET#
H_DBSY#
H_DSTBN#3
TP_H_PCREQ#
H_A#28
H_DSTBN#1
H_VREF
H_A#16H_A#15
H_BR0#
H_A#17
H_A#13
H_LOCK#
H_A#8
H_ADSTB#0
H_DSTBP#1
H_REQ#4
H_A#26
H_A#19
H_A#6
H_TRDY#
H_A#11
H_A#7
H_DSTBN#2
H_REQ#1
H_A#22
H_A#10
H_DSTBP#3
H_DEFER#
H_DSTBP#2
H_A#27
H_A#3
H_XRCOMP
H_D#21
H_D#61
H_D#35
H_D#6
H_D#47
H_D#58
H_D#51
H_D#31
H_D#26
H_D#13
H_D#55
H_D#48
H_D#15
H_D#0
H_D#59
H_D#23
H_D#3
H_D#1
H_D#32
H_D#11
H_D#5
H_D#62
H_D#29
H_D#49
H_D#44
H_D#25
H_D#16
H_D#50
H_D#43
H_D#27
H_D#56
H_D#45
H_D#18
H_D#40
H_D#38
H_D#36
H_D#34
H_D#24
H_D#42
H_D#39
H_D#22
H_D#37
H_D#9H_D#8
H_D#46
H_D#33
H_D#60
H_D#52
H_D#28
H_D#19
H_D#7
H_D#2
H_D#54
H_D#14
H_D#4
H_D#41
H_D#20
H_D#10
H_D#30
H_D#63
H_D#57
H_D#53
H_D#17
H_D#12
H_XSCOMPCFG5
CFG7
CFG6
CFG0
CFG12
CFG13
CFG18CFG19
CFG9
CFG16
H_HIT#H_HITM#
H_A#[3..31]<5>
H_REQ#[0..4]<5>
H_ADSTB#0<5>H_ADSTB#1<5>
CLK_MCH_BCLK#<18>CLK_MCH_BCLK<18>
H_DSTBN#[0..3]<5>
H_DSTBP#[0..3]<5>
H_DINV#0<5>H_DINV#1<5>H_DINV#2<5>H_DINV#3<5>
H_RESET#<5>
H_ADS#<5>H_TRDY#<5>H_DPWR#<5>H_DRDY#<5>H_DEFER#<5>
H_BR0#<5>H_BNR#<5>H_BPRI#<5>H_DBSY#<5>
H_HITM#<5>H_HIT#<5>H_LOCK#<5>
H_RS#[0..2]<5>
H_CPUSLP#<5,20>
H_D#[0..63] <5>
DMI_TXN0<21>DMI_TXN1<21>DMI_TXN2<21>DMI_TXN3<21>
DMI_TXP0<21>DMI_TXP1<21>DMI_TXP2<21>DMI_TXP3<21>
DMI_RXN0<21>DMI_RXN1<21>DMI_RXN2<21>DMI_RXN3<21>
DMI_RXP0<21>DMI_RXP1<21>DMI_RXP2<21>DMI_RXP3<21>
DDR_CLK0<13>DDR_CLK1<13>
DDR_CLK3<14>DDR_CLK4<14>
DDR_CLK0#<13>DDR_CLK1#<13>
DDR_CLK3#<14>DDR_CLK4#<14>
DDR_CKE0<13>DDR_CKE1<13>DDR_CKE2<14>DDR_CKE3<14>
DDR_SCS#0<13>DDR_SCS#1<13>DDR_SCS#2<14>DDR_SCS#3<14>
MCH_CLKSEL1 <18>MCH_CLKSEL0 <18>
PM_BMBUSY# <21>
H_THERMTRIP# <5,20>VGATE <18,21,45>
DREFCLK# <18>DREFCLK <18>
SSC_DREFCLK <18>SSC_DREFCLK# <18>
PLTRST_MCH# <19>
+VCCP+VCCP
+VCCP
+VCCP+2.5VS
+2.5V
+VCCP
+SDREF_DIMM
+VCCP
+2.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
8 52Friday, March 11, 2005
2005/03/01 2006/03/01
Layout Guidewill show thesesignals routeddifferentially.
Layout Guide will showthese signals routeddifferentially.
Note:"Do not install R for Dothan-A,Install R97 for Dothan-B"
Layout Note:Rote as shortas possible
CFG[17:3] have internal pull-up
CFG[19:18] have internal pull-down
CFG[2:0]Refer to sheet 6 for FSBfrequency select
CFG19 (VTT Select)
*
*
CFG18 (VCC Select)
Low = DMI x 2
CFG7
High = DMI x 4CFG5
Low = DT/Transportable CPUHigh = Mobile CPU
CFG6High = DDR-ILow = DDR-II
CFG[13:12]
CFG16(FSB DynamicODT)
Low = 1.05V (Default)
00 = Reserved01 = XOR Mode Enabled10 = All Z Mode Enabled11 = Normal Operation (Default)
High = 1.2V
Low = 1.05V (Default)High = 1.5V
High = EnabledLow = Disabled
Low = Reverse LaneCFG9
High = Normal Operation
*
*
*
**
*
10/20 mils
3.5 k reserve for choose
3.5 k reserve for choose
Alviso CFG[17:3] has internal pull-up
R387 10K_0402_5%
@
12
R352.2K_0402_5% @ 12
R367 10K_0402_5%
12
HOST
AlvisoU5A
ALVISO_BGA1257
HD0# E4HD1# E1HD2# F4HD3# H7HD4# E2HD5# F1HD6# E3HD7# D3HD8# K7HD9# F2
HD10# J7HD11# J8HD12# H6HD13# F3HD14# K8HD15# H5HD16# H1HD17# H2HD18# K5HD19# K6HD20# J4HD21# G3HD22# H3HD23# J1HD24# L5HD25# K4HD26# J5HD27# P7HD28# L7HD29# J3HD30# P5HD31# L3HD32# U7HD33# V6HD34# R6HD35# R5HD36# P3HD37# T8HD38# R7HD39# R8HD40# U8HD41# R4HD42# T4HD43# T5HD44# R1HD45# T3HD46# V8HD47# U6HD48# W6HD49# U3HD50# V5HD51# W8HD52# W7HD53# U2HD54# U1HD55# Y5HD56# Y2HD57# V4HD58# Y7HD59# W1HD60# W3HD61# Y3HD62# Y6HD63# W2
HA3#G9HA4#C9HA5#E9HA6#B7HA7#A10HA8#F9HA9#D8HA10#B10HA11#E10HA12#G10HA13#D9HA14#E11HA15#F10HA16#G11HA17#G13HA18#C10HA19#C11HA20#D11HA21#C12HA22#B13HA23#A12HA24#F12HA25#G12HA26#E12HA27#C13HA28#B11HA29#D13HA30#A13HA31#F13
HREQ#0A7HREQ#1D7HREQ#2B8HREQ#3C7HREQ#4A8HADSTB#0B9HADSTB#1E13
HPCREQ#A11
HCLKNAB1HCLKPAB2
HVREF J11HXRCOMP C1HXSCOMP C2HYRCOMP T1HYSCOMP L1
HYSWING P1HXSWING D1
HDSTBN#0G4HDSTBN#1K1HDSTBN#2R3HDSTBN#3V3HDSTBP#0G5HDSTBP#1K2HDSTBP#2R2HDSTBP#3W4HDINV#0H8HDINV#1K3HDINV#2T7HDINV#3U5
HCPURST#H10
HADS#F8HTRDY#B5HDPWR#G6HDRDY#F7HDEFER#E6HEDRDY#F6HHITM#D6HHIT#D4HLOCK#B3HBREQ0#E7HBNR#A5HBPRI#D5HDBSY#C6HCPUSLP#G8HRS0#A4HRS1#C5HRS2#B4
R382.2K_0402_5% @ 12
T1 PADR5756_0402_5%@1 2
DMI
DDR
MUXI
NG
CFG/
RSVD
PMCLK
NC
U5B
ALVISO_BGA1257
DMIRXN0AA31DMIRXN1AB35
DMIRXP0Y31DMIRXP1AA35
DMITXN0AA33DMITXN1AB37
DMITXP0Y33DMITXP1AA37
SM_CK0AM33SM_CK1AL1SM_CK2AE11SM_CK3AJ34SM_CK4AF6SM_CK5AC10
SM_CK0#AN33SM_CK1#AK1SM_CK2#AE10SM_CK3#AJ33SM_CK4#AF5SM_CK5#AD10
SM_CKE0AP21SM_CKE1AM21SM_CKE2AH21SM_CKE3AK21
SM_CS0#AN16SM_CS1#AM14SM_CS2#AH15SM_CS3#AG16
SM_OCDCOMP0AF22SM_OCDCOMP1AF16SM_ODT0AP14SM_ODT1AL15SM_ODT2AM11SM_ODT3AN10
SMRCOMPNAK10SMRCOMPPAK11SMVREF0AF37SMVREF1AD1SMXSLEWINAE27SMXSLEWOUTAE28SMYSLEWINAF9SMYSLEWOUTAF10
CFG0 G16CFG1 H13CFG2 G14CFG3 F16CFG4 F15CFG5 G15CFG6 E16CFG7 D17CFG8 J16CFG9 D15
CFG10 E15CFG11 D14CFG12 E14CFG13 H12CFG14 C14CFG15 H15CFG16 J15CFG17 H14CFG18 G22CFG19 G23CFG20 D23
RSVD21 G25RSVD22 G24RSVD23 J17RSVD24 A31RSVD25 A30RSVD26 D26RSVD27 D25
BM_BUSY# J23EXT_TS0# J21EXT_TS1# H22
THRMTRIP# F5PWROK AD30RSTIN# AE29
DREF_CLKN A24DREF_CLKP A23
DREF_SSCLKN C37DREF_SSCLKP D37
NC1 AP37NC2 AN37NC3 AP36NC4 AP2NC5 AP1NC6 AN1NC7 B1NC8 A2NC9 B37
NC10 A36NC11 A37
DMITXN2AC33DMITXN3AD37
DMIRXN3AD35 DMIRXN2AC31
DMITXP2AB33DMITXP3AC37
DMIRXP2AB31DMIRXP3AC35
R39
722
1_06
03_1
%
12
R37
620
0_04
02_1
%
12
R484 80.6_0402_1%
1 2
R37 1K_0402_5%@1 2
R36 1K_0402_5%@1 2
R41
54.9
_040
2_1%
12
T26PAD @
T27 PAD @
R370 2.2K_0402_5%1 2
R374 2.2K_0402_5%@1 2
C41
90.
1U_0
402_
16V
4Z
1
2R365
10K_0402_5% 12
R47
740
.2_0
402_
1%
@
12
R38
810
0_04
02_1
%
12
T25PAD @
R48980.6_0402_1%
12
R66
54.9
_040
2_1%
12
R394 2.2K_0402_5%@1 2
R384 10K_0402_5%
@
12C
385
0.1U
_040
2_16
V4Z
1
2
R77
24.9
_040
2_1%
1
2
R47
640
.2_0
402_
1%
@
12
R44
24.9
_040
2_1%
1
2
R369 2.2K_0402_5%1 2
R375 2.2K_0402_5%@1 2
R368 2.2K_0402_5%1 2
R73
100_
0603
_1%
12
R430 2.2K_0402_5%@1 2R4180_0402_5%1 2
R492 100_0402_1%
1 2
R37
210
0_04
02_1
%
12
R36610K_0402_5%
12
R67
221_
0603
_1%
12
C42
80.
1U_0
402_
16V
4Z
1
2
C37
90.
1U_0
402_
16V
7K
1
2
C36
20.
1U_0
402_
16V
4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_BS#2
DDR_A_DM0
DDR_A_DM6
DDR_A_DM4DDR_A_DM3
DDR_A_DM1
DDR_A_DM7
DDR_A_DM5
DDR_A_DM2
DDR_A_BS#0DDR_A_BS#1
TP_MA_RCVENIN#TP_MA_RCVENOUT#
DDR_A_DQS0DDR_A_DQS1DDR_A_DQS2
DDR_A_CAS#
DDR_A_WE#
DDR_A_RAS#
DDR_A_DQS3DDR_A_DQS4DDR_A_DQS5DDR_A_DQS6DDR_A_DQS7
DDR_A_MA0DDR_A_MA1DDR_A_MA2DDR_A_MA3
DDR_A_MA5DDR_A_MA4
DDR_A_MA7DDR_A_MA6
DDR_A_MA10DDR_A_MA9DDR_A_MA8
DDR_A_MA11DDR_A_MA12DDR_A_MA13
DDR_A_D5
DDR_A_D0
DDR_A_D10
DDR_A_D3
DDR_A_D1
DDR_A_D4
DDR_A_D11
DDR_A_D2
DDR_A_D8DDR_A_D9
DDR_A_D6DDR_A_D7
DDR_A_D17
DDR_A_D22
DDR_A_D15DDR_A_D16
DDR_A_D13
DDR_A_D20
DDR_A_D12
DDR_A_D23
DDR_A_D19DDR_A_D18
DDR_A_D14
DDR_A_D21
DDR_A_D25
DDR_A_D29
DDR_A_D24
DDR_A_D35
DDR_A_D30
DDR_A_D32
DDR_A_D34
DDR_A_D27
DDR_A_D33
DDR_A_D28
DDR_A_D26
DDR_A_D37
DDR_A_D40
DDR_A_D46
DDR_A_D44
DDR_A_D39
DDR_A_D36
DDR_A_D47
DDR_A_D31
DDR_A_D42DDR_A_D43
DDR_A_D38
DDR_A_D41
DDR_A_D45
DDR_A_D53
DDR_A_D48
DDR_A_D59
DDR_A_D56
DDR_A_D58
DDR_A_D51DDR_A_D52
DDR_A_D57
DDR_A_D50DDR_A_D49
DDR_A_D63
DDR_A_D55DDR_A_D54
DDR_A_D61DDR_A_D60
DDR_A_D62
DDR_B_BS#0DDR_B_BS#1
DDR_B_RAS#
DDR_B_WE#
DDR_B_CAS#
TP_MB_RCVENIN#TP_MB_RCVENOUT#
DDR_B_MA0DDR_B_MA1
DDR_B_MA7
DDR_B_MA2DDR_B_MA3
DDR_B_MA5
DDR_B_MA8DDR_B_MA9
DDR_B_MA12
DDR_B_MA4
DDR_B_MA6
DDR_B_MA13
DDR_B_MA11DDR_B_MA10
DDR_B_BS#2DDR_A_BS#0<13>DDR_A_BS#1<13>
DDR_A_DM[0..7]<13>
DDR_A_MA[0..13]<13>
DDR_A_CAS#<13>DDR_A_RAS#<13>
DDR_B_WE#<14>
DDR_B_CAS#<14>DDR_B_RAS#<14>
DDR_B_MA[0..13]<14>
DDR_B_BS#0<14>DDR_B_BS#1<14>
DDR_A_D[0..63] <13>
DDR_A_DQS[0..7]<13>
DDR_A_WE#<13>
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
9 52Friday, March 11, 2005
2005/03/01 2006/03/01
This Symbol as sameas Intel CRBschematic, So LayoutGuide will show thesesignals routeddifferentially.
T34 PAD
DDR SYSTEM MEMORY B
U5D
ALVISO_BGA1257
SBDQ0 AE31SBDQ1 AE32SBDQ2 AG32SBDQ3 AG36SBDQ4 AE34SBDQ5 AE33SBDQ6 AF31SBDQ7 AF30SBDQ8 AH33SBDQ9 AH32
SBDQ10 AK31SBDQ11 AG30SBDQ12 AG34SBDQ13 AG33SBDQ14 AH31SBDQ15 AJ31SBDQ16 AK30SBDQ17 AJ30SBDQ18 AH29SBDQ19 AH28SBDQ20 AK29SBDQ21 AH30SBDQ22 AH27SBDQ23 AG28SBDQ24 AF24SBDQ25 AG23SBDQ26 AJ22SBDQ27 AK22SBDQ28 AH24SBDQ29 AH23SBDQ30 AG22SBDQ31 AJ21SBDQ32 AG10SBDQ33 AG9SBDQ34 AG8SBDQ35 AH8SBDQ36 AH11SBDQ37 AH10SBDQ38 AJ9SBDQ39 AK9SBDQ40 AJ7SBDQ41 AK6SBDQ42 AJ4SBDQ43 AH5SBDQ44 AK8SBDQ45 AJ8SBDQ46 AJ5
SB_BS0#AJ15SB_BS1#AG17SB_BS2#AG21
SBDQ47 AK4SBDQ48 AG5SBDQ49 AG4SBDQ50 AD8SBDQ51 AD9SBDQ52 AH4SBDQ53 AG6SBDQ54 AE8SBDQ55 AD7SBDQ56 AC5SBDQ57 AB8SBDQ58 AB6SBDQ59 AA8SBDQ60 AC8SBDQ61 AC7SBDQ62 AA4SBDQ63 AA5
SB_CAS#AH14SB_RAS#AK14SB_RCVENIN#AF15SB_RCVENOUT#AF14SB_WE#AH16
SB_MA0AH17SB_MA1AK17SB_MA2AH18SB_MA3AJ18SB_MA4AK18SB_MA5AJ19SB_MA6AK19SB_MA7AH19SB_MA8AJ20SB_MA9AH20SB_MA10AJ16SB_MA11AG18SB_MA12AG20SB_MA13AG15
SB_DQS0#AF35SB_DQS1#AK33SB_DQS2#AK28SB_DQS3#AJ23SB_DQS4#AL10SB_DQS5#AH7SB_DQS6#AF7SB_DQS7#AB5
SB_DQS0AF34SB_DQS1AK32SB_DQS2AJ28SB_DQS3AK23SB_DQS4AM10SB_DQS5AH6SB_DQS6AF8SB_DQS7AB4
SB_DM0AF32SB_DM1AK34SB_DM2AK27SB_DM3AK24SB_DM4AJ10SB_DM5AK5SB_DM6AE7SB_DM7AB7
DDR MEMORY SYSTEM A
U5C
ALVISO_BGA1257
SADQ0 AG35SADQ1 AH35SADQ2 AL35SADQ3 AL37SADQ4 AH36SADQ5 AJ35SADQ6 AK37SADQ7 AL34SADQ8 AM36SADQ9 AN35
SADQ10 AP32SADQ11 AM31SADQ12 AM34SADQ13 AM35SADQ14 AL32SADQ15 AM32SADQ16 AN31SADQ17 AP31SADQ18 AN28SADQ19 AP28SADQ20 AL30SADQ21 AM30SADQ22 AM28SADQ23 AL28SADQ24 AP27SADQ25 AM27SADQ26 AM23SADQ27 AM22SADQ28 AL23SADQ29 AM24SADQ30 AN22SADQ31 AP22SADQ32 AM9SADQ33 AL9SADQ34 AL6SADQ35 AP7SADQ36 AP11SADQ37 AP10SADQ38 AL7SADQ39 AM7SADQ40 AN5SADQ41 AN6SADQ42 AN3SADQ43 AP3SADQ44 AP6SADQ45 AM6SADQ46 AL4SADQ47 AM3SADQ48 AK2SADQ49 AK3SADQ50 AG2SADQ51 AG1SADQ52 AL3SADQ53 AM2SADQ54 AH3SADQ55 AG3SADQ56 AF3SADQ57 AE3SADQ58 AD6SADQ59 AC4SADQ60 AF2SADQ61 AF1SADQ62 AD4SADQ63 AD5
SA_BS0#AK15SA_BS1#AK16SA_BS2#AL21
SA_DM0AJ37SA_DM1AP35SA_DM2AL29SA_DM3AP24SA_DM4AP9SA_DM5AP4SA_DM6AJ2SA_DM7AD3
SA_DQS0AK36SA_DQS1AP33SA_DQS2AN29SA_DQS3AP23SA_DQS4AM8SA_DQS5AM4SA_DQS6AJ1SA_DQS7AE5
SA_DQS0#AK35SA_DQS1#AP34SA_DQS2#AN30SA_DQS3#AN23SA_DQS4#AN8SA_DQS5#AM5SA_DQS6#AH1SA_DQS7#AE4
SA_MA0AL17SA_MA1AP17SA_MA2AP18SA_MA3AM17SA_MA4AN18SA_MA5AM18SA_MA6AL19SA_MA7AP20SA_MA8AM19SA_MA9AL20SA_MA10AM16SA_MA11AN20SA_MA12AM20SA_MA13AM15
SA_CAS#AN15SA_RAS#AP16SA_RCVENIN#AF29SA_RCVENOUT#AF28SA_WE#AP15
T38 PAD
T35 PADT36 PAD T33 PAD
T37 PAD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEG_RXN0PEG_RXN1PEG_RXN2PEG_RXN3PEG_RXN4PEG_RXN5
PEG_RXN7PEG_RXN6
PEG_RXN8PEG_RXN9
PEG_RXN11PEG_RXN10
PEG_RXN14PEG_RXN15
PEG_RXN13PEG_RXN12
PEG_RXP1
PEG_RXP3PEG_RXP2
PEG_RXP6PEG_RXP7
PEG_RXP5PEG_RXP4
PEG_RXP11
PEG_RXP9PEG_RXP8
PEG_RXP12PEG_RXP13
PEG_RXP15PEG_RXP14
PEG_RXP10
PEG_TXN0PEG_TXN1
PEG_TXN3PEG_TXN2
PEG_TXN6PEG_TXN7
PEG_TXN5PEG_TXN4
PEG_TXN11
PEG_TXN9PEG_TXN8
PEG_TXN12PEG_TXN13
PEG_TXN15PEG_TXN14
PEG_TXN10
PEG_TXP0PEG_TXP1
PEG_TXP3PEG_TXP2
PEG_TXP6PEG_TXP7
PEG_TXP5PEG_TXP4
PEG_TXP11
PEG_TXP9PEG_TXP8
PEG_TXP12PEG_TXP13
PEG_TXP15PEG_TXP14
PEG_TXP10
PEG_RXN[0..15]
PEG_TXN[0..15]
PEG_TXP[0..15]
PEG_RXP[0..15]PEG_RXP0
PEGCOMP
LVDS_A0-LVDS_A1-LVDS_A2-
LVDS_A1+LVDS_A2+
LVDS_A0+
LVDS_B1-LVDS_B2-
LVDS_B0+LVDS_B1+LVDS_B2+
LVDS_B0-
LVDS_BC+LVDS_BC-LVDS_AC+LVDS_AC-
CLK_DDC2DAT_DDC2
LCD_CLK
LCD_DAT
LCD_CLKLCD_DAT
BIABK_EN
LCTLA_CLKLCTLB_DAT
LCTLA_CLK
LCTLB_DAT
EN_LCDVDD
CLK_DDC2
DAT_DDC2BIA<16,32>
Y/G<17>COMP/B<17>C/R<17>
CLK_MCH_3GPLL#<18>CLK_MCH_3GPLL<18>
CLK_DDC2<17>
VSYNC<17>HSYNC<17>
DAT_DDC2<17>CRT_BLU<17>
CRT_GRN<17>
CRT_RED<17>
BK_EN<16>
LVDS_AC-<16>LVDS_AC+<16>LVDS_BC-<16>LVDS_BC+<16>
LVDS_A0-<16>LVDS_A1-<16>LVDS_A2-<16>
LVDS_A0+<16>LVDS_A1+<16>LVDS_A2+<16>
LVDS_B0-<16>LVDS_B1-<16>LVDS_B2-<16>
LVDS_B0+<16>LVDS_B1+<16>LVDS_B2+<16>
EN_LCDVDD<16>
LCD_CLK<16>LCD_DAT<16>
PEG_RXN[0..15] <16>
PEG_RXP[0..15] <16>
PEG_TXN[0..15] <16>
PEG_TXP[0..15] <16>
+1.5VS_PCIE
+2.5VS
+2.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
10 52Friday, March 11, 2005
2005/03/01 2006/03/01
This Symbol as sameas Intel CRBschematic, So LayoutGuide will show thesesignals routeddifferentially.
R29 3K_0402_5%@1 2
R364 2.2K_0402_5%
1 2
R362 2.2K_0402_5%
1 2
R363 2.2K_0402_5%
1 2
R303K_0402_5%@
1 2
R34
150_
0402
_1%
1@
12
R3781.5K_0402_1%
12
MISC
TV
VGA
LVDS
PCI - EXPRESS GRAPHICS
U5G
ALVISO_BGA1257
SDVOCTRL_DATAH24SDVOCTRL_CLKH25GCLKNAB29GCLKPAC29
TVDAC_AA15TVDAC_BC16TVDAC_CA17TV_REFSETJ18TV_IRTNAB15TV_IRTNBB16TV_IRTNCB17
GREEN#B20
HSYNCG21
DDCCLKE24DDCDATAE23BLUEE21BLUE#D21GREENC20
REDA19RED#B19VSYNCH21
REFSETJ20
LDDC_CLKF23
LBKLT_CTLE25LBKLT_ENF25LCTLA_CLKC23LCTLB_DATAC22
LDDC_DATAF22LVDD_ENF26LIBGC33LVBGC31LVREFHF28LVREFLF27
LACLKNB30LACLKPB29LBCLKNC25LBCLKPC24
LADATAN0B34LADATAN1B33LADATAN2B32
LADATAP0A34LADATAP1A33LADATAP2B31
LBDATAN0C29LBDATAN1D28LBDATAN2C27
LBDATAP2C26
EXP_COMPI D36EXP_ICOMPO D34
EXP_RXN0/SDVO_TVCLKIN# E30EXP_RXN1/SDVO_INT# F34
EXP_RXN2/SDVO_FLDSTALL# G30EXP_RXN3 H34EXP_RXN4 J30EXP_RXN5 K34EXP_RXN6 L30EXP_RXN7 M34EXP_RXN8 N30EXP_RXN9 P34
EXP_RXN10 R30EXP_RXN11 T34EXP_RXN12 U30EXP_RXN13 V34EXP_RXN14 W30EXP_RXN15 Y34
EXP_RXP0/SDVO_TVCLKIN D30EXP_RXP1/SDVO_INT E34
EXP_RXP2/SDVO_FLDSTALL F30EXP_RXP3 G34EXP_RXP4 H30EXP_RXP5 J34EXP_RXP6 K30EXP_RXP7 L34EXP_RXP8 M30EXP_RXP9 N34
EXP_RXP10 P30EXP_RXP11 R34EXP_RXP12 T30EXP_RXP13 U34EXP_RXP14 V30EXP_RXP15 W34
EXP_TXN0/SDVOB_RED# E32EXP_TXN1/SDVOB_GREEN# F36
EXP_TXN2/SDVOB_BLUE# G32EXP_TXN3/SDVOB_CLKN H36EXP_TXN4/SDVOC_RED# J32
EXP_TXN5/SDVOC_GREEN# K36EXP_TXN6/SDVOC_BLUE# L32EXP_TXN7/SDVOC_CLKN M36
EXP_TXN8 N32EXP_TXN9 P36
EXP_TXN10 R32EXP_TXN11 T36EXP_TXN12 U32EXP_TXN13 V36EXP_TXN14 W32EXP_TXN15 Y36
EXP_TXP0/SDVOB_RED D32EXP_TXP1/SDVOB_GREEN E36
EXP_TXP2/SDVOB_BLUE F32EXP_TXP3/SDVOB_CLKP G36EXP_TXP4/SDVOC_RED H32
EXP_TXP5/SDVOC_GREEN J36EXP_TXP6/SDVOC_BLUE K32EXP_TXP7/SDVOC_CLKP L36
EXP_TXP8 M32EXP_TXP9 N36
EXP_TXP10 P32EXP_TXP11 R36EXP_TXP12 T32EXP_TXP13 U36EXP_TXP14 V32EXP_TXP15 W36LBDATAP0C28
LBDATAP1D27
R429255_0402_1%
1 2
R33
150_
0402
_1%
1@
12
R396 100K_0402_1%
1 2
R385 2.2K_0402_5%
1 2
R4284.99K_0603_1%
12
R360 2.2K_0402_5%
1 2
R3920_0402_5%
1@
1 2
R361 2.2K_0402_5%
1 2
R32
150_
0402
_1%
1@
12
R404100K_0402_1%
1 2
R4024.9_0603_1% 1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
V1.8_DDR_CAP3V1.8_DDR_CAP4V1.8_DDR_CAP6
V1.8_DDR_CAP4V1.8_DDR_CAP6
3GRLL_R
V1.8_DDR_CAP3
+1.5VS_PM
VCC_SYNC
VCC_SYNC
+2.5VS_PM
V1.8_DDR_CAP5
V1.8_DDR_CAP2
V1.8_DDR_CAP1V1.8_DDR_CAP2
V1.8_DDR_CAP1
V1.8_DDR_CAP5
+1.5VS_PM
+2.5VS_PM
+2.5VS_LVDSPM
+1.5VS
+1.5VS_DPLLA+1.5VS_DPLLB
+1.5VS+1.5VS_DDRDLL
+1.5VS
+1.5VS+1.5VS_3GPLL
+2.5VS+2.5VS_3GBG
+VCCP
+2.5V
+1.5VS_MPLL
+1.5VS
+1.5VS_MPLL
+1.5VS_HPLL
+1.5VS
+1.5VS_HPLL
+1.5VS
+1.5VS_DPLLB
+1.5VS
+1.5VS_DPLLA
+1.5VS
+2.5VS
+2.5VS
+VCCP
+1.5VS_PCIE
+2.5VS
+2.5VS
+2.5VS
+2.5VS
+3VS
+1.5VS
+2.5V+VCCP+VCCP
+VCCP +VCCP+2.5VS +3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
11 52Friday, March 11, 2005
2005/03/01 2006/03/01
Note : All VCCSM pinshorted internally.
W=20 mils
Note: Place near chip.
Close B26,B25,A25
Route VSSA3GBG gnd from GMCH todecoupling cap ground lead andthen connect to the gnd plane.
C52
0.22
U_0
603_
10V
7K 1
2
C43
310
U_1
206_
6.3V
6M
1
2
C3630.022U_0402_16V7K
1
2
C35
30.
022U
_040
2_16
V7K
1
2
C12
610
U_1
206_
6.3V
6M
1
2
C3294.7U_0805_6.3V6K
1
2
C30
10U
_120
6_6.
3V6M
1
2
C3650.1U_0402_16V4Z
1
2
C33
90.
022U
_040
2_16
V7K
1
2C38
80.
1U_0
402_
16V
4Z
1
2
+
C13
110
0U_D
2_6.
3VM 1
2
C418
0.1U_0402_16V
4Z
1
2
POWER
U5F
ALVISO_BGA1257
VTT0K13VTT1J13VTT2K12VTT3W11VTT4V11VTT5U11VTT6T11VTT7R11VTT8P11VTT9N11VTT10M11VTT11L11VTT12K11VTT13W10VTT14V10VTT15U10VTT16T10VTT17R10VTT18P10VTT19N10VTT20M10VTT21K10VTT22J10VTT23Y9VTT24W9VTT25U9VTT26R9VTT27P9VTT28N9VTT29M9VTT30L9VTT31J9VTT32N8VTT33M8VTT34N7VTT35M7VTT36N6VTT37M6VTT38A6VTT39N5VTT40M5VTT41N4VTT42M4VTT43N3VTT44M3VTT45N2VTT46M2VTT47B2VTT48V1VTT49N1VTT50M1VTT51G1
VCCSM0 AM37VCCSM1 AH37VCCSM2 AP29VCCSM3 AD28VCCSM4 AD27VCCSM5 AC27VCCSM6 AP26VCCSM7 AN26VCCSM8 AM26VCCSM9 AL26
VCCSM10 AK26VCCSM11 AJ26VCCSM12 AH26VCCSM13 AG26VCCSM14 AF26VCCSM15 AE26VCCSM16 AP25VCCSM17 AN25VCCSM18 AM25VCCSM19 AL25VCCSM20 AK25VCCSM21 AJ25VCCSM22 AH25VCCSM23 AG25VCCSM24 AF25VCCSM25 AE25VCCSM26 AE24VCCSM27 AE23VCCSM28 AE22VCCSM29 AE21VCCSM30 AE20VCCSM31 AE19VCCSM32 AE18VCCSM33 AE17VCCSM34 AE16VCCSM35 AE15VCCSM36 AE14VCCSM37 AP13VCCSM38 AN13VCCSM39 AM13VCCSM40 AL13VCCSM41 AK13VCCSM42 AJ13VCCSM43 AH13VCCSM44 AG13VCCSM45 AF13VCCSM46 AE13VCCSM47 AP12VCCSM48 AN12VCCSM49 AM12VCCSM50 AL12VCCSM51 AK12VCCSM52 AJ12VCCSM53 AH12VCCSM54 AG12VCCSM55 AF12VCCSM56 AE12VCCSM57 AD11VCCSM58 AC11VCCSM59 AB11VCCSM60 AB10VCCSM61 AB9VCCSM62 AP8VCCSM63 AM1VCCSM64 AE1
C14
00.
1U_0
402_
16V
4Z
1
2
C412
0.1U_0402_16V
4Z
1
2
C39
90.
1U_0
402_
16V
4Z
1
2
C43
80.
1U_0
402_
16V
4Z
1
2
C429
0.1U_0402_16V
7K
1
2
R740 0_0603_5% 1@1 2
C34
10.
1U_0
402_
16V
4Z
1
2
C475
0.1U_0402_16V
7K
1
2L26
0_0603_5%12
C29
0.47
U_0
603_
16V
7K
1
2
L13CHB1608U301_0603
12
L19CHB1608U301_0603
1 2
C678
0.1U_0402_16V
4Z
1
2
D22
1N4148_SOD80
@
12
POWER
U5E
ALVISO_BGA1257
VCC0T29VCC1R29VCC2N29VCC3M29VCC4K29VCC5J29VCC6V28VCC7U28VCC8T28VCC9R28VCC10P28VCC11N28VCC12M28VCC13L28VCC14K28VCC15J28VCC16H28VCC17G28VCC18V27VCC19U27VCC20T27VCC21R27VCC22P27VCC23N27VCC24M27VCC25L27VCC26K27VCC27J27VCC28H27VCC29K26VCC30H26VCC31K25VCC32J25VCC33K24VCC34K23VCC35K22VCC36K21VCC37W20VCC38U20VCC39T20VCC40K20VCC41V19VCC42U19VCC43K19VCC44W18VCC45V18VCC46T18VCC47K18VCC48K17
VCCD_HMPLL1AC1VCCD_HMPLL2AC2VCCA_DPLLAB23VCCA_DPLLBC35VCCA_HPLLAA1VCCA_MPLLAA2
VCCA_TVDACA0 F17VCCA_TVDACA1 E17VCCA_TVDACB0 D18VCCA_TVDACB1 C18VCCA_TVDACC0 F18VCCA_TVDACC1 E18
VCCA_TVBG H18VSSA_TVBG G18
VCCD_TVDAC D19VCCDQ_TVDAC H17
VCCD_LVDS0 B26VCCD_LVDS1 B25VCCD_LVDS2 A25
VCCA_LVDS A35
VCCHV0 B22VCCHV1 B21VCCHV2 A21
VCCTX_LVDS0 B28VCCTX_LVDS1 A28VCCTX_LVDS2 A27
VCCA_SM0 AF20VCCA_SM1 AP19VCCA_SM2 AF19VCCA_SM3 AF18
VCC3G0 AE37VCC3G1 W37VCC3G2 U37VCC3G3 R37VCC3G4 N37VCC3G5 L37VCC3G6 J37
VCCA_3GPLL0 Y29VCCA_3GPLL1 Y28VCCA_3GPLL2 Y27
VCCA_3GBG F37VSSA_3GBG G37
VCC_SYNC H20
VCCA_CRTDAC0 F19VCCA_CRTDAC1 E19
VSSA_CRTDAC G19
+
C81
330U_D
2E_2.5V
M
1
2
+
C40
333
0U_D
2E_2
.5V
M 1
2
C35
50.
1U_0
402_
16V
4Z
1
2
C420
0.1U_0402_16V
4Z
1
2
C310.1U_0402_16V4Z
1
2
C46
80.
1U_0
402_
16V
7K 1
2
C3400.1U_0402_16V4Z
1
2
C74
0.22
U_0
603_
10V
7K 1
2
C34
60.
01U
_040
2_16
V7K
1
2
L20CHB1608U301_0603
1 2
C33
60.
022U
_040
2_16
V7K
1
2
R7410_0603_5%2@
12
C37
20.
1U_0
402_
16V
4Z
1
2
C685
0.1U_0402_16V
4Z
1
2
R310_0402_5%@
12
C354
0.1U_0402_16V
4Z
1
2
D21
1N4148_SOD80
@
12
C33
410
U_1
206_
6.3V
6M
1
2
C683
0.1U_0402_16V
4Z
1
2
C47
30.
1U_0
402_
16V
4Z
1
2
C408
0.1U_0402_16V
4Z
1
2
C135
10U_1206_6.3V
6M
1
2
C681
0.1U_0402_16V
4Z
1
2
C34
20.
1U_0
402_
16V
4Z
1
2
R1340.5_0805_1% 1 2
C36
60.
022U
_040
2_16
V7K
1
2
C35
20.
1U_0
402_
16V
4Z
1
2
+
C348
330U_D
2E_2.5V
M
1
2
C676
0.1U_0402_16V
4Z
1
2
+
C330
330U_D
2E_2.5V
M
1
2
10U_1206_6.3V
6M
1
2
C411
0.1U_0402_16V
4Z
1
2
C682
0.1U_0402_16V
4Z
1
2
C345
0.1U_0402_16V
4Z
1
2
C684
0.1U_0402_16V
4Z
1
2
C680
0.1U_0402_16V
4Z
1
2
C404
0.1U_0402_16V
4Z
1
2
C12
80.
1U_0
402_
16V
4Z
1
2
C674
0.1U_0402_16V
4Z
1
2
C39
12.
2U_0
805_
10V
6K
1
2
C47
80.
1U_0
402_
16V
7K 1
2
R739 0_0603_5%1@
1 2
C38
010
U_1
206_
6.3V
6M
1
2
C39
24.
7U_0
805_
6.3V
6K
1
2
L23CHB1608U301_0603
1 2
R805
10K_0402_5%
@
1 2
C34
90.
1U_0
402_
16V
4Z
1
2
R737 0_0603_5%2@ 1 2
C40
90.
1U_0
402_
16V
4Z
1
2
C44
30.
1U_0
402_
16V
7K 1
2
+
C130
330U_D
2E_2.5V
M
1
2
C675
0.1U_0402_16V
4Z
1
2
L14
0_0603_5%12
+
C45
222
0U_D
2_4V
M 1
2
C37
10.
1U_0
402_
16V
4Z
1
2
C413
0.1U_0402_16V
4Z
1
2
C28
0.47
U_0
603_
16V
7K 1
2
R736 0_0603_5%1@1 2
C36
70.
1U_0
402_
16V
4Z
1
2
C347
0.1U_0402_16V
4Z
1
2
R738 0_0603_5%2@ 1 2
C465
0.1U_0402_16V
7K
1
2
C39
310
U_1
206_
6.3V
6M
1
2
C127
10U_1206_6.3V
6M
1
2
R806
10K_0402_5%
@
1 2
R280_0402_5%
12
C677
0.1U_0402_16V
4Z
1
2
L11CHB1608U301_0603
1 2
L9
0_0603_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCP +2.5V
+VCCP
+VCCP
+VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
12 52Friday, March 11, 2005
2005/03/01 2006/03/01
C695
0.1U_0402_10V
6K
1
2
C691
0.1U_0402_10V
6K
1
2
C702
0.1U_0402_10V
6K
1
2
C699
0.1U_0402_10V
6K
1
2
C696
0.1U_0402_10V
6K
1
2
C693
0.1U_0402_10V
6K
1
2
C687
0.1U_0402_10V
6K
1
2
C689
0.1U_0402_10V
6K
1
2
C694
0.1U_0402_10V
6K
1
2
C690
0.1U_0402_10V
6K
1
2
C698
0.1U_0402_10V
6K
1
2C
703
0.1U_0402_10V
6K1
2
VSS
U5I
ALVISO_BGA1257
VSS271Y1VSS270D2VSS269G2VSS268J2VSS260L2VSS259P2VSS258T2VSS257V2VSS256AD2VSS255AE2VSS254AH2VSS253AL2VSS252AN2VSS251A3VSS250C3VSS249AA3VSS248AB3VSS247AC3VSS246AJ3VSS245C4VSS244H4VSS243L4VSS242P4VSS241U4VSS240Y4VSS239AF4VSS238AN4VSS237E5VSS236W5VSS235AL5VSS234AP5VSS233B6VSS232J6VSS231L6VSS230P6VSS229T6VSS228AA6VSS227AC6VSS226AE6VSS225AJ6VSS224G7VSS223V7VSS222AA7VSS221AG7VSS220AK7VSS219AN7VSS218C8VSS217E8VSS216L8VSS215P8VSS214Y8VSS213AL8VSS212A9VSS211H9VSS210K9VSS209T9VSS208V9VSS207AA9VSS206AC9VSS205AE9VSS204AH9VSS203AN9VSS202D10VSS201L10VSS200Y10
VSSALVDS B36
VSS199AA10VSS198F11VSS197H11VSS196Y11
VSS195 AA11VSS194 AF11VSS193 AG11VSS192 AJ11VSS191 AL11VSS190 AN11VSS189 B12VSS188 D12VSS187 J12VSS186 A14VSS185 B14VSS184 F14VSS183 J14VSS182 K14VSS181 AG14VSS180 AJ14VSS179 AL14VSS178 AN14VSS177 C15VSS176 K15VSS175 A16VSS174 D16VSS173 H16VSS172 K16VSS171 AL16VSS170 C17VSS169 G17VSS168 AF17VSS167 AJ17VSS166 AN17VSS165 A18VSS164 B18VSS163 U18VSS162 AL18VSS161 C19VSS160 H19VSS159 J19VSS158 T19VSS157 W19VSS156 AG19VSS155 AN19VSS154 A20VSS153 D20VSS152 E20VSS151 F20VSS150 G20VSS149 V20VSS148 AK20VSS147 C21VSS146 F21VSS145 AF21VSS144 AN21VSS143 A22VSS142 D22VSS141 E22VSS140 J22VSS139 AH22VSS138 AL22VSS137 H23VSS136 AF23VSS135 B24VSS134 D24VSS133 F24VSS132 J24VSS131 AG24VSS130 AJ24
C688
0.1U_0402_10V
6K
1
2
VSS
U5J
ALVISO_BGA1257
VSS267AL24VSS266AN24VSS265A26VSS264E26VSS263G26VSS262J26VSS261B27VSS129E27VSS128G27VSS127W27VSS126AA27VSS125AB27VSS124AF27VSS123AG27VSS122AJ27VSS121AL27VSS120AN27VSS119E28VSS118W28VSS117AA28VSS116AB28VSS115AC28VSS114A29VSS113D29VSS112E29VSS111F29VSS110G29VSS109H29VSS108L29VSS107P29VSS106U29VSS105V29VSS104W29VSS103AA29VSS102AD29VSS101AG29VSS100AJ29VSS99AM29VSS98C30VSS97Y30VSS96AA30VSS95AB30VSS94AC30VSS93AE30VSS92AP30VSS91D31VSS90E31VSS89F31VSS88G31VSS87H31VSS86J31VSS85K31VSS84L31VSS83M31VSS82N31VSS81P31VSS80R31VSS79T31VSS78U31VSS77V31VSS76W31VSS75AD31VSS74AG31VSS73AL31VSS72A32VSS71C32VSS70Y32VSS69AA32VSS68AB32
VSS67 AC32VSS66 AD32VSS65 AJ32VSS64 AN32VSS63 D33VSS62 E33VSS61 F33VSS60 G33VSS59 H33VSS58 J33VSS57 K33VSS56 L33VSS55 M33VSS54 N33VSS53 P33VSS52 R33VSS51 T33VSS50 U33VSS49 V33VSS48 W33VSS47 AD33VSS46 AF33VSS45 AL33VSS44 C34VSS43 AA34VSS42 AB34VSS41 AC34VSS40 AD34VSS39 AH34VSS38 AN34VSS37 B35VSS36 D35VSS35 E35VSS34 F35VSS33 G35VSS32 H35VSS31 J35VSS30 K35VSS29 L35VSS28 M35VSS27 N35VSS26 P35VSS25 R35VSS24 T35VSS23 U35VSS22 V35VSS21 W35VSS20 Y35VSS19 AE35VSS18 C36VSS17 AA36VSS16 AB36VSS15 AC36VSS14 AD36VSS13 AE36VSS12 AF36VSS11 AJ36VSS10 AL36
VSS9 AN36VSS8 E37VSS7 H37VSS6 K37VSS5 M37VSS4 P37VSS3 T37VSS2 V37VSS1 Y37VSS0 AG37
C697
0.1U_0402_10V
6K
1
2
C692
0.1U_0402_10V
6K
1
2
C686
0.1U_0402_10V
6K
1
2
NCTF
U5H
ALVISO_BGA1257
VCCSM_NCTF31 AB12VCCSM_NCTF30 AC12VCCSM_NCTF29 AD12VCCSM_NCTF28 AB13VCCSM_NCTF27 AC13VCCSM_NCTF26 AD13VCCSM_NCTF25 AC14VCCSM_NCTF24 AD14VCCSM_NCTF23 AC15VCCSM_NCTF22 AD15VCCSM_NCTF21 AC16VCCSM_NCTF20 AD16VCCSM_NCTF19 AC17VCCSM_NCTF18 AD17VCCSM_NCTF17 AC18VCCSM_NCTF16 AD18VCCSM_NCTF15 AC19VCCSM_NCTF14 AD19VCCSM_NCTF13 AC20VCCSM_NCTF12 AD20VCCSM_NCTF11 AC21VCCSM_NCTF10 AD21
VCCSM_NCTF9 AC22VCCSM_NCTF8 AD22VCCSM_NCTF7 AC23VCCSM_NCTF6 AD23VCCSM_NCTF5 AC24VCCSM_NCTF4 AD24VCCSM_NCTF3 AC25VCCSM_NCTF2 AD25VCCSM_NCTF1 AC26
VCC_NCTF78 L17VCC_NCTF77 M17VCC_NCTF76 N17VCC_NCTF75 P17VCC_NCTF74 T17VCC_NCTF73 U17VCC_NCTF72 V17VCC_NCTF71 W17VCC_NCTF70 L18VCC_NCTF69 M18VCC_NCTF68 N18VCC_NCTF67 P18VCC_NCTF66 R18VCC_NCTF65 Y18VCC_NCTF64 L19VCC_NCTF63 M19VCC_NCTF62 N19VCC_NCTF61 P19VCC_NCTF60 R19VCC_NCTF59 Y19VCC_NCTF58 L20VCC_NCTF57 M20VCC_NCTF56 N20VCC_NCTF55 P20VCC_NCTF54 R20VCC_NCTF53 Y20VCC_NCTF52 L21VCC_NCTF51 M21VCC_NCTF50 N21VCC_NCTF49 P21VCC_NCTF48 T21VCC_NCTF47 U21VCC_NCTF46 V21VCC_NCTF45 W21VCC_NCTF44 L22VCC_NCTF43 M22VCC_NCTF42 N22VCC_NCTF41 P22VCC_NCTF40 R22VCC_NCTF39 T22VCC_NCTF38 U22VCC_NCTF37 V22VCC_NCTF36 W22VCC_NCTF35 L23VCC_NCTF34 M23VCC_NCTF33 N23VCC_NCTF32 P23VCC_NCTF31 R23VCC_NCTF30 T23VCC_NCTF29 U23VCC_NCTF28 V23VCC_NCTF27 W23VCC_NCTF26 L24VCC_NCTF25 M24VCC_NCTF24 N24VCC_NCTF23 P24VCC_NCTF22 R24VCC_NCTF21 T24VCC_NCTF20 U24VCC_NCTF19 V24VCC_NCTF18 W24VCC_NCTF17 L25VCC_NCTF16 M25VCC_NCTF15 N25VCC_NCTF14 P25VCC_NCTF13 R25VCC_NCTF12 T25VCC_NCTF11 U25
VCCSM_NCTF0 AD26
VTT_NCTF17L12VTT_NCTF16M12VTT_NCTF15N12VTT_NCTF14P12VTT_NCTF13R12VTT_NCTF12T12VTT_NCTF11U12VTT_NCTF10V12VTT_NCTF9W12VTT_NCTF8L13VTT_NCTF7M13VTT_NCTF6N13VTT_NCTF5P13VTT_NCTF4R13VTT_NCTF3T13VTT_NCTF2U13VTT_NCTF1V13VTT_NCTF0W13
VSS_NCTF68Y12VSS_NCTF67AA12VSS_NCTF66Y13VSS_NCTF65AA13VSS_NCTF64L14VSS_NCTF63M14VSS_NCTF62N14VSS_NCTF61P14VSS_NCTF60R14VSS_NCTF59T14VSS_NCTF58U14VSS_NCTF57V14VSS_NCTF56W14VSS_NCTF55Y14VSS_NCTF54AA14VSS_NCTF53AB14VSS_NCTF52L15VSS_NCTF51M15VSS_NCTF50N15VSS_NCTF49P15VSS_NCTF48R15VSS_NCTF47T15VSS_NCTF46U15VSS_NCTF45V15VSS_NCTF44W15VSS_NCTF43Y15VSS_NCTF42AA15VSS_NCTF41AB15VSS_NCTF40L16VSS_NCTF39M16VSS_NCTF38N16VSS_NCTF37P16VSS_NCTF36R16VSS_NCTF35T16VSS_NCTF34U16VSS_NCTF33V16VSS_NCTF32W16VSS_NCTF31Y16VSS_NCTF30AA16VSS_NCTF29AB16VSS_NCTF28R17VSS_NCTF27Y17VSS_NCTF26AA17VSS_NCTF25AB17VSS_NCTF24AA18VSS_NCTF23AB18VSS_NCTF22AA19VSS_NCTF21AB19VSS_NCTF20AA20VSS_NCTF19AB20VSS_NCTF18R21VSS_NCTF17Y21VSS_NCTF16AA21VSS_NCTF15AB21VSS_NCTF14Y22VSS_NCTF13AA22VSS_NCTF12AB22VSS_NCTF11Y23VSS_NCTF10AA23VSS_NCTF9AB23VSS_NCTF8Y24VSS_NCTF7AA24VSS_NCTF6AB24VSS_NCTF5Y25VSS_NCTF4AA25VSS_NCTF3AB25VSS_NCTF2Y26VSS_NCTF1AA26VSS_NCTF0AB26
VCC_NCTF10V25VCC_NCTF9W25VCC_NCTF8L26VCC_NCTF7M26VCC_NCTF6N26VCC_NCTF5P26VCC_NCTF4R26VCC_NCTF3T26VCC_NCTF2U26VCC_NCTF1V26VCC_NCTF0W26
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
DDR_A_BS#1
DDR_A_MA9
DDR_A_MA12DDR_A_MA11
DDR_A_MA6DDR_A_MA3
DDR_A_MA0DDR_A_MA10
DDR_A_MA1DDR_A_MA2
DDR_A_MA5
DDR_A_CAS#DDR_A_RAS#DDR_A_BS#0DDR_A_WE#
DDR_A_MA8DDR_A_MA7
DDR_A_MA4
DDR_A_D[0..63]
DDR_A_DM[0..7]
DDR_A_MA[0..13]
DDR_A_DQS[0..7]
DDR_A_D24
DDR_A_D19
DDR_A_D1
DDR_A_D2DDR_A_D5
DDR_A_D3DDR_A_DM0
DDR_A_DQS0DDR_A_D0
DDR_A_D13
DDR_A_D7
DDR_A_D8
DDR_A_D6
DDR_A_D9DDR_A_DM1DDR_A_D12DDR_A_DQS1
DDR_A_D11
DDR_A_D14
DDR_A_D20DDR_A_D21
DDR_A_D17
DDR_A_D15
DDR_A_D10
DDR_A_D16
DDR_A_D28
DDR_A_D23DDR_A_D22DDR_A_DM2DDR_A_D18DDR_A_DQS2
DDR_CKE1DDR_SCS#1DDR_SCS#0
DDR_CKE0
CK_SCLK
DDR_CKE1 DDR_CKE0
DDR_SCS#0 DDR_SCS#1
DDR_A_MA5DDR_A_MA3
DDR_A_MA7
DDR_A_MA1
DDR_A_MA12DDR_A_MA9
DDR_A_MA10
DDR_DQS0
DDR_DQS2
DDR_DQS1
DDR_DQS3
DDR_DQS4
DDR_DQS5
DDR_A_WE#DDR_A_BS#0
DDR_D6
DDR_D4
DDR_D2
DDR_D0
DDR_D10
DDR_D8
DDR_D12
DDR_D14
DDR_D22
DDR_D18
DDR_D20
DDR_D24
DDR_D26
DDR_D16
DDR_D28
DDR_D30
DDR_D39
DDR_D35
DDR_D41
DDR_D33DDR_D36
DDR_D45
DDR_A_MA0DDR_A_MA2
DDR_A_MA6DDR_A_MA4
DDR_A_MA8DDR_A_MA11
DDR_DM6
DDR_DM3
DDR_DM0
DDR_DM1
DDR_DM7
DDR_DM2
DDR_DM4
DDR_DM5
DDR_A_CAS#DDR_A_RAS#DDR_A_BS#1
DDR_D11
DDR_D9
DDR_D23
DDR_D21
DDR_D27
DDR_D29
DDR_D25
DDR_D34
DDR_D32DDR_D37
DDR_D47DDR_D43
DDR_D40
DDR_D51
DDR_D44
DDR_D49DDR_D48
DDR_D62
DDR_D61
DDR_D57
DDR_D42DDR_D46
DDR_DQS6
DDR_D19
DDR_D56
DDR_D50
DDR_D17
DDR_D38
DDR_D31
DDR_D55
CK_SDATA
DDR_D5
DDR_D54
DDR_D7
DDR_D15
DDR_D1
DDR_D60
DDR_DQS7
DDR_D53
DDR_D3DDR_D13
DDR_D52
DDR_A_DQS3DDR_A_D29
DDR_A_DM3DDR_A_D25
DDR_A_D31DDR_A_D26DDR_A_D30DDR_A_D27
DDR_A_D36
DDR_A_D34
DDR_A_DQS4
DDR_A_D38DDR_A_D35
DDR_A_D32DDR_A_D33DDR_A_D37
DDR_A_D39
DDR_A_DM4
DDR_A_MA13
DDR_D63DDR_D59
DDR_A_MA13
DDR_D4DDR_D1DDR_D5DDR_D2
DDR_A_D60DDR_A_DQS7
DDR_A_D59DDR_A_D62
DDR_A_D56
DDR_A_D61
DDR_A_D51DDR_A_D50
DDR_A_D57
DDR_A_DQS6
DDR_A_D55
DDR_A_DQS5DDR_A_D45
DDR_A_D44
DDR_A_D43
DDR_A_D48
DDR_A_D42
DDR_A_D47
DDR_A_D53
DDR_A_D49
DDR_A_D46
DDR_A_D52
DDR_A_D41DDR_A_D40
DDR_A_D54
DDR_A_DM5
DDR_A_DM7
DDR_A_DM6
DDR_A_D63DDR_A_D58
DDR_DM0DDR_D3DDR_DQS0DDR_D0DDR_D7DDR_D6
DDR_D13DDR_D11DDR_D10DDR_D8DDR_D9DDR_DM1DDR_D12DDR_DQS1DDR_D14DDR_D15
DDR_D20DDR_D21DDR_D16DDR_D17DDR_DQS2DDR_D18DDR_DM2DDR_D22DDR_D23DDR_D19
DDR_D28DDR_D24DDR_D29DDR_DQS3DDR_D25DDR_DM3DDR_D31DDR_D26DDR_D30DDR_D27
DDR_D36DDR_D37DDR_D33DDR_D32DDR_D34DDR_D35DDR_D38DDR_D39DDR_DQS4DDR_DM4
DDR_D44DDR_D41DDR_D40DDR_D45DDR_DQS5DDR_D43DDR_D42DDR_D46DDR_D47DDR_DM5
DDR_D53DDR_D48DDR_D52DDR_D49DDR_D55DDR_D54DDR_D50DDR_D51DDR_DM6DDR_DQS6
DDR_D58DDR_D63DDR_D61DDR_D57DDR_D56DDR_DM7DDR_D59DDR_D62DDR_D60DDR_DQS7
DDR_A_D4
DDR_D[0..63]
DDR_DM[0..7]
DDR_DQS[0..7]
DDR_D58
DDR_A_D[0..63]<9>
DDR_A_DM[0..7]<9>
DDR_A_DQS[0..7]<9>
DDR_D[0..63] <14>
DDR_DM[0..7] <14>
DDR_DQS[0..7] <14>
DDR_A_MA[0..13]<9>
DDR_CLK0<8>DDR_CLK0#<8>
DDR_CKE1<8>
DDR_SCS#0<8>
DDR_A_BS#0<9>DDR_A_WE#<9>
CK_SDATA<14,18>CK_SCLK<14,18>
DDR_CLK1 <8>DDR_CLK1# <8>
DDR_SCS#1 <8>DDR_A_CAS# <9>DDR_A_RAS# <9>DDR_A_BS#1 <9>
DDR_CKE0 <8>
+1.25VS
+2.5V
+3VS
+SDREF
+SDREF_DIMM+2.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
B
13 52Friday, March 11, 2005
2005/03/01 2006/03/01
R679 10_0402_5%1 2
R668 10_0402_5%1 2
R252 10_0402_5%1 2
R263 10_0402_5%1 2
R234 10_0402_5%1 2
R247 10_0402_5%1 2
R240 10_0402_5%1 2
R678 56_0402_5%1 2
R647 10_0402_5%1 2
R655 10_0402_5%1 2
R270 10_0402_5%1 2
R664 10_0402_5%1 2
R666 10_0402_5%1 2
R264 10_0402_5%1 2
R269 10_0402_5%1 2
R649 10_0402_5%1 2
R249 10_0402_5%1 2
R670 10_0402_5%1 2
R659 10_0402_5%1 2
R665 10_0402_5%1 2
R268 10_0402_5%1 2
R661 10_0402_5%1 2
JDIMM2
TYCO_1612560-1
VREF1VSS3DQ05DQ17VDD9DQS011DQ213VSS15DQ317DQ819VDD21DQ923DQS125VSS27DQ1029DQ1131VDD33CK035CK0#37VSS39
DQ1641DQ1743VDD45DQS247DQ1849VSS51DQ1953DQ2455VDD57DQ2559DQS361VSS63DQ2665DQ2767VDD69CB071CB173VSS75DQS877CB279VDD81CB383DU85VSS87CK289CK2#91VDD93CKE195DU97A1299A9101VSS103A7105A5107A3109A1111VDD113A10/AP115BA0117WE#119S0#121DU/A13123VSS125DQ32127DQ33129VDD131DQS4133DQ34135VSS137DQ35139DQ40141VDD143
VREF 2VSS 4DQ4 6DQ5 8VDD 10DM0 12DQ6 14VSS 16DQ7 18
DQ12 20VDD 22
DQ13 24DM1 26VSS 28
DQ14 30DQ15 32VDD 34VDD 36VSS 38VSS 40
DQ20 42DQ21 44VDD 46DM2 48
DQ22 50VSS 52
DQ23 54DQ28 56VDD 58
DQ29 60DM3 62VSS 64
DQ30 66DQ31 68VDD 70CB4 72CB5 74VSS 76DM8 78CB6 80VDD 82CB7 84
DU/RESET# 86VSS 88VSS 90VDD 92VDD 94
CKE0 96DU 98
A11 100A8 102
VSS 104A6 106A4 108A2 110A0 112
VDD 114BA1 116
RAS# 118CAS# 120
S1# 122DU 124
VSS 126DQ36 128DQ37 130VDD 132DM4 134
DQ38 136VSS 138
DQ39 140DQ44 142VDD 144
DQ41145DQS5147VSS149DQ42151DQ43153VDD155VDD157VSS159VSS161DQ48163DQ49165VDD167DQS6169DQ50171VSS173DQ51175DQ56177VDD179DQ57181DQS7183VSS185DQ58187DQ59189VDD191SDA193SCL195VDD_SPD197VDD_ID199
DQ45 146DM5 148VSS 150
DQ46 152DQ47 154VDD 156
CK1# 158CK1 160VSS 162
DQ52 164DQ53 166VDD 168DM6 170
DQ54 172VSS 174
DQ55 176DQ60 178VDD 180
DQ61 182DM7 184VSS 186
DQ62 188DQ63 190VDD 192SA0 194SA1 196SA2 198DU 200
R277 56_0402_5%1 2
C2370.1U_0402_16V4Z
1
2
R265 10_0402_5%1 2
R256 10_0402_5%1 2
R288 56_0402_5%1 2
R691 10_0402_5%1 2
R674 56_0402_5%1 2
R235 10_0402_5%1 2
R251 10_0402_5%1 2
R652 10_0402_5%1 2
R683 10_0402_5%1 2
R693 10_0402_5%1 2
R676 56_0402_5%1 2
R287 56_0402_5%1 2
R236 10_0402_5%1 2
R266 10_0402_5%1 2
R677 56_0402_5%1 2
R250 10_0402_5%1 2
R684 10_0402_5%1 2
R646 10_0402_5%1 2
R245 10_0402_5%1 2
R271 10_0402_5%1 2
R257 10_0402_5%1 2
R282 56_0402_5%1 2
R648 10_0402_5%1 2
R283 56_0402_5%1 2
R237 10_0402_5%1 2
R660 10_0402_5%1 2
R242 10_0402_5%1 2
R286 56_0402_5%1 2
R260 10_0402_5%1 2
R656 10_0402_5%1 2
R657 10_0402_5%1 2
R241 10_0402_5%1 2
R685 10_0402_5%1 2
R294 56_0402_5%1 2
R688 10_0402_5%1 2
R280 56_0402_5%1 2
R681 10_0402_5%1 2
R253 10_0402_5%1 2
R650 10_0402_5%1 2
R672 56_0402_5%1 2
R244 10_0402_5%1 2
R238 10_0402_5%1 2
R673 56_0402_5%1 2
R279 56_0402_5%1 2
R682 10_0402_5%1 2
R690 10_0402_5%1 2
R267 10_0402_5%1 2
R243 10_0402_5%1 2
R274 10_0402_5%1 2
R692 10_0402_5%1 2
R254 10_0402_5%1 2
R651 10_0402_5%1 2
R675 56_0402_5%1 2
R680 10_0402_5%1 2
R275 56_0402_5%1 2
R248 10_0402_5%1 2
R246 10_0402_5%1 2
R255 10_0402_5%1 2
R273 10_0402_5%1 2
R663 10_0402_5%1 2
R276 56_0402_5%1 2
R653 10_0402_5%1 2
R278 56_0402_5%1 2
R233 10_0402_5%1 2
R296 56_0402_5%1 2
R295 56_0402_5%1 2
R239 10_0402_5%1 2
R281 56_0402_5%1 2
R261 10_0402_5%1 2
R272 10_0402_5%1 2
R654 10_0402_5%1 2
R658 10_0402_5%1 2
R662 10_0402_5%1 2
R687 10_0402_5%1 2
R686 10_0402_5%1 2
R689 10_0402_5%1 2
R669 10_0402_5%1 2
R262 10_0402_5%1 2
R227
0_0402_5%
12
R293 56_0402_5%1 2
R667 10_0402_5%1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CK_SCLK
DDR_SCS#2
DDR_CKE3
DDR_SCS#3
DDR_CKE2
DDR_B_MA5DDR_B_MA3
DDR_B_MA7
DDR_B_MA0DDR_B_MA2
DDR_B_MA1
DDR_B_MA12DDR_B_MA9
DDR_B_MA6DDR_B_MA4
DDR_B_MA10
DDR_B_MA8DDR_B_MA11
CK_SDATA
DDR_B_CAS#DDR_B_WE#DDR_B_RAS#DDR_B_BS#0DDR_B_BS#1
DDR_B_MA[0..13]
DDR_B_BS#1
DDR_B_MA9
DDR_B_MA12DDR_B_MA11
DDR_B_MA0DDR_B_MA10
DDR_B_MA1DDR_B_MA2
DDR_B_MA5
DDR_B_CAS#DDR_B_RAS#DDR_B_BS#0DDR_B_WE#
DDR_B_MA7
DDR_B_MA4
DDR_B_MA8
DDR_B_MA3DDR_B_MA6
DDR_SCS#2DDR_SCS#3
DDR_CKE2DDR_CKE3
DDR_B_MA13
DDR_B_MA13
DDR_D[0..63]
DDR_DM[0..7]
DDR_DQS[0..7]
DDR_DQS0
DDR_DQS1
DDR_DQS2
DDR_DQS3
DDR_DQS4
DDR_DQS5
DDR_DQS6
DDR_DQS7
DDR_D6
DDR_D4
DDR_D2
DDR_D0
DDR_D10
DDR_D8
DDR_D12
DDR_D14
DDR_D22
DDR_D18
DDR_D20
DDR_D24
DDR_D26
DDR_D16
DDR_D28
DDR_D30
DDR_D39
DDR_D35
DDR_D41
DDR_D33
DDR_D42DDR_D46
DDR_D36
DDR_D45
DDR_D54
DDR_D53
DDR_D57
DDR_D58
DDR_D50DDR_D60
DDR_D52
DDR_D59
DDR_DM3
DDR_DM0
DDR_DM1
DDR_DM6
DDR_DM7
DDR_DM2
DDR_DM4
DDR_DM5
DDR_D11
DDR_D5
DDR_D7
DDR_D1
DDR_D3
DDR_D9
DDR_D23
DDR_D19
DDR_D15
DDR_D13
DDR_D21
DDR_D27
DDR_D29
DDR_D17
DDR_D31
DDR_D25
DDR_D34
DDR_D32DDR_D37
DDR_D47
DDR_D38
DDR_D43
DDR_D40
DDR_D44
DDR_D51
DDR_D55
DDR_D63
DDR_D49DDR_D48
DDR_D62
DDR_D61
DDR_D56
DDR_D4DDR_D1DDR_D5DDR_D2
DDR_DM0DDR_D3
DDR_DQS0DDR_D0DDR_D7DDR_D6
DDR_D13DDR_D11DDR_D10
DDR_D8DDR_D9
DDR_DM1DDR_D12
DDR_DQS1DDR_D14DDR_D15
DDR_D20DDR_D21DDR_D16DDR_D17
DDR_DQS2DDR_D18DDR_DM2DDR_D22DDR_D23DDR_D19
DDR_D28DDR_D24DDR_D29
DDR_DQS3DDR_D25DDR_DM3DDR_D31DDR_D26DDR_D30DDR_D27
DDR_D36DDR_D37DDR_D33DDR_D32DDR_D34DDR_D35DDR_D38DDR_D39
DDR_DQS4DDR_DM4
DDR_D44DDR_D41DDR_D40DDR_D45DDR_DQS5DDR_D43DDR_D42DDR_D46DDR_D47DDR_DM5
DDR_D53DDR_D48DDR_D52DDR_D49DDR_D55DDR_D54DDR_D50DDR_D51DDR_DM6DDR_DQS6
DDR_D58DDR_D63DDR_D61DDR_D57DDR_D56DDR_DM7DDR_D59DDR_D62DDR_D60DDR_DQS7
DDR_D[0..63] <13>
DDR_DM[0..7] <13>
DDR_DQS[0..7] <13>
DDR_B_MA[0..13]<9>
DDR_CLK3<8>DDR_CLK3#<8>
DDR_CKE3<8>
DDR_SCS#2<8>
DDR_B_BS#0<9>DDR_B_WE#<9>
CK_SDATA<13,18>CK_SCLK<13,18>
DDR_CLK4# <8>DDR_CLK4 <8>
DDR_SCS#3 <8>
DDR_CKE2 <8>
DDR_B_BS#1 <9>DDR_B_RAS# <9>DDR_B_CAS# <9>
+1.25VS
+2.5V
+3VS
+2.5V+SDREF_DIMM
+1.25VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
B
14 52Friday, March 11, 2005
2005/03/01 2006/03/01
R591 56_0402_5%1 2
R573 56_0402_5%1 2
R206 56_0402_5%1 2
R216 56_0402_5%1 2
R582 56_0402_5%1 2
R211 56_0402_5%1 2
R571 56_0402_5%1 2
R170 56_0402_5%1 2
R186 56_0402_5%1 2
R611 56_0402_5%1 2
R205 56_0402_5%1 2
R208 56_0402_5%1 2
R580 56_0402_5%1 2
R577 56_0402_5%1 2
R184 56_0402_5%1 2
R572 56_0402_5%1 2
R593 56_0402_5%1 2
R180 56_0402_5%1 2
R606 56_0402_5%1 2
R178 56_0402_5%1 2
R213 56_0402_5%1 2
R615 56_0402_5%1 2
R576 56_0402_5%1 2
R570 56_0402_5%1 2
R587 56_0402_5%1 2
R599 56_0402_5%1 2
R201 56_0402_5%1 2
R167 56_0402_5%1 2
R565 56_0402_5%1 2R189 56_0402_5%1 2
R602 56_0402_5%1 2
R601 56_0402_5%1 2
R609 56_0402_5%1 2
R600 56_0402_5%1 2
R586 56_0402_5%1 2
R575 56_0402_5%1 2
R612 56_0402_5%1 2
R181 56_0402_5%1 2
R212 56_0402_5%1 2
R173 56_0402_5%1 2
C1880.1U_0402_16V4Z
1
2
R566 56_0402_5%1 2R168 56_0402_5%1 2
R198 56_0402_5%1 2
R182 56_0402_5%1 2
R597 56_0402_5%1 2
R603 56_0402_5%1 2
R568 56_0402_5%1 2
R574 56_0402_5%1 2
R193 56_0402_5%1 2
R195 56_0402_5%1 2
R177 56_0402_5%1 2
R605 56_0402_5%1 2
R608 56_0402_5%1 2
R191 56_0402_5%1 2
R190 56_0402_5%1 2
R175 56_0402_5%1 2
R187 56_0402_5%1 2
R578 56_0402_5%1 2
R200 56_0402_5%1 2
R610 56_0402_5%1 2
R203 56_0402_5%1 2
R595 56_0402_5%1 2
R583 56_0402_5%1 2
R592 56_0402_5%1 2
R581 56_0402_5%1 2
R204 56_0402_5%1 2
R563 56_0402_5%1 2
R171 56_0402_5%1 2
R176 56_0402_5%1 2
R562 56_0402_5%1 2
R166 56_0402_5%1 2
R209 56_0402_5%1 2
R585 56_0402_5%1 2
R614 56_0402_5%1 2
R185 56_0402_5%1 2
R199 56_0402_5%1 2
R594 56_0402_5%1 2
R179 56_0402_5%1 2
JDIMM1
KLINK_5763-2-111
VREF1VSS3DQ05DQ17VDD9DQS011DQ213VSS15DQ317DQ819VDD21DQ923DQS125VSS27DQ1029DQ1131VDD33CK035CK0#37VSS39
DQ1641DQ1743VDD45DQS247DQ1849VSS51DQ1953DQ2455VDD57DQ2559DQS361VSS63DQ2665DQ2767VDD69CB071CB173VSS75DQS877CB279VDD81CB383DU85VSS87CK289CK2#91VDD93CKE195DU/A1397A1299A9101VSS103A7105A5107A3109A1111VDD113A10/AP115BA0117WE#119S0#121DU123VSS125DQ32127DQ33129VDD131DQS4133DQ34135VSS137DQ35139DQ40141VDD143
VREF 2VSS 4DQ4 6DQ5 8VDD 10DM0 12DQ6 14VSS 16DQ7 18
DQ12 20VDD 22
DQ13 24DM1 26VSS 28
DQ14 30DQ15 32VDD 34VDD 36VSS 38VSS 40
DQ20 42DQ21 44VDD 46DM2 48
DQ22 50VSS 52
DQ23 54DQ28 56VDD 58
DQ29 60DM3 62VSS 64
DQ30 66DQ31 68VDD 70CB4 72CB5 74VSS 76DM8 78CB6 80VDD 82CB7 84
DU/RESET# 86VSS 88VSS 90VDD 92VDD 94
CKE0 96DU/BA2 98
A11 100A8 102
VSS 104A6 106A4 108A2 110A0 112
VDD 114BA1 116
RAS# 118CAS# 120
S1# 122DU 124
VSS 126DQ36 128DQ37 130VDD 132DM4 134
DQ38 136VSS 138
DQ39 140DQ44 142VDD 144
DQ41145DQS5147VSS149DQ42151DQ43153VDD155VDD157VSS159VSS161DQ48163DQ49165VDD167DQS6169DQ50171VSS173DQ51175DQ56177VDD179DQ57181DQS7183VSS185DQ58187DQ59189VDD191SDA193SCL195VDD_SPD197VDD_ID199
DQ45 146DM5 148VSS 150
DQ46 152DQ47 154VDD 156
CK1# 158CK1 160VSS 162
DQ52 164DQ53 166VDD 168DM6 170
DQ54 172VSS 174
DQ55 176DQ60 178VDD 180
DQ61 182DM7 184VSS 186
DQ62 188DQ63 190VDD 192SA0 194SA1 196SA2 198DU 200
R613 56_0402_5%1 2
R192 56_0402_5%1 2
R207 56_0402_5%1 2
R188 56_0402_5%1 2
R567 56_0402_5%1 2
R607 56_0402_5%1 2
R196 56_0402_5%1 2
R194 56_0402_5%1 2
R172 56_0402_5%1 2
R564 56_0402_5%1 2
R165 56_0402_5%1 2
R596 56_0402_5%1 2
R197 56_0402_5%1 2
R569 56_0402_5%1 2
R604 56_0402_5%1 2
R169 56_0402_5%1 2
R210 56_0402_5%1 2
R174 56_0402_5%1 2
R183 56_0402_5%1 2
R215 56_0402_5%1 2
R598 56_0402_5%1 2
R584 56_0402_5%1 2
R214 56_0402_5%1 2
R579 56_0402_5%1 2
R202 56_0402_5%1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+2.5V
+2.5V +2.5V
+1.25VS
+1.25VS
+1.25VS
+1.25VS
+1.25VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
15 52Friday, March 11, 2005
2005/03/01 2006/03/01
Layout note :Distribute as close as possible to DDR-SODIMM.
Layout note :Place one cap close to every 2 pull up resistors termination to+1.25V
C2180.1U_0402_16V4Z
1
2
C2630.1U_0402_16V4Z
1
2
C5830.1U_0402_16V4Z
1
2
C1890.1U_0402_16V4Z
1
2
C5870.1U_0402_16V4Z
1
2
C2460.1U_0402_16V4Z
1
2
C5860.1U_0402_16V4Z
1
2
C5440.1U_0402_16V4Z
1
2
C6520.1U_0402_16V4Z
1
2
C2150.1U_0402_16V4Z
1
2
C5290.1U_0402_16V4Z
1
2
C6470.1U_0402_16V4Z
1
2
C2440.1U_0402_16V4Z
1
2
C2420.1U_0402_16V4Z
1
2
C2540.1U_0402_16V4Z
1
2
C6540.1U_0402_16V4Z
1
2
C2170.1U_0402_16V4Z
1
2
C2160.1U_0402_16V4Z
1
2
C2430.1U_0402_16V4Z
1
2
C6510.1U_0402_16V4Z
1
2
C2020.1U_0402_16V4Z
1
2
+C163150U_D2_6.3VM
1
2
C2000.1U_0402_16V4Z
1
2
C5810.1U_0402_16V4Z
1
2
C2470.1U_0402_16V4Z
1
2
C2280.1U_0402_16V4Z
1
2
+C238150U_D2_6.3VM
1
2
C2490.1U_0402_16V4Z
1
2
C2500.1U_0402_16V4Z
1
2
C5820.1U_0402_16V4Z
1
2
C5360.1U_0402_16V4Z
1
2
C6480.1U_0402_16V4Z
1
2
C2520.1U_0402_16V4Z
1
2
C1910.1U_0402_16V4Z
1
2
C5850.1U_0402_16V4Z
1
2
C5760.1U_0402_16V4Z
1
2
C2550.1U_0402_16V4Z
1
2
C6500.1U_0402_16V4Z
1
2
C2510.1U_0402_16V4Z
1
2
C5900.1U_0402_16V4Z
1
2
C5750.1U_0402_16V4Z
1
2
C5880.1U_0402_16V4Z
1
2
C2480.1U_0402_16V4Z
1
2
C5310.1U_0402_16V4Z
1
2
C6490.1U_0402_16V4Z
1
2
C5300.1U_0402_16V4Z
1
2
C2270.1U_0402_16V4Z
1
2
C5350.1U_0402_16V4Z
1
2
C5800.1U_0402_16V4Z
1
2
C5840.1U_0402_16V4Z
1
2
C1930.1U_0402_16V4Z
1
2
C2660.1U_0402_16V4Z
1
2
C2670.1U_0402_16V4Z
1
2
C2080.1U_0402_16V4Z
1
2
C6550.1U_0402_16V4Z
1
2
C5790.1U_0402_16V4Z
1
2
C2140.1U_0402_16V4Z
1
2
C2450.1U_0402_16V4Z
1
2
C2560.1U_0402_16V4Z
1
2
C2300.1U_0402_16V4Z
1
2
C5890.1U_0402_16V4Z
1
2
C2620.1U_0402_16V4Z
1
2
C2010.1U_0402_16V4Z
1
2
C2290.1U_0402_16V4Z
1
2
C6530.1U_0402_16V4Z
1
2
C6460.1U_0402_16V4Z
1
2
C1900.1U_0402_16V4Z
1
2
C2530.1U_0402_16V4Z
1
2
C5780.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
B+P B+I
B+P
VGA_GRNVGA_RED
VGA_BLU
VSYNC_VGA
CLK_PCIE_VGA#
HSYNCVGA
PEG_RXP0PEG_RXN0
PEG_A_TXN_4PEG_TXN4
PEG_A_TXP_3
PEG_A_TXP_4
PEG_A_TXN_3PEG_TXN3
PEG_TXP4
PEG_TXN5PEG_TXP5
PEG_TXP3
PEG_A_TXN_6
PEG_A_TXP_7
PEG_A_TXP_6
PEG_A_TXN_7PEG_TXP7PEG_TXN7
PEG_TXN6PEG_TXP6
PEG_TXP14
PEG_A_TXP_11PEG_A_TXN_11
PEG_TXN14PEG_A_TXP_14
PEG_A_TXP_13
PEG_A_TXN_14
PEG_TXP11PEG_TXN11
PEG_TXP10
PEG_TXP12
PEG_TXN10
PEG_TXN12
PEG_A_TXP_0PEG_A_TXN_0
PEG_A_TXN_2PEG_A_TXP_2
PEG_TXN2
PEG_TXN0
PEG_TXP2
PEG_TXP0
PEG_TXP15PEG_TXN15 PEG_A_TXN_15
PEG_A_TXP_15
PEG_TXN1PEG_TXP1
PEG_A_TXN_1PEG_A_TXP_1
PEG_A_TXP_5PEG_A_TXN_5
PEG_A_TXN_8PEG_TXN8PEG_A_TXP_8PEG_TXP8
PEG_A_TXN_9PEG_TXP9 PEG_A_TXP_9PEG_TXN9
PEG_A_TXP_10PEG_A_TXN_10
PEG_A_TXP_12PEG_A_TXN_12
PEG_RXN6PEG_RXP6
PEG_RXN9PEG_RXP9
PEG_RXP8PEG_RXN8
PEG_RXP7PEG_RXN7
PEG_RXP14PEG_RXN14
PEG_RXP1PEG_RXN1
PEG_RXN2PEG_RXP2
PEG_RXP13PEG_RXN13
PEG_RXN3PEG_RXP3
PEG_RXP12PEG_RXN12
PEG_RXP11PEG_RXN11
PEG_RXN4PEG_RXP4
PEG_RXN5PEG_RXP5
PEG_RXN10PEG_RXP10
PEG_RXP11
PEG_RXN14PEG_RXN15
PEG_RXP15
PEG_RXP0
PEG_RXP13
PEG_RXP4
PEG_RXN[0..15]
PEG_RXN5
PEG_RXN0
PEG_RXP6PEG_RXP5
PEG_RXP2PEG_RXP3
PEG_RXN3
PEG_RXP1
PEG_RXN12
PEG_RXN9
PEG_RXN13
PEG_RXN4
PEG_RXP15
PEG_RXN6
PEG_RXP8
PEG_RXN8
PEG_RXP9
PEG_RXN11
PEG_RXN1
PEG_RXN7
PEG_RXN2
PEG_RXP14
PEG_RXP7
PEG_RXN10
PEG_RXP10
PEG_RXP12
PEG_RXP[0..15]
PEG_RXN15
PEG_TXN5
PEG_TXN13
PEG_TXN10
PEG_TXN4
PEG_TXN9
PEG_TXP0
PEG_TXP6
PEG_TXP11
PEG_TXP5
PEG_TXP[0..15]
PEG_TXN2
PEG_TXP8
PEG_TXN1
PEG_TXP3
PEG_TXN12
PEG_TXP4
PEG_TXN14
PEG_TXP13
PEG_TXP2PEG_TXP1
PEG_TXN13
PEG_TXN8
PEG_TXN15
PEG_TXP14PEG_TXP15
PEG_TXP9
PEG_TXN3
PEG_A_TXN_13
PEG_TXN0
PEG_TXN11
PEG_TXN[0..15]
PEG_TXP12
PEG_TXP10
PEG_TXN7PEG_TXN6
PEG_TXP7
PEG_TXP13
INVPWR_B+++
DISPLAYOFF#
LCDP_CLK
LCDP_DAT
LCDP_CLKLCDP_DAT
CLK_PCIE_VGA
SUSP
RUNPWROKPLTRST_VGA#
THERMATRIP_VGA#
SMBDAT_VGASMBCLK_VGA
SMB_EC_CK2SMB_EC_DA2
LVDS_B0+LVDS_B2-
LVDS_B0-
LVDS_B2+
LVDS_BC+LVDS_BC-
LVDS_A2+LVDS_A2-
LVDS_A0-
LVDS_AC+LVDS_AC-
LVDS_A1-LVDS_A1+
LVDS_A0+
LVDS_B1-LVDS_B1+
PWM
DISPLAYOFF#
PWM
BK_EN<10>
BKOFF#<32>
BIA<10,32>
INVT_PWM<32>
RUNPWROKPLTRST_VGA# <19,21>THERMATRIP_VGA# <32>SUSP <37,43,44>
CLK_PCIE_VGA# <18>CLK_PCIE_VGA <18>
DAC_BRIG <32>BKOFF# <32>INVT_PWM <32>
PEG_TXP[0..15] <10>
PEG_RXN[0..15] <10> PEG_TXN[0..15]<10>
PEG_RXP[0..15] <10>
LCD_CLK<10>
LCD_DAT<10>
EN_LCDVDD<10>
DAC_BRIG <32>
LVDS_A0+<10>LVDS_A0-<10>LVDS_A1+<10>LVDS_A1-<10>LVDS_A2-<10>LVDS_A2+<10>
LVDS_AC-<10>LVDS_AC+<10>
LVDS_B0-<10>LVDS_B0+<10>LVDS_B2-<10>LVDS_B2+<10>LVDS_B1-<10>LVDS_B1+<10>
LVDS_BC-<10>LVDS_BC+<10>
SUSP#<24,32,33,37,42>
SMB_EC_CK2<32,34>SMB_EC_DA2<32,34>
SMBDAT_VGA<17>
C/R_VGA<17>COMP/B_VGA<17>Y/G_VGA<17>
VSYNC_VGA<17>HSYNC_VGA<17>
VGA_BLU<17>VGA_GRN<17>VGA_RED<17>
SMBCLK_VGA<17>
+LCDVDD+12VALW +LCDVDD +3VS
INVPWR_B+
+5VS
+3VS
+12VALW
+LCDVDD
INVPWR_B+
+5VALW
+2.5VS
+3VS
+5VS
+3VS
+5VS
+3VS
+2.5V
+3VS
B+ B+I
B+I
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
16 52Friday, March 11, 2005
2005/03/01 2006/03/01
Inverter
LCD EEPROM
Modify for 1.8vs move to VGA BD
FBM-201209-121LMA40T
C30
90.
047U
_040
2_16
V4Z
1
2
C54 0.1U_0402_16V4Z2@ 1 2
C88 0.1U_0402_16V4Z2@ 1 2
C66 0.1U_0402_16V4Z2@ 1 2
C83 0.1U_0402_16V4Z2@ 1 2
C51 0.1U_0402_16V4Z2@ 1 2
JVGA1
FOX_QTS0140A-30212@
1 13 35 57 79 9
11 1113 1315 1517 1719 1921 2123 2325 2527 2729 2931 3133 3335 3537 3739 3941 4143 4345 4547 4749 4951 5153 5355 5557 5759 5961 6163 6365 6567 6769 6971 7173 7375 7577 7779 7981 8183 8385 8587 8789 8991 9193 9395 9597 9799 99
101 101103 103105 105107 107109 109111 111113 113115 115117 117119 119
22446688101012121414161618182020222224242626282830303232343436363838404042424444464648485050525254545656585860606262646466666868707072727474767678788080828284848686888890909292949496969898100100102102104104106106108108110110112112114114116116118118120120
121 121122122123 123124124125 125127 127129 129131 131133 133135 135137 137139 139
126126128128130130132132134134136136138138140140
C48 0.1U_0402_16V4Z2@ 1 2
C39 0.1U_0402_16V4Z2@ 1 2
C76 0.1U_0402_16V4Z2@ 1 2
R355100K_0402_5%
1@
G
D S
Q252N7002_SOT23
1@
2
1 3
C61 0.1U_0402_16V4Z2@ 1 2
C31
00.
047U
_040
2_16
V4Z
1
2
G
D
S
Q222N7002_SOT23
1@
2
13
C82 0.1U_0402_16V4Z2@ 1 2
C56 0.1U_0402_16V4Z2@ 1 2
C31
10.
047U
_040
2_16
V4Z
1
2
C30
70.
1U_0
603_
50V4
Z
2@1
2
C31
40.
1U_0
603_
50V4
Z
2@1
2
C3180.1U_0402_16V4Z
1@1
2
C270.1U_0603_50V4Z C23
0.1U_0603_50V4Z
1@
C3230.1U_0402_16V4Z
1@
R722
KC FBM-L11-201209-221LMAT_0805
1@1 2
R4
0_0402_5%
1@1 2
JLVDS1
ACES_88328-4000
1@
13579
111315171921232527293133353739
246810121416182022242628303234363840
GND 41GND42
C49 0.1U_0402_16V4Z2@ 1 2
G
DS
Q20BSS138_SOT23
1@
2
13
C31
30.
1U_0
603_
50V4
Z
2@1
2
C80 0.1U_0402_16V4Z2@ 1 2
C67 0.1U_0402_16V4Z2@ 1 2
U1
NC7ST08P5X_SC70-51@
A1
B2 O 4
P5
G3
C71 0.1U_0402_16V4Z2@ 1 2
R329FBM-L11-160808-800LMT_0603
2@1 2
C79 0.1U_0402_16V4Z2@ 1 2
R344470_0402_5%
1@
G
D
S
Q232N7002_SOT23
1@2
13
R3
0_0402_5%
1 2
C57 0.1U_0402_16V4Z2@ 1 2
C71710U_1206_25V6M
1
2
C93 0.1U_0402_16V4Z2@ 1 2
JVGAP1
ACES_85205-10002@
1122334455667788991010
C44 0.1U_0402_16V4Z2@ 1 2
C55 0.1U_0402_16V4Z2@ 1 2
Q1FDS4435_SO8
1@
3 65
78
2
4
1
R356100K_0402_5%
1@
R328FBM-L11-160808-800LMT_0603
2@
1 2
R3362.2K_0402_5%
1@ 12
C94 0.1U_0402_16V4Z2@ 1 2
C7160.1U_0603_50V4Z
C97 0.1U_0402_16V4Z2@ 1 2
R3352.2K_0402_5%
1@12
C87 0.1U_0402_16V4Z2@ 1 2
C73 0.1U_0402_16V4Z2@ 1 2
R7
0_0402_5%
@1 2
C30
80.
1U_0
603_
50V4
Z
2@1
2
C704
0.1U_0402_16V4Z
2@1
2
Q24DTC124EK_SC59
1@
2
13
C70 0.1U_0402_16V4Z2@ 1 2
R357 75K_0402_5%
1@
C320
0.1U_0402_16V4Z
1@1
2
C72 0.1U_0402_16V4Z2@ 1 2
C43 0.1U_0402_16V4Z2@ 1 2
R27100K_0402_5%
1@
G
DSQ21BSS138_SOT23
1@
2
13
U2
NC7SZ14M5X_SOT23-5@
A2
G3
Y 4
P5
C64 0.1U_0402_16V4Z2@ 1 2
R354150K_0402_5%1@
G
DS
Q26SI2302DS_SOT23
1@
2
13
L33FBM-L11-201209-121LMA05T_0805
1 2
C59 0.1U_0402_16V4Z2@ 1 2
C65 0.1U_0402_16V4Z2@ 1 2
C705
0.1U_0402_16V4Z
2@1
2
C3210.1U_0402_16V4Z
1@C50 0.1U_0402_16V4Z2@ 1 2
C77 0.1U_0402_16V4Z2@ 1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SVIDEO_Y
SVIDEO_CVBS
C/R_C
SVIDEO_C
MSEN#
CRTR
CRTG
CRTB
COMP/B_C
Y/G_C
CRT_HSYNC
CRT_VSYNC
CRT_G
CRT_B
CRT_R
C/R<10>
C/R_VGA<16>
COMP/B<10>
COMP/B_VGA<16>
Y/G<10>
Y/G_VGA<16>
VGA_RED<16>
VGA_GRN<16>
CRT_RED<10>
CRT_GRN<10>
CRT_BLU<10>
HSYNC_VGA<16>
HSYNC<10>
VSYNC_VGA<16>
VSYNC<10>
MSEN#<32>
SMBDAT_VGA <16>
DAT_DDC2 <10>
SMBCLK_VGA <16>
CLK_DDC2 <10>
VGA_BLU<16>
+3VS
+5VS
+2.5VS
+5VS
+3VS+5VS
+2.5VS
+5VS
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
17 52Friday, March 11, 2005
2005/03/01 2006/03/01
DDC_MONID0
CRT Connector
C3
100P_0402_50V8J
1
2
L5FBM-11-160808-121-T_0603
1 2
G
D S Q192N7002_SOT23
2
1 3
R9
75_0603_1%
12
C1782P_0603_50V8J
1
2
L1FBM-11-160808-121-T_0603
1 2
JTV1
SUYIN_33007SR-07T1-C1234567
C83.3P_0603_50V8J
1
2
R340 0_0402_5%2@
1 2
R875_0603_1%
12
D8
DAN217_SC59
@
2 31
R343 0_0402_5%
1@
1 2
R341 0_0402_5%
1@
1 2
R3212K_0402_5%
12
R3300_0402_5%
12
C2282P_0402_50V8J
1
2
C1582P_0603_50V8J
1
2R22 0_0402_5%
2@
1 2
R3320_0402_5%
1@1 2JCRT1
FOX_DZ11A91-L7
611
17
1228
1339
144
1015
5
1617
R23 0_0402_5%1@
1 2
D12
DAN217_SC59@
2 31
L8FLM1608081R8K_0603
1 2
L4FBM-11-160808-121-T_0603
1 2
R26 0_0402_5%
2@
1 2
D11
DAN217_SC59@
2 31
C527P_0402_50V8J
1
2
R331
2.7K_0402_5%
12
D9
DAN217_SC59
@
2 31
U24SN74AHCT1G125GW_SOT353-5
A2 Y 4OE
#1
G3
P5
R3252K_0402_5%
12
C303
100P_0402_50V8J
1
2
R15 0_0402_5%
1@
1 2
R3260_0402_5% 2@1 2
R3330_0402_5%
1@1 2
R3342.7K_0402_5%
12
C4
100P_0402_50V8J
1
2
C2182P_0402_50V8J
1
2
C93.3P_0603_50V8J
1
2
R3391K_0402_5%
1 2
R18150_0402_1%
12
C3040.1U_0402_16V4Z
1
2
R342 0_0402_5%2@
1 2
C143.3P_0603_50V8J
@
1
2
D10
DAN217_SC59@
2 31
R3220_0402_5% 2@1 2
D7
DAN217_SC59
@
2 31
R11 0_0402_5%
1@
1 2
R16 0_0402_5%2@
1 2
L3FBM-11-160808-121-T_0603
1 2
L7FLM1608081R8K_0603
1 2
R12 0_0402_5%2@
1 2
C302100P_0402_50V8J
1
2
C123.3P_0603_50V8J
@
1
2
R19150_0402_1%
12
C3060.1U_0402_16V4Z
1
2
L6FLM1608081R8K_0603
1 2
L2FBM-11-160808-121-T_0603
1 2
C103.3P_0603_50V8J
1
2
U25
SN74AHCT1G125GW_SOT353-5
A2 Y 4OE
#1
G3
P5
R24 0_0402_5%
2@
1 2
R1075_0603_1%
12
R21 0_0402_5%1@
1 2
R14 0_0402_5%2@
1 2
C1682P_0603_50V8J
1
2
C3050.1U_0402_16V4Z
1
2
D20RB751V_SOD323
21
R13 0_0402_5%
1@
1 2
C627P_0402_50V8J
1
2
R25 0_0402_5%1@
1 2
R17150_0402_1%
12
C13
3.3P_0603_50V8J
@1
2
C2082P_0402_50V8J
1
2
G
D S
Q182N7002_SOT23
2
1 3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ICH_SMBCLK
CLK_14M_ICH
CK_SDATA
CLK_14M_SIO
ICH_SMBDATA
CLK_MCH_BCLK
CLK_ITP#
CLK_CPU_BCLK#
CLK_CPU_BCLK
CLK_MCH_BCLK#
CLK_PCIE_ICH#
CLK_PCIE_ICH
PCICLK2
H_STP_CPU#
CK_XTAL_OUT
H_STP_PCI#
PCICLK4
CK_SDATA
CK_SCLK
CLKIREF
CLKREF
PCICLK3
CLKSEL1
CLK_ITP
CLK_ITP#
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CK_CPU1
CK_CPU1#
CK_CPU2#
CK_CPU2
CK_CPU0
CK_CPU0#
PCICLK5
PCICLKF1
CK_XTAL_IN
CLK_33M_ICH
CLK_33M_MPCI
CLK_33M_LAN
CLK_33M_CBS
CLK_33M_LPCSIO
SRC4#
SRC4
CLK_PCIE_VGA#
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_PCIE_VGA
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLKSEL2
CK_VDD_REF
CK_VDD_48
CK_VDD_48CK_VDD_A
CK_VDD_A CK_VDD_REF
CLKSEL2CLK_48M_ICH
SRC5#
SCR5
CLK_MCH_3GPLL#
CLK_MCH_3GPLL
CK_SCLK
PCICLKF0
CLK_33M_LPCEC
CLK_ITP
SRC1
SRC1# CLK_PCIE_ICH#
CLK_PCIE_ICH
SRC0
SRC0# SSC_DREFCLK#
DREFCLK#
DREFCLK
SSC_DREFCLK
SSC_DREFCLK#
DREFCLK#DREFCLK
SSC_DREFCLK
CLKSEL1
CLK_14M_CODECCLKSEL0
CLKSEL0
ICH_SMBDATA<21>
ICH_SMBCLK<21>
CK_SDATA <13,14>
CK_SCLK <13,14>
MCH_CLKSEL0 <8>
MCH_CLKSEL1 <8>
CPU_BSEL0<6>
CPU_BSEL1<6>
CLK_48M_ICH<21>
CLK_14M_CODEC<29>
CLK_33M_1394<27>
CLK_33M_CBS<26>
CLK_33M_LPCSIO<31>
CLK_33M_MPCI<28>
CLK_33M_LAN<24>
CLK_33M_ICH<19>
CLK_33M_LPCEC<32>
CLK_MCH_BCLK <8>
CLK_MCH_BCLK# <8>
CLK_CPU_BCLK <5>
CLK_CPU_BCLK# <5>
CLK_ITP <5>
CLK_ITP# <5>
CLK_MCH_3GPLL <10>
CLK_MCH_3GPLL# <10>
CLK_PCIE_VGA <16>
CLK_PCIE_VGA# <16>
CLK_PCIE_ICH <21>
CLK_PCIE_ICH# <21>
SSC_DREFCLK <8>
SSC_DREFCLK# <8>
DREFCLK <8>DREFCLK# <8>
CLK_14M_ICH <21>
CLK_14M_SIO <31>
H_STP_PCI# <21>
H_STP_CPU# <21,45>
VGATE <8,21,45>
+CK_VDD_MAIN
+VCCP
+3VS
+3VS
+3VS+CK_VDD_MAIN2
+3VS
+3VS
+3VS
+VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
18 52Friday, March 11, 2005
2005/03/01 2006/03/01
31
G
Place near each pinW>40 mil
S
Place near CK410M
2N7002
2
D
Place crystal within500 mils of CK410
FSC FSB FSA CPUMHz
SRCMHz
PCIMHz
266
133
166
333
400
RESERVED
100 33.30
1
Table : ICS 954201 / Cypress CY28411
CLKSEL0 CLKSEL1 CLKSEL2
0 0 1 for Dothan-A 533Mhz1 0 1 for Dothan-A 400Mhz
33.3
33.3
33.3
33.3
33.3
33.3
100
100
100
100
100
100
100
200
00
0
0
0
0
0
0
0
0
0
0
1
1 1
1
1
11
1
1
1
*
R509 10K_0402_5% 1 2
C47633P_0402_50V8J
12
R521 33_0402_5%
1 2
R12
110
K_0
402_
5%
12
R552 49.9_0402_1%
1 2
R522 49.9_0402_1%
12
R51310K_0402_5%
12
R497 33_0402_5%
12
R1261_0603_5%
1 2
R142 33_0402_5%1@1 2
R514 33_0402_5%
1 2
R53110K_0402_5%@
12
R52410K_0402_5%@
12
R539 33_0402_5%
1 2
R538 33_0402_5%1@1 2
R503 12.1_0402_1%1 2
R48610K_0402_5%@
12
R542 49.9_0402_1%
1 2
R491 33_0402_5%
12
R5331K_0402_5%
1 2
R555 49.9_0402_1%
1 2
R525 49.9_0402_1%1@
1 2
R744
10K_0402_5%
1 2
R131 475_0603_1%
1 2
R1282.2_0603_5%
1 2
R519 49.9_0402_1%1@
1 2
R548 33_0402_5%
1 2
R11
910
K_0
402_
5%
12
R554 33_0402_5%
1 2
R545 49.9_0402_1%
12
C48733P_0402_50V8J
12
U31
ICS954206AG
VDD_SRC021VDD_SRC128VDD_SRC234
VDD_PCI01VDD_PCI17
VDD_4811
VDD_CPU42VDD_REF48
FSA/USB_4812
VSS_PCI02
FSB/TEST_MODE16
XTAL_OUT49
XTAL_IN50
VSS_SRC29
VSS_4813
VSS_CPU45
PCI256
FSC/TEST_SEL53
SDATA47
SCLOCK46
PCIF0/ITP_EN8
PCIF19
IREF39
SRC5 31
CPU_STOP# 54
CPU1 41
CPU1# 40
CPU_2_ITP/SRC_7 36
SRC5# 30
PCI33
PCI44
PCI55
CPU0# 43
CPU0 44
SRC6 33
SRC6# 32
PCI_STOP# 55
VSS_A 38
VDD_A 37
REF 52
VSS_PCI16
VSS_REF51
CPU_2_ITP/SRC7# 35
SRC4 26
SRC4# 27
SRC3 24
SRC3# 25
SRC2 22
SRC2# 23
SRC1 19
SRC1# 20
SRC0 17
SRC0# 18
DOT96 14DOT96# 15
VTT_PWRGD#/PD 10
R535 49.9_0402_1%
12
X3 14.318MHZ_20P_1BX14318CC1A12
C45
60.
1U_0
402_
16V
4Z
1
2
C13
94.
7U_0
805_
6.3V
6K 1
2
R508 33_0402_5%
12
R1452.2_0603_5% 1 2
C12
30.
047U
_040
2_16
V7K
1
2
R547 49.9_0402_1%
1 2
L24CHB1608U301_0603
1 2
R526 33_0402_5%1@
1 2
R558 33_0402_5%
1 2
R550 49.9_0402_1%
1 2
R499 12.1_0402_1%1 2
C13
30.
047U
_040
2_16
V7K
1
2
G
D
SQ45 2N7002_SOT23
2
13
R528 49.9_0402_1%
12
C6350.047U_0402_16V4Z
1
2
R146 49.9_0402_1%1@
1 2
L25CHB1608U301_0603
1 2
R501 12.1_0402_1%
12
R527 33_0402_5%
1 2
C5050.047U_0402_16V7K
1
2
R4881K_0402_5%
1 2
R553 33_0402_5%
1 2
C1370.047U_0402_16V7K
1
2
R537 49.9_0402_1%1@
1 2
R74210K_0402_5%
12
C13
44.
7U_0
805_
6.3V
6K 1
2
R557 49.9_0402_1%
1 2
G
D S
Q52N7002_SOT23
2
1 3
G
D S
Q42N7002_SOT23
2
1 3
C50
80.
047U
_040
2_16
V7K
1
2
R543 33_0402_5%
1 2
R49333_0402_1%
12
C444
10U_0805_10V4Z
1
2
R51210K_0402_5%@
12
C457
10U_0805_10V4Z
1
2
R506 33_0402_5%
12
R502 12.1_0402_1%
12
R48210K_0402_5%@
12
R520 33_0402_5%1@
1 2
C5230.047U_0402_16V7K
1
2
R534 33_0402_5%
1 2
R511 33_0402_5%
12
R540 49.9_0402_1%
12
C4790.047U_0402_16V7K
1
2
C5110.047U_0402_16V7K
1
2
R498 33_0402_5%
12
R544 33_0402_5%
1 2
R515 49.9_0402_1%
12
R549 33_0402_5%
1 2
C4660.047U_0402_16V7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_33M_ICH
PCI_SERR#
PCI_DEVSEL#PCI_PCIRST#
PCI_C_BE0#
CLK
_IC
H_T
ER
M
PCI_REQ4#
PCI_PERR#
PCI_GNT1#
PCI_PIRQG#PCI_PIRQB#
PCI_REQ5#
PCI_STOP#
PCI_C_BE1#
PCI_C_BE3#
PCI_PIRQF#PCI_PIRQC#
PCI_REQ2#
PCI_PIRQE#
PCI_REQ6#
PCI_FRAME#
PCI_REQ3#
PCI_PLOCK#
PCI_IRDY#
PCI_C_BE2#
PCI_REQ1#
PCI_REQ0#
PCI_PIRQD#
PCI_PIRQA#
PCI_PAR
PCI_GNT3#
PCI_TRDY#
PCI_PIRQH#
PLTRST#
PLTRST#CLK_33M_ICH
PCI_AD0PCI_AD1PCI_AD2PCI_AD3PCI_AD4PCI_AD5
PCI_AD7PCI_AD6
PCI_AD8PCI_AD9
PCI_AD11PCI_AD10
PCI_AD14PCI_AD15
PCI_AD13PCI_AD12
PCI_AD16PCI_AD17
PCI_AD19PCI_AD18
PCI_AD22PCI_AD23
PCI_AD21PCI_AD20
PCI_AD25PCI_AD24
PCI_AD28PCI_AD29
PCI_AD31PCI_AD30
PCI_AD26PCI_AD27PCI_PIRQG#
PCI_PIRQF#PCI_PIRQE#
PCI_REQ0#PCI_REQ1#PCI_REQ3#PCI_REQ4#
PCI_REQ2#PCI_REQ5#PCI_REQ6#
PCI_PCIRST#PCIRSTB3#
PCI_GNT4#
PCI_PIRQB#PCI_PIRQD#
PCI_PLOCK#PCI_IRDY#
PCI_TRDY#PCI_STOP#
PCI_FRAME#
PCI_DEVSEL#PCI_PERR#
PCI_SERR#
PCI_PIRQC#
PCI_PIRQA#
PCI_PIRQH#
PCI_GNT0#
PCI_GNT2#
ICH_PME#
ICH_PME#
PCIRSTB1#
PCIRSTB2#
PCI_AD[0..31]<24,26,27,28>
PCI_FRAME#<24,26,27,28>
PCI_PIRQA#<26>PCI_PIRQB#<26>
PCI_REQ0# <24>
PCI_REQ1# <26>
PCI_REQ2# <27>
PCI_REQ3# <28>
ICH_PME# <24,26,27,28,31,32>
PCI_PIRQE# <27>PCI_PIRQF# <24>PCI_PIRQG# <28>PCI_PIRQH# <28>
PCI_SERR# <24,26,28>
PCI_GNT0# <24>
PCI_GNT1# <26>
PCI_GNT2# <27>
PCI_GNT3# <28>
PLTRST_VGA# <16,21>
PLTRST_SIO# <31>
PLTRST_MCH# <8>
PLTRST# <21>CLK_33M_ICH <18>
PCIRST# <24,26,27,28,32>
PCI_C_BE0# <24,26,27,28>PCI_C_BE1# <24,26,27,28>PCI_C_BE2# <24,26,27,28>PCI_C_BE3# <24,26,27,28>
PCI_IRDY# <24,26,27,28>PCI_PAR <24,26,27,28>
PCI_DEVSEL# <24,26,27,28>PCI_PERR# <24,26,27,28>
PCI_STOP# <24,26,27,28>PCI_TRDY# <24,26,27,28>
+3VS
+3V
+3VS
+3VS
+3VS
+3VS
+3V
+3V
+3V
CHGRTC
+RTCVCC
+3VALW
+3V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
19 52Friday, March 11, 2005
2005/03/01 2006/03/01
R868.2K_0402_5%
1 2
R44333_0402_5%
1 2
R848.2K_0402_5%
1 2
R4478.2K_0402_5%
1 2
R75710K_0402_5%
@
12
U29B
74VHC08MTC_TSSOP14
@
A4
B5 O 6
P14
G7
C3500.1U_0402_16V4Z
12
R4788.2K_0402_5%
1 2
U29A
74VHC08MTC_TSSOP14
@
A1
B2 O 3P
14G
7
R7740_0402_5%
1 2
R38933_0402_5%
1 2
RP4
8.2K_0804_8P4R_5%
1 82 73 64 5
R7580_0402_5%
1 2
R7750_0402_5%
1 2
R4488.2K_0402_5%
1 2
U29C
74VHC08MTC_TSSOP14
@
A10
B9 O 8
P14
G7
D16BAS40-04_SOT23
1
2 3
G
DS
Q462N7002_SOT23
@
2
13
R728.2K_0402_5%
1 2
R44533_0402_5%
1 2
RP5
8.2K_0804_8P4R_5%
1 82 73 64 5
R724 10K_0402_1%1 2
R708.2K_0402_5%
1 2
R4808.2K_0402_5%
1 2
R47210_0402_5%@
12
Interrupt I/F
PCI
RESERVED
U7B
ICH6_BGA609
AD[0]E2AD[1]E5AD[2]C2AD[3]F5AD[4]F3AD[5]E9AD[6]F2AD[7]D6AD[8]E6AD[9]D3AD[10]A2AD[11]D2AD[12]D5AD[13]H3AD[14]B4AD[15]J5AD[16]K2AD[17]K5AD[18]D4AD[19]L6AD[20]G3AD[21]H4AD[22]H2AD[23]H5AD[24]B3AD[25]M6AD[26]B2AD[27]K6AD[28]K3AD[29]A5AD[30]L1AD[31]K4
FRAME#J3
REQ[0]# L5GNT[0]# C1REQ[1]# B5GNT[1]# B6REQ[2]# M5GNT[2]# F1REQ[3]# B8GNT[3]# C8
REQ[4]#/GPI[40] F7GNT[4]#/GPO[48] E7
REQ[5]#/GPI[1] E8GNT[5]#/GPO[17] F6
REQ[6]#/GPI[0] B7
TRDY# J2STOP# J1
PLTRST# R5PCICLK G6
PME# P6
PIRQ[E]#/GPI[2] D9PIRQ[F]#/GPI[3] C7PIRQ[G]#GPI[4] C6PIRQ[H]#/GPI[5] M3
GNT[6]#/GPO[16] D8
C/BE[0]# J6C/BE[1]# H6C/BE[2]# G4C/BE[3]# G2
IRDY# A3PAR E1
PCIRST# R2DEVSEL# C3
PERR# E3PLOCK# C5
SERR# G5
PIRQ[C]#M1
SATA[1]TXP/RSVD[4]AG4
PIRQ[A]#N2
SATA[3]RXN/RSVD[5]AC9
SATA[1]RXP/RSVD[2]AD5SATA[1]TXN/RSVD[3]AF4
PIRQ[B]#L2
PIRQ[D]#L3
SATA[1]RXN/RSVD[1]AC5
SATA[3]RXP/RSVD[6]AD9SATA[3]TXN/RSVD[7]AF8SATA[3]TXP/RSVD[8]AG8TP[3]/RSVD[9]U3
R4758.2K_0402_5%
1 2
RP3
8.2K_0804_8P4R_5%
1 82 73 64 5
C4108.2P_0402_50V8J~D@
1
2
R888.2K_0402_5%
1 2
R44633_0402_5%
1 2
BATT1
ML1220T13RE
12
U29D
74VHC08MTC_TSSOP14
@
A13
B12 O 11
P14
G7
R756
0_0402_5%
1 2
R4738.2K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LPC_LFRAME#
ICH_RTCRST#
LPC_LDRQ0#LPC_LDRQ1#
ICH_AC_SYNC_R
IDE_HDIOR#
IDE_DCS1#
IAC_SDATAI2IAC_SDATAI1
IDE_HDIORDY
ICH_AC_SDOUT_R
IDE_HDDACK#
ICH_AC_RST_R#
IDE_HDIOW#
ICH_RTCX1
IDE_HDREQIDE_DDREQ
LPC_LAD2LPC_LAD1LPC_LAD0
LPC_LAD3
IDE_DA1
IDE_DCS3#
IDE_DA2
IDE_DA0
ICH_RTCX2
H_A20M#
H_INIT#
H_IGNNE#
H_INTR
H_NMIH_SMI#
H_STPCLK#
H_CPUSLP#
H_DPSLP#
GATEA20A20M#
IGNNE#
ICH4_INIT#
STPCLK#
SMI#NMI
INTR
DPSLP#
CPUSLP#
H_PWRGOOD
INTRUDER#
IDE_HIRQ
KBRST#
H_DPRSLP#DPRSLP#
FERR#
ICH
_AC
_BIT
CLK
_TE
RM
INTRUDER#
ICH_AC_SYNC_R
ICH_AC_RST_R#
ICH_AC_SDOUT_R
H_FERR#
H_DPRSLP#
IDE_HDD8
IDE_HDD11IDE_HDD12IDE_HDD13
IDE_HDD15IDE_HDD14
IDE_HDD10IDE_HDD9
IDE_HDD7IDE_HDD6IDE_HDD5IDE_HDD4IDE_HDD3IDE_HDD2IDE_HDD1IDE_HDD0
H_THERMTRIP#
IDE_HDIORDY IDE_HIRQ
H_THERMTRIP#
THRMTRIP_ICH#
INTRUDER#
IAC_BITCLK<29,35>
IAC_RST#<29>
IAC_RST#_MDC<35>
IDE_HIORDY<23>IDE_HIRQ<23>IDE_HDACK#<23>
IAC_SDATAI1<29>IAC_SDATAI2<35>
GATEA20 <32>
KBRST# <32>
H_THERMTRIP#<5,8>
LPC_LAD[0..3] <31,32>
LPC_LFRAME# <31,32>
IDE_HDD[0..15] <23>
IAC_SDATO<29>
IAC_SDATO_MDC<35>
IAC_SYNC_MDC<35>IDE_HDIOW#<23>IDE_HDIOR#<23>
H_A20M# <5>
H_CPUSLP# <5,8>
H_DPRSLP# <5>H_DPSLP# <5>
H_FERR# <5>
H_PWRGOOD <5>
H_IGNNE# <5>
H_INIT# <5>H_INTR <5>
H_NMI <5>H_SMI# <5>
H_STPCLK# <5>
IDE_HDREQ <23>
MAINPWRON <39,41,44>
LPC_LDRQ0#LPC_LDRQ1# <31>
IDE_HDA0 <23>IDE_HDA1 <23>IDE_HDA2 <23>
IDE_HDCS1# <23>IDE_HDCS3# <23>
IAC_SYNC<29>
+RTCVCC
+RTCVCC
+VCCP
+3VS +3VS
+VCCP
+VCCP
+CPU_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
20 52Friday, March 11, 2005
2005/03/01 2006/03/01
Package9.6X4.06 mm
Note : R169 Do not populate forDothan-A, Populte for Dothan-B.
Note : R168 populate 56 ohm forDothan-A, Populte zero ohm forDothan-B.
Note : R423 must be stuff forDothan-A, no-stuff for Dothan-B.
R14356_0402_5%
12
R4960_0402_5%
1 2
C5260.68U_0603_10V6K
@
1 2
X1
32.768KHZ_12.5P_MC-306
12
C46
133
P_0
402_
50V
8J
1
2
R95
33_0402_5%
1 2
R144 56_0402_5%
12
R54656_0402_5%
12
R148 0_0402_5% 12
CMOS_CLR1SHORT PADS~D
@
11 2 2
RTC
LAN
SATA
AC-97/AZALIA
LPC
CPU
PIDE
U7A
ICH6_BGA609
RTCX1Y1RTCX2Y2
RTCRST#AA2
INTRUDER#AA3INTVRMENAA5
EE_CSD12EE_SHCLKB12EE_DOUTD11EE_DINF13
LAN_CLKF12
LAN_RSTSYNCB11
LANRXD[0]E12LANRXD[1]E11LANRXD[2]C13
LANTXD[0]C12LANTXD[1]C11LANTXD[2]E13
ACZ_BIT_CLKC10ACZ_SYNCB9
ACZ_RST#A10
ACZ_SDIN[0]F11ACZ_SDIN[1]F10ACZ_SDIN[2]B10
ACZ_SDOC9
SATALED#AC19
SATA[0]RXNAE3SATA[0]RXPAD3SATA[0]TXNAG2SATA[0]TXPAF2
SATA[2]RXNAD7SATA[2]RXPAC7SATA[2]TXNAF6SATA[2]TXPAG6
SATA_CLKNAC2SATA_CLKPAC1
SATARBIAS#AG11SATARBIASAF11
IORDYAF16IDEIRQAB16DDACK#AB15DIOW#AC14DIOR#AE16
LAD[0]/FWH[0] P2LAD[1]/FWH[1] N3LAD[2]/FWH[2] N5LAD[3]/FWH[3] N4
LDRQ[0]# N6LDRQ[1]#/GPI[41] P4
LFRAME#/FWH[4] P3
A20GATE AF22A20M# AF23
CPUSLP# AE27
DPRSLP#/TP[4] AE24DPSLP#/TP[2] AD27
FERR# AF24
CPUPWRGD/GPO[49] AG25
IGNNE# AG26INIT3_3V# AE22
INIT# AF27INTR AG24
RCIN# AD23
NMI AF25SMI# AG27
STPCLK# AE26
THRMTRIP# AE23
DA[0] AC16DA[1] AB17DA[2] AC17
DCS1# AD16DCS3# AE17
DD[0] AD14DD[1] AF15DD[2] AF14DD[3] AD12DD[4] AE14DD[5] AC11DD[6] AD11DD[7] AB11DD[8] AE13DD[9] AF13
DD[10] AB12DD[11] AB13DD[12] AC13DD[13] AE15DD[14] AG15DD[15] AD13
DDREQ AB14
R551 0_0402_5% 12
R147 0_0402_5% 12
R162 0_0402_5% 12
R160 0_0402_5% 12
R50410K_0402_5%
12
R48310_0402_5%@
12
R49475_0402_5%
1 2
R76247K_0402_5%
1 2
R467180K_0402_5%
1 2
R151 0_0402_5% 12
R10533_0402_5%
1 2
R9133_0402_5% 1 2
R9633_0402_5%
1 2
R10124.9_0603_1%
1 2
R161 0_0402_5%12
R1144.7K_0402_5%
12
C6810P_0603_50V8J
12
R474 0_0402_5%
@
1 2
R10433_0402_5%
1 2
C
BE
Q392SC2411K_SC59
1
2
3
R56147K_0402_5%@
1 2
C6210P_0603_50V8J
12
R135 0_0402_5%
12
R9233_0402_5%
1 2
R139 0_0402_5% 12
R54156_0402_5%
1 2
C45810P_0402_50V8J@
1
2
R471
0_0402_5%
12
C4000.1U_0402_16V4Z 1 2
R68
10M
_040
2_5%
12
R4691M_0402_5%
12
R159 0_0402_5% 12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PM_DPRSLPVR
ICH_SUSCLK
VGATE
ICH_RI#
H_STP_PCI#
PM_DPRSLPVR
USBP0-USBP0+
USBP1+
USBP2+
USBP3+
USBP1-
USBP2-
USBP5+
USBP4+
USBP3-
USBP4-
USBP5-
USBRBIAS
OVCUR#1OVCUR#0
OVCUR#2
OVCUR#4
OVCUR#3
DMI_TXN0
DMI_TXN1
DMI_TXP0
DMI_TXP1
DMI_RXN0
DMI_RXN1DMI_RXP1
DMI_RXP0
ICH_BATLOW#
SLP_S5#
SLP_S3#
PLTRST#
PWRBTN_OUT#
ICH_SMBDATAICH_SMBCLK
ICH_SMLINK1ICH_SMLINK0
H_STP_CPU#
RSMRST#
SYS_RESET#
PM_BMBUSY#
CLKRUN#
CLK_14M_ICH
CLK_48M_ICH
CK
_14M
_IC
H_T
ER
M
CK
_48M
_IC
H_T
ER
M
CLK_14M_ICH
CLK_48M_ICH
MCH_SYNC#SPKR
LINKALERT#
ICH_SMBDATA
ICH_SMLINK1ICH_SMLINK0ICH_SMBCLK
EC_SMI#
DMI_IRCOMP
CLK_PCIE_ICH#CLK_PCIE_ICH
SIO_THRM#
ICH_PCIE_WAKE#
USBP7+
USBP6+USBP6-
USBP7-
OVCUR#7
ICH_PWRGD
LINKALERT#
SYS_RESET#
ACINA
ICH_BATLOW#
ICH_PCIE_WAKE#
SIO_THRM#
MCH_SYNC#
SIRQ
OVCUR#5OVCUR#6
CLKRUN#
DMI_TXN2
DMI_TXN3
DMI_TXP2
DMI_TXP3
DMI_RXN3
DMI_RXN2
DMI_RXP3
DMI_RXP2
SLP_S4#
EC_SCI#
ACINA
SIRQ
OVCUR#1OVCUR#0
OVCUR#2OVCUR#3
OVCUR#7OVCUR#6OVCUR#5OVCUR#4
ICH_SMBDATA<18>ICH_SMBCLK<18>
SPKR<30>
PM_BMBUSY#<8>
EC_SMI#<32>
ACIN<32,40,41>
EC_SCI#<32>
EC_FLASH#<33>
H_STP_PCI#<18>
H_STP_CPU#<18,45>
PLTRST_VGA#<16,19>
IDE_HRESET#<23>
IDE_DRESET#<23>
CLKRUN#<24,26,28,31,32>
VGATE<8,18,45>
ICH_PWRGD<32>
ICH_BATLOW#<32>
PWRBTN_OUT#<32>
PLTRST#<19>
RSMRST#<32>
PM_DPRSLPVR<45>
SLP_S3#<32>SLP_S4#<32>SLP_S5#<32>
EC_THRM# <32>
CLK_14M_ICH<18>
CLK_48M_ICH<18>
OVCUR#4 <36>
OVCUR#0 <36>OVCUR#1 <36>
OVCUR#3 <36>
CLK_PCIE_ICH# <18>CLK_PCIE_ICH <18>
DMI_RXN0 <8>DMI_RXP0 <8>
DMI_RXN1 <8>DMI_RXP1 <8>
DMI_RXN2 <8>DMI_RXP2 <8>
DMI_RXN3 <8>DMI_RXP3 <8>
DMI_TXN0 <8>DMI_TXP0 <8>
DMI_TXN1 <8>DMI_TXP1 <8>
DMI_TXN2 <8>DMI_TXP2 <8>
DMI_TXN3 <8>DMI_TXP3 <8>
USBP0- <36>USBP0+ <36>USBP1- <36>USBP1+ <36>USBP2- <35>USBP2+ <35>USBP3- <36>USBP3+ <36>USBP4- <36>USBP4+ <36>USBP5-USBP5+USBP6-USBP6+USBP7-USBP7+
SIRQ<26,31,32>
LID_SWOUT#<32>
+3VS
+3VSUS
+3VSUS
+3VSUS
+1.5VS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VS
+3VS
+3VS
+3V
+3VS
+3VSUS
+3VS
+3VS
+3V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
21 52Friday, March 11, 2005
2005/03/01 2006/03/01
(PCI Express Wake Event)
May need pulldown for DPRSLPVR in casethe ICH6m does not set this value in timefor boot.
closed to 500 mils
R14122.6_0603_1%
1 2
R13010K_0402_5%
1 2
PCI-EXPRESS
DIRECT MEDIA INTERFACE
USB
CLOCK
GPIO
POWER MGT
U7C
ICH6_BGA609
RI#T2
SATA[0]GP/GPI[26]AF17SATA[1]GP/GPI[29]AE18SATA[2]GP/GPI[30]AF18SATA[3]GP/GPI[31]AG18
SMBCLKY4SMBDATAW5LINKALERT#Y5SMLINK[0]W4SMLINK[1]U6MCH_SYNC#AG21SPKRF8
SUS_STAT#/LPCPD#W3
SYS_RESET#U2
BM_BUSY#/GPI[6]AD19
GPI[7]AE19GPI[8]R1
STP_PCI#/GPO[18]AC21
GPO[19]AB21
STP_CPU#/GPO[20]AD22
GPO[21]AD20GPO[23]AD21
GPIO[24]V3
GPIO[25]P5GPIO[27]R3GPIO[28]T3CLKRUN#/GPIO[32]AF19GPIO[33]AF20GPIO[34]AC18
WAKE#U5
SERIRQAB20
THRM#AC20
CLK14E10
CLK48A27
SUSCLKV6
SLP_S3#T4SLP_S4#T5SLP_S5#T6
PWROKAA1
DPRSLPVR/TP[1]AE20
LAN_RST#V5
BATLOW#/TP[0]V2
PWRBTN#U1
VRMPWRGDAF21
RSMRST#Y3
PERn[1] H25PERp[1] H24PETn[1] G27PETp[1] G26
PERn[2] K25PERp[2] K24PETn[2] J27PETp[2] J26
SMBALERT#/GPI[11]W6
GPI[12]M2GPI[13]R6
PERn[3] M25PERp[3] M24PETn[3] L27PETp[3] L26
PERn[4] P24PERp[4] P23PETn[4] N27PETp[4] N26
DMI[0]RXN T25DMI[0]RXP T24DMI[0]TXN R27DMI[0]TXP R26
DMI[1]RXN V25DMI[1]RXP V24DMI[1]TXN U27DMI[1]TXP U26
DMI[2]RXN Y25DMI[2]RXP Y24DMI[2]TXN W27DMI[2]TXP W26
DMI[3]RXN AB24DMI[3]RXP AB23DMI[3]TXN AA27DMI[3]TXP AA26
DMI_CLKN AD25DMI_CLKP AC25
DMI_ZCOMP F24
DMI_IRCOMP F23
OC[4]#/GPI[9] C23OC[5]#/GPI[10] D23OC[6]#/GPI[14] C25OC[7]#/GPI[15] C24
OC[0]# C27OC[1]# B27OC[2]# B26OC[3]# C26
USBP[0]N C21USBP[0]P D21USBP[1]N A20USBP[1]P B20USBP[2]N D19
USBP[3]N A18USBP[3]P B18USBP[4]N E17USBP[4]P D17
USBP[5]P A16USBP[5]N B16
USBP[6]N C15USBP[6]P D15USBP[7]N A14USBP[7]P B14
USBP[2]P C19
USBRBIAS# A22USBRBIAS B22
R45
9 10K
_040
2_5%
12
C52
04.
7P_0
402_
50V
8C
@1
2
R536 0_0402_5%@1 2
R48
7
10_0
402_
5%
@ 12
R120 33_0402_5%@1 2
R451680_0402_5%
1 2
R11
710
K_0
402_
5%
12
R55
610
_040
2_5%
@ 12 R69
10K_0402_5% 1 2
R761 10K_0402_5%1 2
R725 39K_0402_5%1 2
R71
10K
_040
2_5%
12
R787 10K_0402_5%1 2
R782 10K_0402_5%1 2T40PAD@
R46
02.
2K_0
402_
5%
12
R51810K_0402_5%
1 2
R746 0_0402_5%1 2
T21PAD@
R5298.2K_0402_5%
1 2
R46
12.
2K_0
402_
5%
12
R75 10
K_0
402_
5% 12
R45510K_0402_5%
1 2
R788 10K_0402_5%1 2
R52
310
0K_0
402_
5%
@
12
R12510K_0402_5%
12
T32PAD
@
R44
9 10K
_040
2_5%
12
R784 10K_0402_5%1 2
R781 10K_0402_5%1 2
R45610K_0402_5%
1 2
R729 0_0402_5%@1 2
T30 PAD@
R51
6
1K_0
402_
5%
@
12
R510 10K_0402_5% 1 2
R786 10K_0402_5%1 2
R45710K_0402_5%
1 2
T22PAD@
R783 10K_0402_5%1 2
C45
5
4.7P
_040
2_50
V8C
@1
2
T23PAD@
R517 24.9_0603_1%
1 2
D15
RB751V_SOD323
2 1
R507 10K_0402_5%@1 2
G
D S
Q47
2N7002_SOT232
1 3
R45
0 10K
_040
2_5%
1
2
R785 10K_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ICH6_VCCPLL
ICH6_VCCPLL
ICH_V5REF_SUS
+1.5VR
ICH_V5REF_SUS
ICH_V5REF_RUN
ICH_V5REF_RUN
+1.5VR
ICH_V5REF_SUS
ICH_V5REF_RUN
+1.5VRUN_L
+1.5VR
+3VS
+3VSUS+5VALW
+5VS
+VCCP
+1.5VS
+1.5VS
+3VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+3VS
+3VSUS
+RTCVCC
+3VS
+3VS
+RTCVCC+3VS
+5V
+5VALW
+1.5VS
+1.5VS
+2.5VS
+3VS
+1.5VS
+1.5VS
+3VALW +3V
+3VSUS
+3VSUS
+3VSUS
+3VSUS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
22 52Friday, March 11, 2005
2005/03/01 2006/03/01
Near PIN AG5
Near PIN AG9
Near PIN AE1
Near PINE26, E27
Near PINAC27
Near PIN AG10
Near PIN F27(C968),P27(C949), AB27(C950)
Near PIN A25
Replacing by this circuit?
Near PIN U7
Near PIN A24
Near PIN AA19
Near PIN AG23
Near PIN AB18
Near PINA2-A6, D1-H1
Near PINAG13, AG16
Near PIN A17
Note: Intel will update design guide.
C3970.1U_0402_16V4Z
1 2
C40
10.
1U_0
402_
16V
4Z
1
2
C51
70.
1U_0
402_
16V
4Z
1
2
C4930.01U_0402_16V7K
1 2
C4530.1U_0402_16V4Z
1 2
R10310_0402_5%
12
R9710_0402_5%@
1 2
C4910.1U_0402_16V4Z
1 2
C709
0.1U_0402_16V
4Z
1
2
C1151U_0603_10V4Z
1
2
D4
RB751V_SOD323
21
R12710_0402_5% @
1 2
C4390.1U_0402_16V4Z
1
2
C5150.01U_0402_16V7K
1 2
C39
4
0.1U
_040
2_16
V4Z
1
2
L27 0_0603_5%
1 2
C50
90.
1U_0
402_
16V
4Z
1
2
C48
60.
1U_0
402_
16V
4Z
1
2
C50
1
0.1U
_040
2_16
V4Z
1
2
C4770.1U_0402_16V4Z
1 2
+
C52
422
0U_D
2_4V
M 1
2
C49
0
0.1U
_040
2_16
V4Z
1
2
C711
0.1U_0402_16V
4Z
1
2
C51
40.
1U_0
402_
16V
4Z
1
2
C4360.1U_0402_16V4Z
1 2
C39
50.
1U_0
402_
16V
4Z
1
2
C44
0
0.1U
_040
2_16
V4Z
1
2
C4710.1U_0402_16V4Z
1 2
C51
3
0.1U
_040
2_16
V4Z
1
2
R7780_0805_5%
C4850.1U_0402_16V4Z
1
2
U8 APL5301-15DC_3P
GN
D1
Vin2 Vout 3
C4740.1U_0402_16V4Z
1 2
C40
5
0.1U
_040
2_16
V4Z
1
2
C4540.1U_0402_16V4Z
1 2
PCIE
CORE
IDE
PCI
USB
SATA
USB CORE
PCI/IDE RBP
U7E
ICH6_BGA609
VCC1_5[1]AA22VCC1_5[2]AA23VCC1_5[3]AA24VCC1_5[4]AA25VCC1_5[5]AB25VCC1_5[6]AB26VCC1_5[7]AB27VCC1_5[8]F25VCC1_5[9]F26VCC1_5[10]F27VCC1_5[11]G22VCC1_5[12]G23VCC1_5[13]G24VCC1_5[14]G25VCC1_5[15]H21VCC1_5[16]H22VCC1_5[17]J21VCC1_5[18]J22VCC1_5[19]K21VCC1_5[20]K22VCC1_5[21]L21VCC1_5[22]L22VCC1_5[23]M21VCC1_5[24]M22VCC1_5[25]N21VCC1_5[26]N22VCC1_5[27]N23VCC1_5[28]N24VCC1_5[29]N25VCC1_5[30]P21VCC1_5[31]P25VCC1_5[32]P26VCC1_5[33]P27VCC1_5[34]R21VCC1_5[35]R22VCC1_5[36]T21VCC1_5[37]T22VCC1_5[38]U21VCC1_5[39]U22VCC1_5[40]V21VCC1_5[41]V22VCC1_5[42]W21VCC1_5[43]W22VCC1_5[44]Y21VCC1_5[45]Y22
VCC1_5[46]AA6VCC1_5[47]AB4VCC1_5[48]AB5VCC1_5[49]AB6VCC1_5[50]AC4VCC1_5[51]AD4VCC1_5[52]AE4VCC1_5[53]AE5VCC1_5[54]AF5VCC1_5[55]AG5
VCC1_5[56]AA7VCC1_5[57]AA8VCC1_5[58]AA9VCC1_5[59]AB8VCC1_5[60]AC8VCC1_5[61]AD8VCC1_5[62]AE8VCC1_5[63]AE9VCC1_5[64]AF9VCC1_5[65]AG9
VCCDMIPLLAC27VCC3_3[1]E26
VCCSATAPLLAE1VCC3_3[22]AG10
VCCLAN3_3/VCCSUS3_3[1]A13VCCLAN3_3/VCCSUS3_3[2]F14VCCLAN3_3/VCCSUS3_3[3]G13VCCLAN3_3/VCCSUS3_3[4]G14
VCCSUS3_3[1]A11VCCSUS3_3[2]U4VCCSUS3_3[3]V1VCCSUS3_3[4]V7VCCSUS3_3[5]W2VCCSUS3_3[6]Y7
VCCSUS3_3[7]A17VCCSUS3_3[8]B17VCCSUS3_3[9]C17VCCSUS3_3[10]F18VCCSUS3_3[11]G17VCCSUS3_3[12]G18
VCC1_5[98] F9VCC1_5[97] U17VCC1_5[96] U16VCC1_5[95] U14
VCC1_5[93] U11VCC1_5[94] U12
VCC1_5[92] T17VCC1_5[91] T11VCC1_5[90] P17VCC1_5[89] P11VCC1_5[88] M17VCC1_5[87] M11VCC1_5[86] L17VCC1_5[85] L16VCC1_5[84] L14VCC1_5[83] L12VCC1_5[82] L11VCC1_5[81] AA21VCC1_5[80] AA20VCC1_5[79] AA19
VCC3_3[21] AA10VCC3_3[20] AG19VCC3_3[19] AG16VCC3_3[18] AG13VCC3_3[17] AD17VCC3_3[16] AC15VCC3_3[15] AA17VCC3_3[14] AA15VCC3_3[13] AA14VCC3_3[12] AA12
VCC3_3[11] P1VCC3_3[10] M7
VCC3_3[9] L7VCC3_3[8] L4VCC3_3[7] J7VCC3_3[6] H7VCC3_3[5] H1VCC3_3[4] E4VCC3_3[3] B1VCC3_3[2] A6
VCCSUS1_5[3] U7VCCSUS1_5[2] R7
VCCSUS1_5[1] G19
VCC1_5[78] G20VCC1_5[77] F20VCC1_5[76] E24VCC1_5[75] E23VCC1_5[74] E22VCC1_5[73] E21VCC1_5[72] E20VCC1_5[71] D27VCC1_5[70] D26VCC1_5[69] D25VCC1_5[68] D24
VCC1_5[67] G8
VCC2_5[2] P7VCC2_5[4] AB18
V5REF[2] AA18V5REF[1] A8
V5REF_SUS F21
VCCUSBPLL A25VCCSUS3_3[20] A24
VCCRTC AB3
VCCLAN1_5/VCCSUS1_5[2] G11VCCLAN1_5/VCCSUS1_5[1] G10
V_CPU_IO[3] AG23V_CPU_IO[2] AD26V_CPU_IO[1] AB22
VCCSUS3_3[19] G16VCCSUS3_3[18] G15VCCSUS3_3[17] F16VCCSUS3_3[16] F15VCCSUS3_3[15] E16VCCSUS3_3[14] D16VCCSUS3_3[13] C16
C4340.1U_0402_16V4Z
1 2
C6600.1U_0402_16V4Z
1 2
D5
RB751V_SOD323
21
C5100.1U_0402_16V4Z
1 2
C51
90.
01U
_040
2_16
V7K
1
2
C46
2
0.1U
_040
2_16
V4Z
1
2
C39
6
0.1U
_040
2_16
V4Z
1
2
C706
0.1U_0402_16V
4Z
1
2
L28CHB1608U301_0603
1 2C447
0.1U_0402_16V4Z
1 2
GROUND
U7D
ICH6_BGA609
VSS[86] F4VSS[85] F22VSS[84] F19VSS[83] F17
VSS[81] E19VSS[82] E25
VSS[80] E18VSS[79] E15VSS[78] E14
VSS[76] D22VSS[75] D20VSS[74] D18VSS[73] D14VSS[72] D13VSS[71] D10VSS[70] D1VSS[69] C4VSS[68] C22VSS[67] C20VSS[66] C18VSS[65] C14VSS[64] B25VSS[63] B24VSS[62] B23VSS[61] B21VSS[60] B19VSS[59] B15VSS[58] B13VSS[57] AG7VSS[56] AG3VSS[55] AG22VSS[54] AG20VSS[53] AG17VSS[52] AG14VSS[51] AG12VSS[50] AG1VSS[49] AF7VSS[48] AF3VSS[47] AF26VSS[46] AF12VSS[45] AF10VSS[44] AF1VSS[43] AE7VSS[42] AE6VSS[41] AE25VSS[40] AE21VSS[39] AE2VSS[38] AE12VSS[37] AE11VSS[36] AE10VSS[35] AD6VSS[34] AD24VSS[33] AD2VSS[32] AD18VSS[31] AD15
VSS[29] AD1VSS[30] AD10
VSS[28] AC6VSS[27] AC3VSS[26] AC26VSS[25] AC24VSS[24] AC23VSS[23] AC22VSS[22] AC12VSS[21] AC10VSS[20] AB9VSS[19] AB7VSS[18] AB2VSS[17] AB19VSS[16] AB10VSS[15] AB1VSS[14] AA4VSS[13] AA16VSS[12] AA13VSS[11] AA11VSS[10] A9
VSS[9] A7VSS[8] A4VSS[7] A26VSS[6] A23VSS[5] A21VSS[4] A19VSS[3] A15VSS[2] A12VSS[1] A1
VSS[172]E27VSS[171]Y6VSS[170]Y27VSS[169]Y26VSS[168]Y23VSS[167]W7VSS[166]W25VSS[165]W24VSS[164]W23VSS[163]W1VSS[162]V4VSS[161]V27VSS[160]V26VSS[159]V23VSS[158]U25VSS[157]U24VSS[156]U23VSS[155]U15VSS[154]U13VSS[153]T7VSS[152]T27VSS[151]T26VSS[150]T23VSS[149]T16VSS[148]T15VSS[147]T14VSS[146]T13VSS[145]T12VSS[144]T1VSS[143]R4VSS[142]R25VSS[141]R24VSS[140]R23VSS[139]R17VSS[138]R16VSS[137]R15VSS[136]R14VSS[135]R13VSS[134]R12VSS[133]R11VSS[132]P22VSS[131]P16VSS[130]P15VSS[129]P14VSS[128]P13VSS[127]P12VSS[126]N7VSS[125]N17VSS[124]N16VSS[123]N15VSS[122]N14VSS[121]N13VSS[120]N12VSS[119]N11VSS[118]N1VSS[117]M4VSS[116]M27VSS[115]M26VSS[114]M23VSS[113]M16VSS[112]M15VSS[111]M14VSS[110]M13VSS[109]M12VSS[108]L25VSS[107]L24VSS[106]L23VSS[105]L15VSS[104]L13VSS[103]K7VSS[102]K27VSS[101]K26VSS[100]K23VSS[99]K1VSS[98]J4VSS[97]J25VSS[96]J24VSS[95]J23VSS[94]H27VSS[93]H26VSS[92]H23VSS[91]G9VSS[90]G7VSS[89]G21VSS[88]G12
VSS[77] D7
VSS[87]G1
C1110.1U_0402_16V4Z
1
2
C5060.1U_0402_16V4Z
1
2
R12910_0402_5%
12
C4670.1U_0402_16V4Z
1 2
C4640.1U_0402_16V4Z
1 2
C48
4
0.1U
_040
2_16
V4Z
1
2
C52
1
0.1U
_040
2_16
V4Z
1
2
C48
80.
1U_0
402_
16V
4Z
1
2
C4920.1U_0402_16V4Z
1 2
C41
70.
1U_0
402_
16V
4Z
1
2
C42
6
0.1U
_040
2_16
V4Z
1
2
C4970.1U_0402_16V4Z
1 2
C6610.1U_0402_16V4Z
1 2
C43
50.
1U_0
402_
16V
4Z
1
2
C42
5
0.1U
_040
2_16
V4Z
1
2
C48
9
0.1U
_040
2_16
V4Z
1
2
C708
0.1U_0402_16V
4Z
1
2
R7790_0805_5%@
C4720.1U_0402_16V4Z
1 2
C710
0.1U_0402_16V
4Z
1
2
C1361U_0603_10V4Z
1
2
C707
0.1U_0402_16V
4Z
1
2
C1100.1U_0402_16V4Z
1
2
R559
1_0402_5%
1 2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
HDD_ACT#
SEC_CSEL
PDIAG#
IDE_HDD7IDE_HDD6
IDE_HDD8
IDE_HDD4IDE_HDD5 IDE_HDD11
IDE_HDD2IDE_HDD3
IDE_HDD12
IDE_HDD1
IDE_HDD13
IDE_HDD0IDE_HDD15IDE_HDD14
IDE_HDA0IDE_HDA1
IDE_HDCS3#
IDE_HDREQ
IDE_HDACK#
IDE_HDIOR#IDE_HDIOW#IDE_HIORDY
IDE_HDD10IDE_HDD9
IDE_HDA2IDE_DCS1#
IDE_HDA1
IDE_DCS1#
IDE_HDD1IDE_HDD2
HDD_ACT#
IDE_HDA0
IDE_HDIOW#
IDE_HDD4
IDE_HRESET#
IDE_HIRQ
IDE_HDD6
IDE_HDIOR#
IDE_HDACK#
IDE_HDD3
IDE_HDD5
IDE_HDREQ
IDE_HIORDY
IDE_HDD0
IDE_HDD7IDE_HDD14
IDE_HDD13
IDE_HDD8
IDE_HDD11
IDE_HDD10
IDE_HDD13
IDE_HDD11
IDE_HDD4
PDIAG#
IDE_HDD14
IDE_HDD1
IDE_HDD15
IDE_HDD7
IDE_HDD2
IDE_HDD6
IDE_HDD9
IDE_HCS3#
IDE_HDD12
IDE_HDD15
IDE_HDD12
IDE_HDD9
IDE_HDD3
IDE_HDD8
IDE_HDA2
IDE_HDD10
IDE_HDD5
IDE_HDD0
IDE_HIRQ
HDD_ACT#
IDE_DRESET#
IDE_HDD[0..15] <20>
IDE_HRESET#<21>
IDE_HIORDY<20>IDE_HDACK#<20>IDE_HIRQ<20>
IDE_DRESET#<21>
CD_GNA<29>
IDE_HDREQ<20>IDE_HDIOW#<20>IDE_HDIOR#<20>
IDE_HDA1<20>IDE_HDA0<20>IDE_HDCS1#<20>
IDE_HDA2 <20>IDE_HDCS3# <20>
INT_CD_L<29>
INT_CD_R <29>
HDD_ACT# <33>
+5VHDD+5VHDD
+5VMOD+5VMOD
+5VMOD
+12VALW
+5VHDD
+5VS
+5VMOD
+5VS
+5VS
+5VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
23 52Friday, March 11, 2005
2005/03/01 2006/03/01
HDD Connector
Layout Note: W=80 mils
CD-ROM Connector
Layout Note: Place close to CD-ROM CONN.
+5VHDD Source
+5VMOD Source
Layout Note: Place close to HDD CONN.
IRQ how to assign
C278
1U_0603_10V
4Z
1
2
R310 10K_0402_5%@1 2
R8140_0402_5%
12
R703
10K_0402_5%
12
R816
0_0805_5%
@
1 2
C657
1U_0603_10V
4Z
1
2
C293
0.1U_0402_16V
4Z
1
2
C593 47P_0402_50V8J 1 2
R317470_0402_5%
12
JHDD1
ALLTOP_C17866-14405
1 13 35 57 79 9
11 1113 1315 1517 1719 1921 2123 2325 2527 2729 2931 3133 3335 3537 3739 3941 4143 43
22446688101012121414161618182020222224242626282830303232343436363838404042424444
GND 45GND46
C658
0.1U_0402_16V
4Z
1
2
JCDR1
OCTEK_CDR-50JE2
1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 50
G
DS
Q14AO3413_SOT23
2
13
C294
1000P_0402_50V
7K
1
2
D27RB751V_SOD323@
21
C296
10U_0805_10V
4Z
1
2
C594
47P_0402_25V8K
1 2
G
DS
Q17AO3413_SOT23
2
13
C280
1000P_0402_50V
7K
1
2
C595
47P_0402_25V8K
1 2
C2920.01U_0402_16V7K
1
2
R314100K_0402_5%
12
R316
150K_0603_5%
12
R815
0_0805_5%
@1 2
C281
0.1U_0402_16V
4Z
1
2
C279
10U_0805_10V
4Z
1
2
R318 10K_0402_5%
1 2
G
D
S
Q162N7002_SOT23
2
13
C659
1U_0603_10V
4Z
1
2
R702
4.7K_0402_5%
12
C656
0.1U_0402_16V
4Z
1
2
R31510K_0402_5%@
12
R308 470_0402_5% 1 2
G
D S
Q482N7002_SOT23
2
1 3
R8130_0402_5%@
12
C301
1U_0603_10V
4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LAN_ACT# CLKOUT XTALFBSPD_10_100_G#
CLKOUTXTALFB
LAN_TX2-LAN_TX2+
LAN_TX0-LAN_TX0+
LAN_RX1+LAN_RX1-
LAN_TX3+LAN_TX3-
CTL12
CTL25
CTL25
PCI_AD[0..31]
PCI_AD6PCI_AD5
PCI_AD12
PCI_AD7
PCI_AD4
PCI_AD9PCI_AD8
PCI_AD10
PCI_AD3
PCI_AD11
PCI_AD14
PCI_AD17PCI_AD18
PCI_AD1PCI_AD2
PCI_AD16
PCI_AD20
PCI_AD0
PCI_AD25
PCI_AD15
PCI_AD22
PCI_AD13
PCI_AD21
PCI_AD19
PCI_AD30PCI_AD31
PCI_AD23
PCI_AD27PCI_AD26
PCI_AD28PCI_AD29
PCI_AD24
CTL12
PCIRST#
CLK_PCI_LAN
PCI_AD17
LAN_IO
CLK_PCI_LAN
PCI_AD[0..31]<19,26,27,28>
LAN_TX0+ <25>LAN_TX0- <25>LAN_RX1+ <25>LAN_RX1- <25>
LAN_TX2+ <25>LAN_TX2- <25>LAN_TX3+ <25>LAN_TX3- <25>
LAN_ACT# <25>SPD_10_100_G# <25>
SUSP# <16,32,33,37,42>
ICH_PME#<19,26,27,28,31,32>
PCI_GNT0#<19>
PCI_TRDY#<19,26,27,28>
PCI_C_BE2#<19,26,27,28>
PCI_PIRQF#<19>
PCI_IRDY#<19,26,27,28>
PCI_PERR#<19,26,27,28>PCI_SERR#<19,26,28>
PCI_FRAME#<19,26,27,28>
PCIRST#<19,26,27,28,32>
PCI_STOP#<19,26,27,28>
PCI_PAR<19,26,27,28>
PCI_C_BE1#<19,26,27,28>
PCI_REQ0#<19>
CLKRUN#<21,26,28,31,32>CLK_33M_LAN<18>
PCI_DEVSEL#<19,26,27,28>
PCI_C_BE3#<19,26,27,28>
PCI_C_BE0#<19,26,27,28>
LAN_IO
LAN_IO
LAN_IO+3VALW
LAN_IO
LAN_IO
+3VS
+3VALW
+2.5V_LAN
+1.2V_LAN
LAN_IO
LAN_IO
+1.2V_LAN
+2.5V_LAN
+2.5V_LAN
+1.2V_LAN
LAN_IO
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
24 52Friday, March 11, 2005
2005/03/01 2006/03/01
5.6k for 8100C
closed to chip about 200 mils
closed to chip
C58
27P_0402_50V8J
1
2
R431K_0402_1%
@
12
PCI I/F
Powe
rLA
N I/
F
U4
RTL8100CL_LQFP128
AD0104AD1103AD2102AD398AD497AD596AD695AD793AD890AD989AD1087AD1186AD1285AD1383AD1482AD1579AD1659AD1758AD1857AD1955AD2053AD2150AD2249AD2347AD2443AD2542AD2640AD2739AD2837AD2936AD3034AD3133
C/BE#344
IDSEL46
C/BE#260
FRAME#61IRDY#63TRDY#67DEVSEL#68STOP#69
PERR#70SERR#75
PAR76
C/BE#177 C/BE#092
ISOLATE# 23
EECS 106
RTSET 127
RTT3/CRTL18 125PME#31
LED0 117LED1 115LED2 114
X2 122
INTA#25
RST#27
CLK28
GNT#29 REQ#30
TXD+/MDI0+ 1TXD-/MDI0- 2
RXIN+/MDI1+ 5RXIN-/MDI1- 6
AUX/EEDI 109EESK 111
NC/VSS 9
NC/AVDDH 10
NC/HSDAC+ 11
NC/VSS 13
NC/MDI2+ 14NC/MDI2- 15
NC/M66EN 88
NC/MDI3+ 18NC/MDI3- 19
NC/GND 22
NC/VDD18 24
NC/GND 48NC/GND 62
CLKRUN#65
NC/SMBCLK 72
NC/GND 73
NC/SMBDATA 74
NC/VDD18 110
NC/GND 112NC/GND 118
NC/HV 120
NC/HG 123NC/LG2 124NC/LV2 126
NC/VDD18 45NC/VDD18 64
VDD33 41VDD33 56VDD33 71VDD33 84VDD33 94VDD33 107
AVDD33/AVDDL 3
AVDD33/AVDDL 20AVDD33/AVDDL 7
VDD25/VDD18 54VDD25/VDD18 78VDD25/VDD18 99
AVDD25/HSDAC- 12
CTRL25 8
GND/VSS4GND/VSS17
GND/VSSPST21
GND35
GND/VSSPST38GND/VSSPST51
GND52
GND/VSSPST66
GND80
GND/VSSPST81GND/VSSPST91
GND100
GND/VSSPST101GND/VSSPST119
GND/VSS128
VDD33 26
X1 121
NC/VDD18 116
VDD25/VDD18 32
LWAKE 105
EEDO 108
NC/LED3 113
NC/AVDDL 16
R395 0_0603_5%2@ 12
C69
0.1U_0402_10V6K
1
2
C1030.1U_0402_10V6K
1
2
C33
1U_0603_10V6K
1
2
R800_0402_5% @
12
R81 1K_0402_1%@
1 2
R65 0_0402_5%1 2
R7210_0402_5%
2@ 1 2
R39
0_0805_5%
1 2
C75
0.1U_0402_10V6K1
2
C344.7P_0402_50V8B
@1
2
C35
0.1U_0402_10V6K1
2C53
0.1U_0402_10V6K
1
2C37
0.1U_0402_10V6K1
2C84
0.1U_0402_10V6K
1
2
C356
0.1U_0402_10V6K1
2
C86
0.1U_0402_10V6K
1
2
R59 0_0402_5%
1 2
R823.6K_0402_5%
12
L22 0_0805_5%1 2
C89
0.1U_0402_10V6K
1
2
R48 0_0402_5%
2@1 2
C63
0.1U_0402_10V6K1
2
R4510_0402_5%
@
12
C38
0.1U_0402_10V6K1
2
R3860_0603_5%
1@
12
Q332SB1188_SOT89
3
1
2
R421 2.49K_0603_1%1 2
R3790_0603_5%
2@
1 2
L10
KC FBM_L11-201209-601LMT 0805
@1 2
L21 0_0805_5%1 2
C364
0.1U_0402_10V6K 1
2
C328
0.1U_0402_10V6K1
2
U6
AT93C46-10SI-2.7_SO8CS1 SK2 DI3 DO4
VCC 8NC 7NC 6GND 5
C90
0.1U_0402_10V6K1
2
R58 0_0402_5%2@
1 2
R399
0_0603_5%2@
12
C333
0.1U_0402_10V6K 1
2
R4615K_0402_1% @
1 2
Y1
25MHZ_20P_1BX25000CK1A
1 2
C85
0.1U_0402_10V6K
1
2
C33210U_1206_6.3V6M
1
2
R47 0_0402_5%
1@1 2
Q322SB1188_SOT89
3
1
2
C60
27P_0402_50V8J1
2
R64 0_0402_5%1 2
C40
1U_0603_10V6K
1
2
R420 0_0402_5%
1 2
C36
0.1U_0402_10V6K1
2
C33510U_1206_6.3V6M1
2
R3900_0603_5%
1@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
V_DAC
V_DAC
V_DAC
V_DAC
RJ45_RX1-
RJ45_TX2+
RJ45_RX1+
RJ45_TX3+
RJ45_TX2-
RJ45_TX0-
RJ45_TX3-
RJ45_TX0+
LAN_TX3+
LAN_TX3-
LAN_TX2+
LAN_TX2-
LAN_RX1+
LAN_RX1-
LAN_TX0+
LAN_TX0-
V_DAC
LAN_TX3+
LAN_TX3-
LAN_TX0+
LAN_TX0-
LAN_RX1+
LAN_RX1-
LAN_TX2+
LAN_TX2-
RJ45_TX0-
RJ45_TX0+
RJ45_RX1-
RJ45_RX1+
RJ45_TX3+
RJ45_TX3-
RJ45_TX2+
RJ45_TX2-
LAN_RX1+
LAN_TX0-
RJ45_RX1-
RJ45_TX0+RJ45_TX0-
LAN_TX0+
LAN_RX1-
V_DAC
V_DAC
RJ45_RX1+
LAN_TX3+<24>
LAN_TX3-<24>
LAN_TX2+<24>
LAN_TX2-<24>
LAN_RX1+<24>
LAN_RX1-<24>
LAN_TX0+<24>
LAN_TX0-<24>
LAN_ACT#<24>
SPD_10_100_G#<24>
+2.5V_LAN
LAN_IO
LAN_IO
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
25 52Friday, March 11, 2005
2005/03/01 2006/03/01
RTL8110SBL used the 24HST1041A-3_24P
T=10mil
Termination plane should be copled to chassis ground and also depends on safety concern
T=10mil
Layout Note24HST1041A-3 pls close to conn.
RTL8100CL used the 24ST0023-3_24P
Please close to LAN IC
Termination plane should be copledto chassis ground and also dependson safety concern
1:1
R54 49.9_0402_1%
2@
1 2C47 0.01U_0402_16V7K
2@
1 2
C374 0.1U_0402_16V4Z2@
1 2
C373 0.1U_0402_16V4Z1 2
R790 75_0402_1%2@ 1 2
T41
NS0013_16P
1@
RD+1 RD-2 CT3
CT6 TD+7 TD-8 TX- 9TX+ 10CT 11
CT 14RX- 15RX+ 16
R405 0_0402_5%2@
1 2
C19
0.1U_0402_16V4Z
1 2
C11
0.1U_0402_16V4Z
1 2
R51 49.9_0402_1%1 2
R50 49.9_0402_1%1 2
R792 75_0402_1%2@ 1 2R791 75_0402_1%2@ 1 21:1
1:1
1:1
1:1
T28
24HST1041A-3_24P2@
TCT11
TD1+2
TD1-3
TCT24
TD21+5
TD2-6
TCT37
TD3+8
TD3-9
TCT410
TD4+11
TD4-12 MX4- 13
MX3- 16
MCT3 18
MX2- 19
MX2+ 20
MCT2 21
MX1- 22
MX1+ 23
MCT1 24
MX4+ 14
MCT4 15
MX3+ 17
R789 75_0402_1%2@ 1 2
C1
0.1U_0402_16V4Z
1 2
R49 49.9_0402_1%1 2
R55 49.9_0402_1%
2@
1 2R811
0_0402_5%1@
1 2
R76075_0402_1%
1@
12
C370 0.1U_0402_16V4Z1 2
C375 0.1U_0402_16V4Z2@
1 2
C2
0.1U_0402_16V4Z
1 2
C42 0.01U_0402_16V7K
2@
1 2R56 49.9_0402_1%
2@
1 2
C46 0.01U_0402_16V7K1 2
C321000P_1206_2KV7K
12
C45 0.01U_0402_16V7K1 2
R52 49.9_0402_1%1 2
R5300_0603_5%
1 2
R75975_0402_1%
1@
12
R53 49.9_0402_1%
2@
1 2
R20 300_0603_5%1 2
JLAN1
TYCO_1566597-1
PR1-2
PR1+1
PR2+3
PR3+4
PR3-5
PR2-6
PR4+7
PR4-8
Green LED+9
Green LED-10
Amber LED+11
Amber LED-12
SHLD1 13
SHLD2 14
SHLD4 16
SHLD3 15
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CK
33M
_CB
S_T
ER
M
CLK_33M_CBS
SDDAT1SDDAT0
SDCLK
SDCMD
MSBSMSDATA1MSDATA0
MSDATA3
SDWP#SDCD#
MSINS#MSDATA2
PCI_AD20
PCI_AD3
PCI_AD12
PCI_C_BE2#
PCI_AD7
CBS_CRST#
PCI_SERR#
PCI_C_BE3#
PCI_AD26
CBS_RSVD/D14
PCI_DEVSEL#
SD_EN#
PCI_AD4
PCI_AD9
PCI_AD11
PCI_AD15
PCI_AD20
PCI_AD25
CBS_RSVD/A18
PCI_REQ1#
PCI_IRDY#
CBS_GRST#
CBS_CINT#
PCI_GNT1#
PCI_AD30
PCI_AD5
PCI_AD13
PCI_AD27
PCI_FRAME#
PCI_AD19
PCI_AD31
PCI_AD6
PCI_AD24
PCI_STOP#
CBS_CVS2CBS_GRST#
PCI_AD1
PCI_AD23
PCI_AD28
PCI_TRDY#
PCI_PAR
PCI_AD2
PCI_AD14
PCI_AD29
CBS_CAUDIO
PCI_AD0
PCI_AD21
CBS_CVS1
PCI_PERR#
PCI_C_BE0#
PCI_AD22
CBS_RSVD/D2
CBS_IDSEL
PCIRST#
PCI_C_BE1#
PCI_AD8
PCI_AD10
PCI_AD16PCI_AD17PCI_AD18
CBS_VCCD0#
MSBS
MSDATA1
CBS_CGNT#
CBS_CAD28
CBS_CAD17
CBS_CAD0
CBS_CSTSCHNG
CBS_CBLOCK#
CBS_CC/BE2#
CBS_CAD7
CBS_CAD11
CBS_CPERR#CBS_CSERR#
MSDATA3
CBS_CAD22
CBS_CAD20
CBS_CAD3
CBS_CAD29
SDDAT1
CBS_CREQ#
CBS_CC/BE3#
CBS_CAD2
CBS_CAD13
CBS_CAD4
SDDAT2
CBS_CTRDY#
CBS_CPAR
CBS_CAD10
MSDATA2
CBS_CAD5
CBS_CAD30
CBS_CAD21
CBS_CAD1
CBS_CCLK_INTERNAL
SDDAT3
CBS_CCLKRUN#
CBS_CCLK
CBS_CC/BE1#
CBS_CAD9
CBS_CAD27
CBS_CAD23
CBS_CAD25CBS_CAD24
CBS_CAD19
CBS_CFRAME#
MSDATA0
CBS_CAD14
SDDAT0
CBS_CAD8
CBS_CAD15
CBS_CDEVSEL#
SDCMD
CBS_CC/BE0#
CBS_CAD31
CBS_CAD26
CBS_CAD18
CBS_CSTOP#
CBS_CAD12
CBS_CIRDY#
CBS_CAD16
CBS_CAD6
CBS_CCD1#
CBS_CCD2#_INTERNAL
CBS_CCD2#
CBS_CCD1#_INTERNAL
CBS_SPK#
SDCD#
SD
_EN
#
SDCLK
MS_EN#
CBS_CC/BE0#
CBS_CAD11CBS_CAD10
CBS_CCLK
CBS_CAD1CBS_CAD3CBS_CAD5
CBS_CAD12CBS_CAD14
CBS_CINT#CBS_CGNT#
CBS_CIRDY#
CBS_CCLKRUN#CBS_RSVD/D2
CBS_CAD9
CBS_CC/BE2#
CBS_CC/BE1#CBS_CPARCBS_CPERR#
CBS_CAD18CBS_CAD20CBS_CAD21CBS_CAD22CBS_CAD23CBS_CAD24CBS_CAD25CBS_CAD26CBS_CAD27CBS_CAD29
CBS_CAD7
CBS_CAD0
CBS_CAD30
CBS_CCD2#
CBS_CAD13CBS_CAD15CBS_CAD16CBS_RSVD/A18
CBS_CAD17
CBS_CVS2CBS_CAD19
CBS_CAD28
CBS_CAD31
CBS_CSTSCHNG
CBS_CREQ#CBS_CC/BE3#CBS_CAUDIO
CBS_CSERR#
CBS_CTRDY#CBS_CFRAME#
CBS_CBLOCK#CBS_CSTOP#CBS_CDEVSEL#
CBS_CVS1
CBS_RSVD/D14CBS_CAD8
CBS_CCD1#
CBS_CAD6CBS_CAD4CBS_CAD2
CBS_CRST#
CBS_CCLK
CBS_CCD2# CBS_CCD1#
VPPEN0VPPEN1
VPPEN0
CBS_VCCD0#
VPPEN1
CBS_VCCD1#
CBS_VCCD1#
SDDAT1SDDAT0
SDDAT3SDDAT2
MSBS
MSDATA3
MSDATA1
MSINS#
MSDATA0
MSCLK MS
_EN
# MSDATA2
SDCMDSDWP#
MSCLK
SDCLK
MSCLKSDDAT3
SDDAT2
PCI_AD[0..31]<19,24,27,28>
PCI_C_BE0#<19,24,27,28>PCI_C_BE1#<19,24,27,28>PCI_C_BE2#<19,24,27,28>PCI_C_BE3#<19,24,27,28>
PCI_PAR<19,24,27,28>
PCI_FRAME#<19,24,27,28>PCI_IRDY#<19,24,27,28>PCI_TRDY#<19,24,27,28>PCI_DEVSEL#<19,24,27,28>PCI_STOP#<19,24,27,28>PCI_PERR#<19,24,27,28>
ICH_PME#<19,24,27,28,31,32>
PCI_REQ1#<19>PCI_GNT1#<19>
PCI_SERR#<19,24,28>
CLK_33M_CBS<18>
PCIRST#<19,24,27,28,32>
CBS_RST#
PCI_PIRQA#<19>
PCI_PIRQB#<19>
CR_LED#<33>CLKRUN#<21,24,28,31,32>
SIRQ<21,31,32>
+3V
+3V
+SD_VCC
+12VALW+3V
+3V
+3V
+3V
+SD_VCC
+3V
+3V+CBS_VCC
+CBS_VCC
+CBS_VPP
+5V
+3V
+3V
+12V
+CBS_VCC+CBS_VPP +CBS_VPP
+CBS_VCC
+CBS_VCC+CBS_VCC
+SD_VCC
+CBS_VCC
+CBS_VPP
+3V
+SD_VCC
CBS_SPK# <30>
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
26 52Friday, March 11, 2005
2005/03/01 2006/03/01
SD/ MMC/ MS
Place close to JCBUS
Footprint need to change for #3 <-->#13
1394
cardbus
C9510P_0402_25V8K
@
1
2
R431 43K_0402_5%12
U30
CP2211C1_SSOP16
VCCD0 1VCCD1 2
3.3V33.3V4
5V55V6
GN
D7
OC 8
12V9
VPP 10
VCC 11VCC 12VCC 13
VPPD1 14VPPD0 15
SH
DN
16
C96
1
2
C360
0.01U_0402_16V
7K
1
2
R49
047
K_0
402_
5%
@
12
R419 43K_0402_5%12
C322
270P_0402_50V
7K
@
1
2
R505 43K_0402_5%12
R406 10K_0402_5%1 2
R481
0_0402_5%@
1 2
R4000_0402_5%
12
C386
0.1U_0402_16V
4Z
1
2
R608.2K_0402_5%
12
R46843K_0402_5%1 2
G
D
S
Q3AO3400_SOT23
2
13
C351
10U_0805_10V
4Z
1
2
R402 43K_0402_5%12
C381
0.01U_0402_16V
7K
1
2
C402
10P_0402_25V8K@
1 2
C384
1U_0603_10V
4Z
1
2
R432 43K_0402_5%12
C41
4.7P_0402_50V
8C
@
1
2
R440100K_0402_5%
12C
3380.01U
_0402_16V7K
1
2
R466
0_0402_5%@
1 2
C389
0.1U_0402_16V
4Z
1
2
PROCO_MDR019-20-1000
JSD1
GND 23GND 22
SD_8SD_8SD_7SD_7SD_6SD_6SD_5SD_5SD_4SD_4SD_3SD_3SD_2SD_2SD_1SD_1SD_9SD_9
MS_1MS_1MS_2MS_2MS_3MS_3MS_4MS_4MS_5MS_5MS_6MS_6MS_7MS_7MS_8MS_8MS_9MS_9MS_10MS_10
SD_WPSD_WPSD_CDSD_CD
R11
647
K_0
402_
5%
@
12
R12
247
K_0
402_
5%1
2
R748 0_0402_5%1 2
R441
100K_0402_5%
12
C376
0.01U_0402_16V
7K
1
2
C36810P_0402_25V8K
@
1
2
C451
10P_0402_25V8K@
1 2
R747 0_0402_5%1 2
D3
RB751V_SOD323
21
R618.2K_0402_5%
12
R45443K_0402_5%1 2
C4070.1U_0603_50V4Z
1
2
R4420_0402_5%@
1 2
R750 0_0402_5%1 2
C78
1
2
R382100_0402_5%
1 2
R628.2K_0402_5%
12
R42
10_0402_5%
@
12
C361
270P_0402_50V
7K@
1
2
R49543K_0402_5%1 2
C427
0.1U_0402_16V
4Z
1
2
C325
0.01U_0402_16V
7K
1
2
C423
0.01U_0402_16V
7K
1
2
D2
RB751V_SOD323
21
CAR
DBU
S
SD
U28
CB712_LFBGA169
PCIREQ#A1PCIGNT#B1
AD31C2AD30C1AD29D4AD28D2AD27D1AD26E4AD25E3AD24E2
CBE3#E1
IDSELF4
VC
C2
G1
AD23F2AD22F1AD21G2
VC
CA
1G
13
AD20G3
PCIRST#G4
PCICLKH1
AD19H3AD18H4AD17J1AD16J2
CBE2#J3
FRAME#J4IRDY#K1
VC
C3
K2
TRDY#K3DEVSEL#L1STOP#L2PERR#L3SERR#M1PARM2
CBE1#N1
AD15N2AD14M3AD13N3AD12K4AD11M4
VC
CA
2A
7
AD10K5AD9L5AD8M5
CBE0#N5
AD7K6
VC
C4
N4
AD6M6AD5N6AD4M7AD3N7AD2L7AD1K7AD0N8
RIOUT#_PME#L8
MFUNC0K8MFUNC1N9
SPKROUT M9
VC
C1
F3
MFUNC2K9MFUNC3N10
GRST#M10
MFUNC4L10MFUNC5N11MFUNC6M11
SUSPEND#L11
VP
PD
0N
12V
PP
D1
M12
VC
CD
0#N
13V
CC
D1#
M13
CCD1#/CD1# L12
CAD0/D3 L13
CAD2/D11 K10CAD1/D4 K12
CAD4/D12 K13CAD3/D5 J10
CAD6/D13 J11CAD5/D6 J12
CAD7/D7 H10
VC
C5
L6
CAD8/D15 H12
CCBE0#/CE1# H13
CAD9/A10 G12
VC
C9
C8
CAD10/CE2# G11CAD11/OE# G10
CAD13/IORD# F13CAD12/A11 F11
CAD15/IOWR# F10CAD14/A9 E13
CAD16/A17 E12
CCBE1#/A8 E11
CPAR/A13 D13
VC
C6
L9
CBLOCK#/A19 D11
CPERR#/A14 C13CSTOP#/A20 C12
CGNT#/WE# C11
CDEVSEL#/A21 B13
CCLK/A16 B12
CTRDY#/A22 A13CIRDY#/A15 A12CFRAME#/A23 B11
CCBE2#/A12 A11
CAD17/A24 D10CAD18/A7 B10CAD19/A25 A10
CVS2/VS2# D9
CAD20/A6 C9
CRST#/RESET B9
CAD21/A5 A9CAD22/A4 D8
VC
C7
H11
CREQ#/INPACK# B8
CAD23/A3 A8
CCBE3#/REG# B7
VC
C10
B4
CAD24/A2 C7CAD25/A1 D7CAD26/A0 A6
CVS1/VS1# C6
CINT#/READY_IREQ# D6
CSERR#/WAIT# A5
CAUDIO/BVD2_SPKR# B5
CSTSCHG/BVD1_STSHG# C5CCLKRUN#/WP_IOIS16# D5
CCD2#/CD2# A4
VC
C8
D12
CAD27/D0 C4CAD28/D8 A3CAD29/D1 B3CAD30/D9 C3CAD31/D10 B2
GND1 D3GND2 H2GND3 L4GND4 M8GND5 K11GND6 F12GND7 C10GND8 B6
CRSV1/D14 J13CRSV2/A18 E10CRSV3/D2 A2
RSVD4 H6RSVD3 J7RSVD2 J6RSVD1 J5
SDDAT0 E6SDDAT1 F7SDDAT2 F5SDDAT3 G6
MFUNC7J9
VCC_SDE7GND_SDG5
SDCD#E8MSINS#H7
MS
CLK
E9
SD
CLK
F6
SD
CM
DE
5S
DW
PF8
SD
CLK
IH
5M
SB
SH
8
MS
PW
RE
N#
J8S
DP
WR
EN
33#
G7
MS
DA
TA3
F9M
SD
ATA
2G
8M
SD
ATA
1H
9M
SD
ATA
0G
9
R638.2K_0402_5%
12
G
D
S
Q2AO3400_SOT23
2
13
R439 43K_0402_5%12
C382
0.01U_0402_16V
7K
1
2
C14310P_0402_25V8K
@
1
2
C437
0.01U_0402_16V
7K
1
2
R39143K_0402_5%1 2
C344
0.1U_0402_16V
4Z
1
2
R50043K_0402_5%1 2
R46
247
K_0
402_
5%1
2
JCBS1
SUPER_AC4-3000-250-3_RT
GND1D32D43D54D65D76CE1# 7A10 8OE# 9A11 10A9 11A8 12A13 13A14 14WE# 15IREQ# 16VCC17VPP1 18A16 19A15 20A12 21A7 22A6 23A5 24A4 25A3 26A227A128A029D030D131D232IOIS16#33GND34
GND 35CD1# 36
D11 37D12 38D13 39D14 40D15 41
CE2# 42VS1# 43
IORD# 44IOWR# 45
A17 46A18 47A19 48A20 49A21 50
VCC 51VPP2 52
A22 53A23 54A24 55A25 56
VS2# 57RESET 58WAIT# 59
INPACK# 60REG# 61
SPKR# 62STSCHG# 63
D8 64D9 65
D10 66CD2# 67GND 68
C432
10U_0805_10V
4Z
1
2
R414 43K_0402_5%12
R46343K_0402_5%1 2
R751 0_0402_5%@12
R377 47_0402_5% 12
R358
0_0402_5%
12
R830_0402_5%
@
12
C324
0.01U_0402_16V
7K
1
2
C414
0.1U_0402_16V
4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TPA0+
TPB0-
CLK_33M_1394
PCI_AD31PCI_AD30
PCI_AD27PCI_AD26
PCI_AD28PCI_AD29
PCI_AD25PCI_AD24PCI_AD23PCI_AD22PCI_AD21PCI_AD20PCI_AD19PCI_AD18PCI_AD17PCI_AD16PCI_AD15PCI_AD14PCI_AD13PCI_AD12PCI_AD11PCI_AD10PCI_AD9PCI_AD8
PCI_AD6PCI_AD7
PCI_AD4
PCI_AD0PCI_AD1
PCI_AD3PCI_AD2
PCI_AD5
PCI_FRAME#PCI_IRDY#
PCI_PAR
PCI_DEVSEL#
PCI_AD16
PCI_PERR#PCI_STOP#
PCI_TRDY#
1394_IDSEL
PCI_C_BE2#PCI_C_BE3#
PCI_C_BE0#PCI_C_BE1#
PCI_REQ2#PCI_GNT2#
TPB0+TPA0-
XCPS
XCPS
1394SDA1394SCL
1394SDA1394SCL
PCI_PIRQE#<19>
ICH_PME# <19,24,26,28,31,32>
PCI_AD[0..31]<19,24,26,28>
PCI_C_BE0#<19,24,26,28>PCI_C_BE1#<19,24,26,28>PCI_C_BE2#<19,24,26,28>PCI_C_BE3#<19,24,26,28>
PCI_FRAME#<19,24,26,28>PCI_IRDY#<19,24,26,28>PCI_TRDY#<19,24,26,28>PCI_DEVSEL#<19,24,26,28>PCI_STOP#<19,24,26,28>
PCI_PAR<19,24,26,28>PCI_PERR#<19,24,26,28>
PCI_REQ2#<19>PCI_GNT2#<19>
PCIRST#<19,24,26,28,32>CLK_33M_1394<18>
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
27 52Friday, March 11, 2005
2005/03/01 2006/03/01
C119
0.1U_0402_10V6K
1
2
C10215P_0402_50V8D@
1
2
C1220.1U_0402_10V6K
12
IEEE 1394VT6301S
PCI
Bus
NCOSC
1394 Differential Pairs
EEPROMI/F
Power
PM & Test
U12
VT6301S-CD_LQFP128
AD2798AD2897AD2996AD3095AD3194
AD152 AD143 AD134 AD127 AD118 AD109 AD910 AD811 AD714 AD615 AD516 AD418 AD319 AD220 AD124 AD025
AD26101 AD25102 AD24103 AD23106 AD22107 AD21109 AD20113 AD19114 AD18115 AD17116 AD16117
CBE1#1 CBE0#12
CBE3#104 CBE2#119
VC
C99
VC
C11
0V
CC
122
VC
C5
VC
C17
VC
C32
VC
C11
1V
CC
21
IDSEL105FRAME#120IRDY#121TRDY#123DEVSEL#124STOP#125PERR#127PAR128REQ#93GNT#92INTA#88PCIRST#89PCICLK90
GND 56
PVA 59
TPBIAS0 71TPA0P 70TPA0M 69TPB0P 68TPB0M 67
XREXT 63
XCPS 60
XO
58
XI
57
PME# 34
PVA 62
GND 61
EECS 26EEDO 27
EEDI/SDA 28EECK/SCL 29
PV
D36
PV
D46
VC
C30
PHYRESET# 55
PVA 72PVA 73PVA 86PVA 87
GND 65GND 66GND 79GND 80
GN
D91
GN
D10
0G
ND
108
GN
D11
8G
ND
126
GN
D6
GN
D13
GN
D23
GN
D33
GN
D11
2G
ND
22G
ND
38
GN
D47
GN
D31
NC
45N
C48
NC
49N
C50
NC
37N
C51
NC
52N
C53
NC
54N
C40
NC
39N
C35
NC
74N
C75
NC
76N
C77
NC
78N
C64
NC
81N
C82
NC
83N
C84
NC
85
I2C
EN
43C
AR
DE
N44
NC
41N
C42
C11247P_0402_25V8K
1 2
C147
0.1U_0402_16V7K
1
2
R9854.9_0402_1%
1 2
U11
AT24C02N-10SI-2.7_SO8
A01A12
SDA 5SCL 6
VCC 8
A23GND4
WP 7
C1160.1U_0402_10V6K
1
2
R1334.7K_0402_5%
12
R894.99K_0402_1%
1 2
R115 100_0402_5%
1 2
C129
0.1U_0402_16V7K
1
2 R150 510_0402_5%12
C11810P_0402_50V8J
1 2
R9454.9_0402_1%
1 2
R1181M_0402_5%
12
L120_0805_5%
12
R1076.34K_0603_1%
1 2
C106
0.1U_0402_10V6K
1
2
R9954.9_0402_1%
1 2
R1131K_0402_5%
12
C98
0.33U_0603_10V7K
1 2
R723
4.7K_0402_5%
@1 2
Y224.576MHz_16P_3XG-24576-43E1
12
C117
0.1U_0402_16V7K
1
2
R10222_0402_5% @
12
C142
0.1U_0402_16V7K
1
2
C1070.1U_0402_10V6K
1
2
C12410P_0402_50V8J
1 2
C1480.1U_0402_16V7K
1
2
R9354.9_0402_1%1 2
C125
0.1U_0402_16V7K
1
2
C138
0.1U_0402_16V7K
1
2
C101
270P_0402_50V7K 1 2
C146
0.1U_0402_16V7K
1
2
R1082K_0402_5%@
12
J139A1SUYIN_020204FR004S506ZL
11223344 G
ND
15
GN
D2
6G
ND
37
GN
D4
8
C149
0.1U_0402_16V7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_AD10
PCI_AD21
PCI_TRDY#
PCI_AD28
PCI_AD18
PCI_AD0
PCI_AD15
PCI_AD31
PCI_AD2
PCI_PIRQG#
PCI_AD13
PCI_FRAME#
PCI_AD29
PCI_AD26
PCI_AD8
PCI_AD20
PCI_AD24
PCI_AD14
PCI_AD6
PCI_AD30
PCI_AD9
PCI_AD28
PCI_STOP#
PCI_AD6
PCI_AD27
PCI_AD18
PCI_AD16
PCI_AD16
PCI_AD23
PCI_AD13
PCI_GNT3#
PCI_AD5
CK
_33M
_MIN
PC
I_TE
RM
PCI_AD4
PCI_AD2PCI_AD3
PCI_AD7
PCI_AD30
PCI_AD1
PCI_AD19
PCI_AD20
PCI_AD24
PCI_AD12
PCI_AD22
PCI_AD9
PCI_DEVSEL#
PCI_AD18
PCI_AD26
MINIDSEL
PCI_AD25
PCI_AD17
PCI_AD11
PCI_PAR
PCI_AD0
PCI_AD15
PCI_C_BE0#
PCI_AD22
PCI_AD4
PCI_AD11
PCIRST#
CLK_33M_MPCI
SYS_PME#
WLAN_ACT2
PCI_AD5
PCI_AD3
PCI_AD1
PCI_AD8
PCI_AD12
PCI_AD7
PCI_C_BE1#
PCI_AD10
PCI_AD14
PCI_AD17PCI_C_BE2#
PCI_SERR#
PCI_PERR#
PCI_IRDY#
CLKRUN#
PCI_C_BE3#PCI_AD23
PCI_AD21PCI_AD19
PCI_AD25PCI_AD27
PCI_AD29PCI_AD31
CLK_33M_MPCI
PCI_REQ3#
PCI_PIRQH#
WLAN_ACT1HW_RADIO_DIS#
PCI_C_BE0# <19,24,26,27>
PCI_C_BE1#<19,24,26,27>
PCI_C_BE2#<19,24,26,27>
PCI_C_BE3#<19,24,26,27>
PCI_IRDY#<19,24,26,27>
PCI_PERR#<19,24,26,27>
PCI_AD[0..31] <19,24,26,27>
CLKRUN#<21,24,26,31,32>PCI_SERR#<19,24,26>
PCI_DEVSEL# <19,24,26,27>
PCI_STOP# <19,24,26,27>PCI_TRDY# <19,24,26,27>PCI_FRAME# <19,24,26,27>
PCI_PAR <19,24,26,27>
ICH_PME# <19,24,26,27,31,32>
PCIRST# <19,24,26,27,32>
PCI_GNT3# <19>
COEX2_WLAN_ACTIVE<35>
CLK_33M_MPCI<18>
PCI_PIRQH#<19>
PCI_REQ3#<19>
PCI_PIRQG# <19>
COEX1_BT_ACTIVE <35>
HW_RADIO_DIS#<32,33,35>
+5VS
+3VS
+3V
+3VS
+5VS
+3VS
+5VS
+3V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
28 52Friday, March 11, 2005
2005/03/01 2006/03/01
C288
0.047U_0402_16V4Z
1
2C299
0.047U_0402_16V4Z
1
2
KEY KEY
JMPCI1
QTC_C102A-056B11-01
11 2 2
33 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 161717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 404141 42 424343 44 444545 46 464747 48 484949 50 505151 52 525353 54 545555 56 565757 58 585959 60 606161 62 626363 64 646565 66 666767 68 686969 70 707171 72 727373 74 747575 76 767777 78 787979 80 808181 82 828383 84 848585 86 868787 88 888989 90 909191 92 929393 94 949595 96 969797 98 989999 100 100101101 102 102103103 104 104105105 106 106107107 108 108109109 110 110111111 112 112113113 114 114115115 116 116117117 118 118119119 120 120121121 122 122123123 124 124
R31910_0402_5%@
12
C290
0.047U_0402_16V4Z
1
2
R31110K_0402_5%
12
C2860.1U_0402_16V4Z
1
2
R313100_0402_5%
1 2
C300
0.047U_0402_16V4Z
1
2
C2910.1U_0402_16V4Z 1
2
C298
0.047U_0402_16V4Z
1
2
C2954.7P_0402_50V8C@
1
2
C289
0.047U_0402_16V4Z
1
2
C607
0.1U_0402_16V4Z
1
2
C287
0.047U_0402_16V4Z
1
2C297
0.047U_0402_16V4Z
1
2
R780 0_0402_5%
R801 0_0402_5%1 2
R3200_0402_5% 1 2
R312 0_0402_5%
1 2
C2850.1U_0402_16V4Z
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
XTL_OUT
CD_GNA
RIGHT
C_MD_SPK
XTL_IN
C_MIC
LINER
LEFT
CD_R_R
CD_L_R
LINEL
CD_GNA
MIC
+VDDA
HP_SENSE
CLK_14M_CODEC
NBA_PLUG<30>
INT_CD_L<23>
INT_CD_R<23>
MD_SPK<35>
MIC<30>
CD_GNA<23>
MONO_IN<30>
IAC_RST#<20>
IAC_SYNC<20>
IAC_SDATO<20>
LEFT <30>
RIGHT <30>
MD_MIC <35>
IAC_BITCLK <20,35>
IAC_SDATAI1 <20>
CLK_14M_CODEC <18>
EAPD<30>
CLK_14M_COMPAL <38>
+VDDA
+VDDA
+AUD_VREF
+3VS
+AVDD_AC97
+5VS
+AUD_VREF
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
29 52Friday, March 11, 2005
2005/03/01 2006/03/01
AC97 Codec
For ALC250 disable HW EQ when Headphone plug-in.
14.318MHz External
24.576MHz Crystalor External Colck
Ra stuff, Rb, Cb, and Xb empty.
Rb, Cb, and Xb stuff, Ra empty.
XTLSEL
24.576MHz Crystalor External Colck
MODE14.318MHz ExternalLOW
Floating
RaRb
00
01
10
11
SHUT DOWNPOWER OFF CD Play NORMAL NORMAL
*
(+VDDA~=4.79V)
VAUX(34)DVDD(1/9)
MODE
If Project need to implement Realtek Power Off CD play function.It must be supplied power for AVDD(Pin25 & 38) &VAUX(Pin34) & power off for DVDD(Pin1 & 9).When AVDD & VAUX powered and DVDD without power,it will bypass CD_L & CD_R to LINE_OUT_L & LINE_OUT_R.
When Project need implement Headphone channel output fromAudio Codec pin 39 & 41, it must have another driver to support JDfunction to change signal path from LINE_OUT_L & LINE_OUT_R toHP_OUT_L & HP_OUT_R when headphone insert.
U14
SI9182DH-AD_MSOP8
VIN4
SD8
VOUT 5
GND 3
SENSE or ADJ 6
ERROR7 CNOISE 1
DELAY2
C232 0.1U_0402_16V4Z
1 2
C569 1U_0603_10V4Z
1 2
R694 0_0805_5%1 2
C192
10U_0805_10V4Z
1
2
C259 1000P_0402_50V7K
12
L18
0_0805_5%
1 2
C269 4.7U_0805_10V4Z
1 2
C231 0.1U_0402_16V4Z
1 2
C2100.1U_0402_16V4Z
1
2
R230 10K_0402_5%
1 2
C241
0.1U_0402_16V4Z
1
2
C258
0.1U_0402_16V4Z
1
2
R2921M_0402_5%@
12
R222
150K_0603_1%
12
R164 0_0805_5%
1 2
R2980_0402_5%
1 2
C577 1U_0805_25V4Z1 2
C570 1U_0603_10V4Z
1 2
C2360.01U_0402_16V7K
1 2
R643
0_0402_5%@
12
R639 6.8K_0402_5%
1 2
C573
4.7U_0805_10V4Z
1
2
C240
10U_0805_10V4Z
1
2
C275 4.7U_0805_10V4Z
1 2
C234 1U_0603_10V4Z
1 2
R223
51K_0603_1%
12
C2570.1U_0402_16V4Z
1
2
R6386.8K_0402_5%
12
R29710_0402_5%@
12
R7630_0402_5%
1 2
C235 1U_0603_10V4Z
1 2
R284 22_0402_5%
1 2
R2990_0402_5%
12
R217 0_0805_5%1 2
C574
0.1U_0402_16V4Z
1
2
R2280_0402_5%
1 2
U16
ALC250_LQFP48
AUX_L14
AUX_R15
JD117
JD216
LINE_IN_L23
LINE_IN_R24
CD_L18
CD_R20
CD_GND19
MIC121
MIC222
PHONE13
PC_BEEP12
LINE_OUT_L 35
LINE_OUT_R 36
MONO_OUT/VREFOUT3 37
RESET#11
SYNC10
BIT_CLK 6
SDATA_OUT5
SDATA_IN 8
XTL_IN 2
XTL_OUT 3
AFILT1 29
AFILT2 30
VREFOUT 28
VREF 27
DV
DD
11
DV
DD
29
AV
DD
125
AV
DD
238
DCVOL 32
XTLSEL46
SPDIFI/EAPD47
SPDIFO48
DVSS14DVSS27
NC 31VREFOUT2 33
VAUX 34SCK 43SDA 44
NC45
NC 40AVSS1 26AVSS2 42
HP_OUT_L 39
HP_OUT_R 41
R642 6.8K_0402_5%
1 2
R229 2.4K_0402_5%
1 2
C233 0.1U_0402_16V4Z@1 2
R640 20K_0402_5%
1 2
R641 20K_0402_5%
1 2
C571
4.7U_0805_10V4Z
1
2
R6320_0402_5%@
12
C268 1000P_0402_50V7K
12
C21910U_0805_10V4Z
1
2
C276 1000P_0402_50V7K
12
R63320K_0402_5%
1 2
C568 1U_0603_10V4Z
1 2
C265 1000P_0402_50V7K
12
R285 22_0402_5%
1 2
C277
15P_0402_50V8J@
1
2
C271
10U_0805_10V4Z
1
2
C2090.1U_0402_16V4Z
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
MONO_IN
MIC
INTSPK_L1-3
INTSPK_R1-3
INTSPK_L1-2INTSPK_L1
INTSPK_R1-2INTSPK_R1
INTSPK_R2
SHUTDOWN#
NBA_PLUGVOL_AMP
NBA_PLUG
LEFT_1
RIGHT_1
LEFT_2
HP_L
LEFT
HP_R
RIGHT_2RIGHT
INTSPK_L1INTSPK_R1
INTSPK_R2INTSPK_L2
VOL_AMP
NBA_PLUG
INTSPK_L1INTSPK_L2INTSPK_R1
INTSPK_R1-4
INTSPK_L1-4
LEFT<29>
RIGHT<29>
NBA_PLUG<29>
EAPD <29>
MONO_IN <29>
MIC<29>
BEEP#<32>
CBS_SPK#<26>
SPKR<21>
+3V
+3V
+VDDA
+3V
+AUD_VREF
+5VAMP
+5VAMP
+5VAMP
+5VAMP
+5VS
+3V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
30 52Friday, March 11, 2005
2005/03/01 2006/03/01
+3V POWER
+3V POWER
+3V POWER
EXT.
MICPHONEJACK
fo=1/(2*3.14*R*C)=260HzR=1.3K / C=0.47U
(0.47U~1U)
Pin 2HIGH
LOW PIN 5,23 ACTIVE
PIN 6,20 ACTIVE
W=40Mil
(0.65V -> 10dB )
R630560_0402_5%1 2
R22147_0402_5%
1 2
C5570.47U_0603_16V4Z
1 2
R6241.3K_0603_5%
12
C16
0
22P_
0402
_25V
8K
@
1
2
U35ASN74LVC14APWLE_TSSOP14
O 2I1
P14
G7
C5520.47U_0603_16V4Z
1 2
L29FBM-11-160808-700T_0603
1 2
U35BSN74LVC14APWLE_TSSOP14
O 4I3
P14
G7
L17FBM-11-160808-700T_0603
1 2
D19RB751V_SOD323
21
U15A
SN74LVC125APWLE_TSSOP14
I2 O 3OE
#1
P14
G7
C226330P_0402_50V7K
1
2
+
C564150U_D2_6.3VM
1 2
C5560.47U_0603_16V4Z
1 2
R2328.2K_0402_5%
1 2
R2262.4K_0402_5%
12
JHP1
AMP_1-1470184-2
54
1
CN
CS
3
JMIC1
AMP_1-1470184-2
54
1
CN
CS
3
C
BE
Q102SC2411K_SC59
1
2
3
C22410U_0805_10V4Z
1
2
C16
1
22P_
0402
_25V
8K
@
1
2
JSPK1
ACES_85205-0400
11223344
C5631U_0603_10V4Z
1 2
R644 0_0402_5%1 2
C211330P_0402_50V7K
1
2
C5530.47U_0603_16V4Z
1 2
R635560_0402_5%1 2
C213 0.47U_0603_16V4Z
1 2
R6452.2K_0402_5%
12
C559
0.47U_0603_16V4Z1
2
L16
0_0805_5%1 2
C561
1U_0603_10V4Z 1
2
R6231.3K_0603_5%
12
C16
2
22P_
0402
_25V
8K
@
1
2
R220100K_0402_5%
12
C547
4.7U_0805_10V4Z
1
2
C5460.047U_0603_16V7K
1
2
R258100K_0402_5%
12
C15
9
22P_
0402
_25V
8K
@
1
2
C5661U_0603_10V4Z
1 2
R6712.2K_0402_5%
12
R21847_0402_5%
1 2
R62710K_0402_5%
12
C549 0.1U_0402_16V4Z1 2
C572220P_0402_50V7K
1
2
R628560_0402_5%1 2
C212 0.47U_0603_16V4Z1 2
C560
0.47U_0603_16V4Z1
2
R23110K_0402_5%
12
L15
FBM-11-160808-700T_06031 2
R219
10K_0402_5%
12
R225
10K_0402_5%
12
R6251.5K_0402_1%
12
C2391U_0603_10V4Z
1 2
C548
0.1U_0402_16V4Z
1
2
C5651U_0603_10V4Z
1 2
C558
0.1U_0402_16V4Z
1
2
+
C555150U_D2_6.3VM
1 2
U34
TPA0232PWP_TSSOP24
HP/LINE#2VOLUME3LOUT+4ROUT+21LLINEIN5
LHPIN6RHPIN20
PVDD7PVDD18VDD19
RLINEIN23
GND 24GND 13GND 12GND 1
RIN 8LIN 10ROUT- 16LOUT- 9BYPASS 11PC-BEEP 14SE/BTL# 15
CLK17
SHUTDOWN# 22
R617100K_0402_5%
12
G
D
S
Q402N7002_SOT23
2
13
C5540.1U_0402_16V4Z
1 2
C5670.22U_0603_10V7K
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
IRTXOUTIRMODE
IRRX
IRTXOUTIRMODE
+IR_3VS
CLK_14M_SIOCLK_PCI_SIO
LPC_LAD3
LPC_LAD1LPC_LAD2
LPC_LAD0
SIO_PME#
CLK_14M_SIO
LPC_LFRAME#
PLTRST_SIO#SIO_PD#
CLK_PCI_SIOPM_CLKRUN#
LPTSLCT
LPTERR#
LPTBUSYLPTPE
LPTACK#
SLCTIN#INIT#
LPTAFD#LPTSTB#
LPD3
LPD6LPD7
LPD1LPD2
LPD4LPD5
LPD0
FD4
LPTACK#
FD6
LPD3
FD2
FD3LPD2 FD2LPD1 FD1LPD0 FD0
LPD7 FD7FD6FD5FD4
LPD6LPD5LPD4
LPTSTB#
LPTAFD#LPTSLCTIN#SLCTIN#
INIT# LPTINIT#
FD2
FD0
FD3
FD4
LPTSLCTIN#
FD1
LPTINIT#
FD7
LPTERR#
LPTINIT#
LPTACK#
LPTSLCT
FD3
LPTBUSY
FD5
FD5
FD6
LPTPE
LPTSLCTIN#LPTBUSY
LPTPE
LPC_LAD[0..3]
LPC_LDRQ1#
FD6FD5FD4
FD7
LPTBUSY
FD3LPTSLCTIN#
LPTINIT#
LPTSLCTLPTPE
LPTACK#
FD2
FD7
LPTSLCT
IRRX
SIO_GPIO11SIO_SMI#
LPTERR#FD0AFD#/3M#
FD1AFD#/3M#
LPTERR#FD1
FD0
AFD#/3M#
SIRQ
LPC_LAD[0..3]<20,32>
LPC_LFRAME#<20,32>
ICH_PME#<19,24,26,27,28,32>
PLTRST_SIO#<19>
CLKRUN#<21,24,26,28,32>CLK_33M_LPCSIO<18>
CLK_14M_SIO<18>
LPC_LDRQ1#<20>
SIRQ<21,26,32>
+3VS
+3VS
+3VS
+IR_ANODE
+5V_PRN
+5V_PRN +5V_PRN
+5V_PRN
+5VS
+3VS
+5V_PRN
+3VS +3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
31 52Friday, March 11, 2005
2005/03/01 2006/03/01
(30mil)
FIR Module
SD/MODE: SHUTDOWN MODE, HIGH ACTIVEMODE: HIGH/LOW SPEED SELECT
(60mil)
PCB Footprint : TFDU6101E
(60mil)
Reserved
Parallel PortGPIO11 1= 4E 0=2E
R1384.7_1206_5%
1 2
R324 33_0402_5%1 2
U10
IR_VISHAY_TFDU6101E-TR4_8P
IRED_C2
GND8 MODE 7SD/MODE 5
IRED_A 1
RXD4VCC6
TXD 3
RP9
2.7K_1206_10P8R_5%
10 9 8 7 6
1 2 3 4 5
R39310K_0402_5%
12
C620 220P_0402_25V8K1 2
R40110K_0402_5%
12
C626 220P_0402_25V8K1 2
C615 220P_0402_25V8K1 2
C618 220P_0402_25V8K1 2
R32733_0402_5%1 2
C34310P_0402_25V8K@
1
2
C623 220P_0402_25V8K1 2
C616 220P_0402_25V8K1 2
C145
10U_0805_10V4Z
1
2
R39810K_0402_5%
@
12
C1440.1U_0402_16V4Z
1
2
D1
RB420D_SOT23
2 1
JP1
FOX_DZ11391-H7
13251224112310229
218
207
196
185
174
163
152
141
2627
R415 10K_0402_5%
C3371U_0603_10V4Z
1
2
R1374.7_1206_5%
1 2
RP1
33_0804_8P4R_5%
18273645
C612 220P_0402_25V8K1 2
R38010_0402_5%
@
12
R133_0402_5%1 2
R38310K_0402_5%
12
C3261U_0603_10V4Z
1
2
RP8
2.7K_1206_10P8R_5%
10 9 8 7 6
1 2 3 4 5
C7220P_0402_25V8K
C621 220P_0402_25V8K1 2
C36918P_0402_50V8K@
1
2
R15247_1206_5%
12
POWER
CLOCK
GPIO
LPC I/F SERIAL I/F
FIR
PARALLEL I/F
U27
LPC47N217_STQFP64
LAD010LAD112LAD213LAD314
LFRAME#15LDRQ#16
PCI_RESET#17LPCPD#18
CLKRUN#19PCI_CLK20SER_IRQ21IO_PME#6
RXD1 62TXD1 63
DSR1# 64RTS1# 1CTS1# 2DTR1# 3
RI1# 4DCD1# 5
IRRX2 37IRTX2 38
IRMODE/IRRX3 39
INIT# 41SLCTIN# 42
PD0 44PD1 46PD2 47PD3 48PD4 49PD5 50PD6 51PD7 53
SLCT 55PE 56
BUSY 57ACK# 58
ERROR# 59ALF# 60
STROBE# 61
GPIO4023GPIO4124GPIO4225GPIO4327GPIO4428GPIO4529GPIO4630GPIO4731GPIO1032GPIO11/SYSOPT33GPIO12/IO_SMI#34GPIO13/IRQIN135GPIO14/IRQIN236GPIO2340
CLK149
VTR 7
VCC 26
VCC 54
VSS8VSS22VSS43VSS52 VCC 45
VCC 11
C625 220P_0402_25V8K1 2C624 220P_0402_25V8K1 2
RP7
33_0804_8P4R_5%
18273645
R154 0_0402_5%@
1 2
C622 220P_0402_25V8K1 2
R40310_0402_5%
@
12
C619 220P_0402_25V8K1 2
C611 220P_0402_25V8K1 2R323 33_0402_5%1 2
R38110K_0402_5%
12
C613 220P_0402_25V8K1 2
C617 220P_0402_25V8K1 2
C3311U_0603_10V4Z
1
2R22.2K_0402_5%
C614 220P_0402_25V8K1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
ECAGND
FSEL#FRD#
ECAGNDBATT_TEMP
ECAGNDBATT_OVP
EC_TINIT#EC_TCK
EC_TDIEC_TDO
EC_TMS
EN_WOL#
ECDEBUG
ECAGNDM/B_ID
M/B_ID
SMB_EC_DA2SMB_EC_CK2
SMB_EC_CK1SMB_EC_DA1
EC_TINIT#
PCIRST#
PSCLK2PSDAT2
PSCLK3
PSDAT3
PSCLK2PSDAT2
PSDAT1T
USER_BTN1#
KBA3
ADB[0..7]
KBA[0..19]PSCLK3PSDAT3
SCROLLLOCK#
CRY1
ECRST#
GATEA20
KBA1
PSCLK1T
KBA2
LFRAME#
CRY2
USER_BTN2#
LPC_LAD[0..3]
ICH_PWRGD
ICH_BATLOW#
KBA19
KBA6
KBA14
KBA2KBA1
KBA3
KBA0
KBA9
KBA4KBA5
KBA7
KBA15
KBA13
KBA8
KBA12
KBA10KBA11
ADB7
ADB4
KBA16
KBA18KBA17
ADB3
ADB6
ADB2
ADB0ADB1
BATT_TEMP
ADB5
BATT_OVPM/B_ID
EC_TDO
PM_CLKRUN#
KSI3
KSI1KSI2
KSI4
KSO0
KSO3KSO2KSO1
KSO5KSO4
KSO6
KSO8KSO7
KSO10KSO9
KSO11
KSO13KSO12
KSO14KSO15
KSI0
KSI5KSI6KSI7
PCIRST#
LPC_LAD3
LPC_LAD1LPC_LAD2
LPC_LAD0
LFRAME#
MSEN#
SLP_S4#
THERMATRIP_VGA#
ECRST#
KBRST#GATEA20
SMB_EC_CK1SMB_EC_DA1SMB_EC_CK2SMB_EC_DA2
EC_SCI#
CRY2CRY1
PSDAT2PSCLK2
PSCLK1TPSDAT1T
PSCLK3PSDAT3
ECAGND
SCROLLLOCK#
KBA5
EC_SMI#
EC_SMI#
ECDEBUG
MSEN#
HW_RADIO_DIS#PSCLK1TPSDAT1T HW_RADIO_LED#
EC_TCK
CLK_33M_LPCEC<18>
PSCLK1<33>PSDAT1<33>
KBRST#<20>
GATEA20<20>
ADB[0..7] <33>
KBA[0..19] <33>
SIRQ<21,26,31>
PSCLK2PSDAT2
LPC_LAD[0..3]<20,31>
COMPAL_INT# <38>
ECRST#ICH_PWRGD <21>
LPC_LFRAME#<20,31>
PCIRST#<19,24,26,27,28>
SLP_S3#<21>LID_SWOUT#<21>SLP_S5#<21>
LID_SW#<33>
ICH_PME#<19,24,26,27,28,31>
BATT_OVP <40>
USER_BTN2# <33>
BATT_TEMP <39>
+VCCP_PWRGD <42>
IREF <40>
ICH_BATLOW# <21>
FAN1SPD <34>
INVT_PWM <16>
ACIN <21,40,41>
ON/OFF <33>
USER_BTN1# <33>
MSEN# <17>
THERMATRIP_VGA# <16>PROCHOT# <5>
FRD# <33>FWR# <33>FSEL# <33>
EC_ON <33>
EC_THRM# <21>
SLP_S4# <21>
FSTCHG <40>VR_ON <37,45>
BEEP# <30>
ACOFF <40>
PWRBTN_OUT#<21>SUSP#<16,24,33,37,42>
PWR_LED#<33>
DAC_BRIG <16>EN_FAN1 <34>
NUMLOCK#<33>CHARGE_LED#<33>BATT_LED#<33>CAPLOCK#<33>
SYSON<37,42>
BKOFF#<16>RSMRST#<21>
EC_SCI#<21>
KSI[0..7]<33>KSO[0..15]<33>
SMB_EC_DA2<16,34>SMB_EC_CK2<16,34>SMB_EC_DA1<33,38,39>SMB_EC_CK1<33,38,39>
CLKRUN#<21,24,26,28,31>
M/B_ID
BIA <10,16>
SCROLLLOCK#<33>
PAD_LOCK#<33>
EC_SMI#<21>
HW_RADIO_DIS# <28,33,35>HW_RADIO_LED# <33>
+EC_AVCC
+3VALW
+3VALW
+3VALW
+3VS
+3VALW
+5VALW
+3VS
+3VALW
+5VS
+3VALW
+3VALW
+3VALW
+3VALW
+EC_AVCC
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
32 52Friday, March 11, 2005
2005/03/01 2006/03/01
PROPRIETARY NOTE
M/B Ver.
Voltage 0.0 0.4 0.8 1.2
0.1
BORAD ID
Close to RTC pad
1.6
BTDIS# signal is reservedfor BT modula,BTON# signal is reserved for MDC\BT module
R181, R191, R192 and R193 are reserved for KB910.
Reserved for 87591L
R187 & R176 are reserced for 87591L
Pin8, 22, 54, 82, 84, 89 and 172 is diffrence define with 87591
For KB910
For NS 87591L
0.2
R80210K_0402_5% 12
R7104.7K_0402_5%
12
C608
0.1U_0402_16V4Z1
2
C60210P_0402_50V8J
1
2
R79810K_0402_5% 12
R7940_0402_5%
@
12
R71510K_0402_5%
12
R709
4.7K_0402_5%
12
Y3
32.768KHZ_12.5PF_6HT3
12
R696 10K_0402_5%1 2
R71410K_0402_5%
12
R753 0_0402_5%1 2
R72047K_0402_5%
12
C6100.1U_0402_16V4Z
1
2R719 33_0402_5%@
1 2
C5970.01U_0402_16V7K
1 2
R718 10K_0402_5%@ 1 2
R700 10K_0402_5%@
1 2
C592
0.1U_0402_16V4Z1
2
R803 0_0402_5%1 2
C5910.1U_0402_16V4Z
1 2
R698 10K_0402_5%@
1 2
L310_0603_5%
12
R713
4.7K_0402_5%
12
R79510K_0402_5% @12
R711100K_0402_5%
1 2
C60110P_0402_50V8J
1
2
R708 0_0603_5%12
R695 10K_0402_5%1 2
R730 0_0402_5%@ 1 2
R732 0_0402_5%1 2
C599
0.1U_0402_16V4Z
1
2
R7124.7K_0402_5%
12
R70513K_0603_5%
12
C5980.01U_0402_16V7K
1 2
R79710K_0402_5% 12
R733 0_0402_5%1 2
R259
100K_0402_5%
1 2
R735 10K_0402_5%1 2
R697 10K_0402_5%
1 2
R731 0_0402_5%@ 1 2
R699 10K_0402_5%@
1 2
R707 10K_0402_5%
1 2
R706 20M_0402_5%
@
1 2
R7930_0402_5%
12
C606
1000P_0402_50V7K1
2
C596
1000P_0402_50V7K
1
2
C6000.01U_0402_16V7K
1 2
C609
15P_0402_50V8D@
1 2
R79610K_0402_5% @12
C604
0.1U_0402_16V4Z
1
2
L30
0_0603_5%1 2
R704100K_0603_5%
12
R300 10K_0402_5%1 2
R701 100K_0402_5%1 2
JP4
E&T_96212-1011S
@
1 12 23 34 45 56 67 78 89 9
10 10
R302 10K_0402_5%
1 2
R734 10K_0402_5%1 2
Host
PS2 interface
DA output or GPO
SM BUS
PWR
FAN/PWM
INTERFACE
key Matrixscan
AD INtput or GPI
AddressBUS
DataBUS
U37
KB910L A1_LQFP144
LPC AD0/LAD012 LPC AD1/LAD110 LPC AD2/LAD29 LPC AD3/LAD36
PM_CLKRUN#/ CLKRUN#44
LPC_FRAME# / LFRAME#5 SERIRQ3
CLK_PCI_EC/PCICLK14
BATT LOW LED#/ E51MR0101
VC
C/ E
C V
CC
11V
CC
/ E
C V
CC
26
VC
C12
7V
CC
141
EC
_AV
CC
/ A
VC
C75
KSI0/GPIO3063KSI1/GPIO3164KSI2/GPI03265KSI3/GPIO3366KSI4/GPIO3467KSI5/GPI03568KSI6/GPIO3669KSI7/GPIO3770
KSO0/GPIO2047KSO1/GPIO2148KSO2/GPIO2249KSO3/GPIO2350KSO4/GPIO2451KSO5/GPIO2552KSO6/GPIO2653KSO7/GPIO2754KSO8/GPIO2855KSO9/GPIO2956KSO10/GPIO2A57KSO11/GPIO2B58KSO12/GPIO2C59KSO13/GPIO2D60KSO14/GPIO2E61KSO15/GPIO2F62
KBRST#/GPIO01/KBRST#2
PM SLP S3#/GPIO048 BKOFF#/GPIO037
PM SLP S05#/ GPIO0717
PSCLK1 91PSDAT1 92PSCLK2 93PSDAT2 94PSCLK3 95PSDAT3 96
LID SW#/ GPIO0A20SUSP#/GPIO0B21
XCLKO140XCLKI138
BATTEMP/AD0/GPIO38 71BATT OVP/AD1/GPIO39 72
ADP_I/AD2/GPIO3A 73AD BID0/AD3/GPIO3B 74
DAC_BRIG/DA0/GPIO3D 76EN DFAN1/DA1/GPIO3D 78
IREF2/DA2 79EN DFAN2/DA3/ GPIO3F 80
INVT_PWM/GPIO0F/PWM1 25BEEP#/GPIO10/PWM2 27
GPIO57/GPIO57 137
EC SMC1/GPIO44/SCL185
GPIO58/GPIO58 142GPIO59/GPIO59 143
EC SMC2/GPIO46/SCL287 EC SMD2/ GPIO47/SDA288
FAN SPEED1/GPIO14/FANFB1 32
FSEL#/SELMEM# 144
FAN SPEED2/GPIO15/FANFB2 33
GN
D13
GN
D28
GN
D39
GN
D10
3
EC RST#/ ECRST#42
AC IN/ GPIO1C 43
PCMRST#/GPIO1E 45WL OFF#/GPIO1F 46PBTN_OUT#/GPIO0C22
ONOFF/GPIO18 36
FRD#/RD# 135FWR#/WR# 136
BATT CHGI LED#/ E51CS#99
CAPS LED#/ E51TMR1100
EC ON/ GPIO1B 41
ACOFF/GPIO18/PWM4 31
ARROW LED#/ E51 INT0102
OUT BEEP/GPIO12/PWM3 30
ADB0/D0 125ADB1/D1 126ADB2/D2 128ADB3/ D3 130ADB4/D4 131
KBA0/A0 111KBA1/A1 112KBA2/A2 113KBA3/A3 114KBA4/A4 115
KBA13/A13 124KBA12/A12 123
KBA5/A5 116KBA6/A6 117KBA7/A7 118
KBA11/A11 122KBA10/A10 121
KBA14/A14 110KBA15/A15 109KBA16/A16 108KBA17/A17 107KBA18/A18 106KBA19/A19 98
KBA8/A8 119KBA9/A9 120
GA20/ GPIO00/GA201
VC
C /
EC
VC
C37
VC
C /
EC
VC
C10
5
AG
ND
77
GN
D12
9G
ND
139
PCIRST#15
EC URXD/KSO16/GPIO4889EC UTXD/KSO17/GPIO4990
ADB5/D5 132ADB6/D6 133ADB7/D7 134
EC_RSMRST#/ GPIO024
EC LID OUT#/GPIO0616
EC SMI#/GPIO0818EC SWI#/GPIO0919
EC PME#/GPIO0D23
ECTHERM#/GPIO11 29
SYSON/GPIO56/ E51 INT1104
ALI/MH#/GPIO40 81FSTCHG/GPIO41 82
VR ON/ GPIO42 83
SELIO2#/ GPIO43 84
EC SMD1/GPIO44/SDA186
SELIO#/ GPIO50 97
PWRLED#/ GPIO1938
PCM_SPK#/EMAIL_LED#/ GPIO1634SB_SPKR/PWR_SUSP_LED#/ GPIO1735
NUMLED#/ GPIO1A40
EC SCI#/SCI#/GPIO0E24
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
FWE#
KSI[0..7]KSO[0..15]
ON/OFFBTN#NUM_LED#
CAPS_LED#SCROL_LED#
ON/OFFBTN#ON/OFF
EC_ON
KSI2KSI3
KSO6
KSO13KSO14
KSI5
KSO7
KSO9
KSO5
KSO2
KSI4
KSI0
KSO3
KSO1
KSO12
KSO8
KSO11
KSO0
KSI1
KSO15KSO10
KSI6
KSO4
KSI7
KSO6
KSO7
KSO2
KSO1
KSI3
KSO8
KSO4
KSI0
KSI2
KSI4
KSI6
KSO14
KSO9
KSO15KSO10KSO11
KSO13KSO12
KSO3
KSO5
KSO0KSI5
KSI7KSI1
HW_RADIO_DIS#
LID_SW#
FRD#
FSEL#
FWE#
KBA0KBA1KBA2KBA3KBA4
KBA5KBA6KBA7KBA12KBA15KBA16KBA18
KBA14
KBA11KBA9KBA8KBA13
KBA17
ADB0ADB1ADB2
ADB3ADB4ADB5ADB6ADB7
KBA10
ADB[0..7]
KBA[0..19]
HW_RADIO_LED#
PSDAT1<32>PSCLK1<32>
PSDAT1 <32>PSCLK1 <32>
CR_LED# <26>
SMB_EC_CK1<32,38,39>SMB_EC_DA1<32,38,39>
PWR_LED#<32>CHARGE_LED#<32>BATT_LED#<32>
EC_ON<32>
LID_SW# <32>
ON/OFF <32>
51ON# <44>
FWR# <32>
EC_FLASH# <21>
SUSP# <16,24,32,37,42>USER_BTN1# <32>USER_BTN2# <32>
NUMLOCK# <32>SCROLLLOCK# <32>CAPLOCK# <32>HDD_ACT# <23>
PAD_LOCK# <32>
HW_RADIO_DIS# <28,32,35>
KSI[0..7]<32>KSO[0..15]<32>
FSEL# <32>
FRD# <32>
ADB[0..7] <32>
KBA[0..19] <32>
HW_RADIO_LED#<32>
+5VALW +5VALW
+3VALW+3VALW
+5VS +5VS
+3VS
+3VALW
+3VALW
+3V
+3VALW
+3VALW
+3V
+3VBIOS+3VALW
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
33 52Friday, March 11, 2005
2005/03/01 2006/03/01
KeyBoard
T/P
Killer switch
Power BTN
SW Board
LED Board
C172100P_0402_25V8K1 2
G
D S
Q152N7002_SOT23
2
1 3
C167 100P_0402_25V8K1 2
SW1SPPB530600_4P
1
43
2
C3191000P_0402_50V7K
1
2
U17TC7SH32FU_SSOP5
I0 2
I1 1O4
G3
P5
C174 100P_0402_25V8K1 2
C183 100P_0402_25V8K1 2
JLED1
ACES_85205-0800
1122334455667788
9 9
10 10
C181 100P_0402_25V8K1 2
C175 100P_0402_25V8K1 2
JPSWP1
SUYIN_80065AR-020G2T
1 23 45 67 89 1011 1213 1415 1617 1819 20
R301100K_0402_5%
12
SW2DS-1208_3P
11
22
33
C177 100P_0402_25V8K1 2
D13
RLZ20A_LL34
12
R726 10K_0402_1%1 2
C178 100P_0402_25V8K1 2
C28310U_1206_10V4Z
1
2
C187 100P_0402_25V8K1 2
R34922K_0402_5%
12
C185 100P_0402_25V8K1 2C184100P_0402_25V8K1 2
R34722K_0402_5%
1 2
JTP1
ACES_85203-0602
1 72 83 9456
101112
R305
100K_0402_5%
12
C173 100P_0402_25V8K1 2
R306
100K_0402_5%
12
C169 100P_0402_25V8K1 2
C164100P_0402_25V8K1 2
U38
SST39VF040-70-4C-WH_TSOP32
A111A92A83A134A145A176WE#7VCC8A189A1610A1511A1212A713A614A515
A3 17A2 18A1 19A0 20DQ0 21DQ1 22DQ2 23VSS 24DQ3 25DQ4 26DQ5 27DQ6 28DQ7 29
A10 31OE# 32
A416
CE# 30
C170 100P_0402_25V8K1 2
JP2
ACES_85203-2402
112233445566778899101011111212131314141515161617171818191920202121222223232424
25 2526 2627 2728 2829 2930 3031 3132 3233 3334 3435 3536 3637 3738 3839 3940 4041 4142 4243 4344 4445 4546 4647 4748 48
C166 100P_0402_25V8K1 2
C179 100P_0402_25V8K1 2
C2820.1U_0402_16V4Z
1
2
U19
AT24C16N-10SI-2.7_SO8
A0 1A1 2
SDA5 SCL6
VCC8
A2 3GND 4
WP7
C176100P_0402_25V8K1 2
C182 100P_0402_25V8K1 2
C168100P_0402_25V8K1 2
R309
100K_0402_5%
12
R346100K_0402_5%
12
R3590_0402_5%1 2
D14
DAN202U_SC70
2
31
C186 100P_0402_25V8K1 2
D6DAN217_SC59
@ 231
C180100P_0402_25V8K1 2
Q27
DTC124EK_SC59
2
13
C165 100P_0402_25V8K1 2
R304 0_0603_5%
1 2
C171 100P_0402_25V8K1 2
C2840.1U_0402_16V4Z1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FAN1_ONFAN1_VFB
FAN1VREF
H_THERMDC
SMB_EC_DA2
H_THERMDA
SMB_EC_DA2SMB_EC_CK2
SMB_EC_CK2
FAN1_VOUT
SMB_EC_DA2<16,32>SMB_EC_CK2<16,32>
SMB_EC_CK2<16,32>
SMB_EC_DA2<16,32>
H_THERMDA<5>
H_THERMDC<5>
FAN1SPD <32>EN_FAN1<32>
FAN1SPDC <38>
FAN1_VOUTC <38>
+12VALW
+3VS
+5VS
+3VS
+5VS
+3VS
+3VALW
+5VALW
+3V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
34 52Friday, March 11, 2005
2005/03/01 2006/03/01
1
E 3
2222 SYMBOL(SOT23-NEW)
2
C
B
FAN1
FAN1 Control and Tachometer
C1412200P_0402_50V7K
1
2
U32
LM75CIMMX-5_MSOP8
@
SDA1SCL2
A2 5A1 6
VCC 8
OS#3GND4
A0 7
JFAN1
ACES_85205-0300
123
C5452200P_0402_50V7K
1 2
D17
RB751V_SOD323 2
1
R622100K_0402_5%
1 2
R14910K_0402_5%
12
C156
0.01U_0402_16V7K
1
2
S
GD Q41
SI3456DV-T1_TSOP63
624
51
R590100K_0402_5%
12
R61
615
0K_0
402_
5%
12
R1368.2K_0402_5%
12
R8080_0603_5%
@
12
R8100_0402_5%@
12
U9
ADM1032ARM_RM8
VDD1 1
ALERT# 6
THERM# 4
GND 5
D+2
D-3
SCLK8
SDATA7
C15
510
00P
_040
2_50
V7K
1
2R560 1K_0402_5%@
1 2
R80910K_0402_5%
12
R1408.2K_0402_5%
12
U33A
LM358A_SO8
+IN3
-IN2 OUT 1
P8
G4
R16310K_0402_5%@
12
C537
22U_1206_16V4Z_V1
1
2
C1320.1U_0603_25V7M
1
2
C5270.1U_0402_16V4Z
@
1
2
C55
11U
_060
3_10
V4Z
1
2
R8070_0603_5%
12
R799 0_0402_5% @1 2
R812 0_0402_5%@1 2
R800 0_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BT_
PW
R
USB2+USB2-
COEX3COEX1_BT_ACTIVE
COEX2_WLAN_ACTIVEHW_RADIO_DIS#
USBP2+<21>USBP2-<21>
IAC_SDATO_MDC<20>IAC_SYNC_MDC <20>IAC_SDATAI2 <20>
IAC_BITCLK <20,29>
MD_SPK <29>
COEX1_BT_ACTIVE<28>
COEX2_WLAN_ACTIVE<28>
BT_ACTIVE
MD_MIC<29>
IAC_RST#_MDC<20>
HW_RADIO_DIS#<28,32,33>
+3V+3V
+5VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
35 52Friday, March 11, 2005
2005/03/01 2006/03/01
MDC CONN.
Definition
H1HOLEA
1
FM5@
1
R63422_0402_5%@1 2
R629 10K_0402_5%1 2
H16HOLEA
1
CF14@
1
JP3 ACES_88021-3001
MONO_OUT/PC_BEEP1GND3AUXA_RIGHT5AUXA_LEFT7CD_GND9CD_RIGHT11CD_LEFT13GND15
AC97_SDATA_OUT23 3.3Vmain21
3.3Vaux17GND19
AC97_RESET#25GND27AC97_MSTRCLK29
AUDIO_PWDN 2MONO_PHONE 4Bluetooth Enable 6
GND 8+5V 10
USB Data+ 12USB Data- 14
PRIMARY DN 165Vd 18
GND 20AC97_SYNC 22
AC97_SDATA_IN1 24AC97_SDATA_IN0 26
GND 28AC97_BITCLK 30
GN
D1
31G
ND
232
GN
D3
33G
ND
434
GN
D5
35G
ND
636
H24HOLEA
@
1
R631 0_0402_5%1 2
L320_0603_5%
12
CF10@
1
H25HOLEA
@
1
JBTP1
JST_BM10B-SRSS-TB
@
12345678910
1112
H9HOLEA
1
CF13@
1
FM1@
1
CF6@
1
CF5@
1
H15HOLEA
1
H7HOLEA
1
H6HOLEA
1
CF15@
1
H3HOLEA
@
1
R804 10K_0402_5% @1 2
C5620.1U_0402_16V4Z
@1 2
T24PAD@
H13HOLEA
@
1
H14HOLEA
@
1
R63622_0402_5%1 2
CF2@
1
H4HOLEA
@
1
CF16@
1
H18HOLEA
1
H17HOLEA
@
1
CF8@
1
CF4@
1
CF11@
1
H19HOLEA
1
FM4@
1
R637
22_0402_5%
1 2
FM3@
1
CF12@
1
H11HOLEA
1
H8HOLEA
1
FM2@
1
C6050.1U_0402_16V4Z
1
2
H20HOLEA
@
1
M1HOLEA
@
1
H10HOLEA
@
1
FM6@
1
H22HOLEA
@
1
CF9@
1
H5HOLEA
1
H12HOLEA
1
H23HOLEA
@
1
R6260_0402_5%@ 12
CF7@
1
H21HOLEA
@
1
CF3@
1
CF1@
1
H2HOLEA
@
1
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
OVCUR#0 <21> USBP0-<21>USBP0+<21>
USBP1-<21>USBP1+<21>
USBP3- <21>USBP3+ <21>
USBP4-<21>USBP4+<21>
OVCUR#1 <21>
OVCUR#3 <21>
OVCUR#4 <21>
+USB_AS
+USB_BS
+5VS
+5VS
+USB_CS+USB_CS
+USB_AS
+USB_BS
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
36 52Friday, March 11, 2005
2005/03/01 2006/03/01
C63410P_0402_25V8K
@
1
2D26PSOT24C_SOT23
@
2 31
JUSBP1
SUYIN_020122MR008S540ZU
VCC1D0-2D0+3VSS4
VCC 5D1- 6D1+ 7VSS 8
G210 G1 9G3 11G412
C18
0.1U_0402_16V4Z
1
2
C154
0.1U_0402_16V4Z
1
2
C315
0.1U_0402_16V4Z
1
2 R345100K_0402_5%
12
C62810P_0402_25V8K
@
1
2
C316
470P_0402_50V7K
@
1
2
C63110P_0402_25V8K
@
1
2
C63210P_0402_25V8K
@
1
2
+C26150U_D2_6.3VM @
1
2
C63310P_0402_25V8K
@
1
2
C62710P_0402_25V8K
@
1
2
R755 0_0402_5%1 2
C317
470P_0402_50V7K
1
2
C312
470P_0402_50V7K
1
2
R754 0_0402_5%1 2
+C24
150U_D2_6.3VM
1
2
U13
TPS2061IDGN_MSOP8
GND1IN2
OC# 5OUT 6
OUT 8
IN3EN#4
OUT 7
R158100K_0402_5%
12
C528
470P_0402_50V7K
1
2
JUSBP2
SUYIN_2569AR-04G5T
VCC1D-2D+3GND4
GND15GND26
C63010P_0402_25V8K
@
1
2
D25PSOT24C_SOT23
@
2 31
+C157
150U_D2_6.3VM
1
2
R6100K_0402_5%
12
+C25
150U_D2_6.3VM
1
2
U3
TPS2061IDGN_MSOP8
GND1IN2
OC# 5OUT 6
OUT 8
IN3EN#4
OUT 7
C62910P_0402_25V8K
@
1
2
JUSBP3
SUYIN_020173MR004S512ZL
VCC1D-2D+3GND4
GND15GND26
D23PSOT24C_SOT23
@
2 31
D24PSOT24C_SOT23
@
2 31
U26
TPS2061IDGN_MSOP8
GND1IN2
OC# 5OUT 6
OUT 8
IN3EN#4
OUT 7
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SUSON
SUSON
RUNON
VR_ON
SYSON#
SUSON
RUNON
SYSON#
SUSP
SUSP
SUSP
SUSP#
SUSP
RUNON
SUSON
VR_ON<32,45>
SYSON<32,42>
SUSP#<16,24,32,33,42>
SUSP<16,43,44>
+12VALW
+3V+3VALW
+5VS
+12VALW
+5VALW
+3VALW +3VS
+5VALW
+3VALW +CPU_CORE
+2.5VS+2.5V
+12VALW
+5VALW+5V
+12VALW+12VALW
+12V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
Custom
37 52Friday, March 11, 2005
2005/03/01 2006/03/01
+2.5V to +2.5VS Transfer
+3VALW to +3V Transfer
+5VALW to +5VS Transfer
+3VALW to +3VS Transfer
R452100K_0402_5%
12
G
D
S
Q342N7002_SOT23
21
3
C22022U_1206_10V4Z
R407470_0402_5%
G
D
S
Q442N7002_SOT23
2
13
G
D
S
Q11
2N7002_SOT232
13
R371100K_0402_5%
@
G
D
S
Q122N7002_SOT23
2
13
Q38
AO4422_SO8
S 1S 2S 3G 4
D8D7D6D5
R373330_0603_5%@
C49610U_1206_10V4Z
C27222U_1206_10V4Z
1
2
R62047K_0402_5%
12
R291100K_0402_5%
12
Q7
AO4422_SO8
S 1S 2S 3G 4
D8D7D6D5
C49410U_1206_10V4Z
G
D
S
Q9
2N7002_SOT232
13
R6211M_0402_5%
12
C713
0.1U_0402_16V
4Z
@1
2
C22310U_1206_10V4Z
C44922U_1206_10V4Z
C2640.1U_0402_16V7K
C22122U_1206_10V4Z
C2600.01U_0402_16V7K
C3870.1U_0402_16V4Z
1
2
C3900.1U_0402_16V4Z
1
2
C22222U_1206_10V4Z
C663
10U_1206_10V4Z
C1530.1U_0402_16V7K
G
D
S
Q312N7002_SOT23@
2
13
C714
0.1U_0402_16V
4Z
@1
2
C712
0.1U_0402_16V
4Z
@1
2R290470_0402_5%
R224470_0402_5%
R61810K_0402_1%
12
G
D
S
Q432N7002_SOT23
2
13
Q8
AO4422_SO8
S 1S 2S 3G 4
D8D7D6D5
Q13
AO4422_SO8
S 1S 2S 3G 4
D8D7D6D5
C4480.1U_0402_16V7K
R2891M_0402_5%
D
SG
Q37NDS352AP P-CHANNEL_SOT23
2
13
C1510.1U_0402_16V7K
C27310U_1206_10V4Z
C15222U_1206_10V4Z
G
D S
Q35AO3400_SOT23
2
1 3
C5500.01U_0402_16V7K
1
2
C662
10U_1206_10V4Z
R45351K_0402_5%
R61947K_0402_5%
12
G
D
S
Q302N7002_SOT23@
2
13
D18SM05_SOT23
@
2 31
C15810U_1206_10V4Z
C715
0.1U_0402_16V
4Z
@1
2
C2250.1U_0402_16V4Z
G
D
S
Q422N7002_SOT23
2
13
C4064.7U_1206_16V6K
1
2G
D
SQ362N7002_SOT23
2
13
C27
410
U_1
206_
10V
4Z
C49510U_1206_10V4Z
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RESET#
SCL
SDA
LDO1_VOUT
LDO1_FB
LDO2_VOUT
LDO2_FB
VIN_FAN2
VIN_FAN2
VIN_FAN1
FAN1_GATE
FAN2_GATE
RESET#
LDO1_FBLDO1_VOUT
LDO2_FB
FAN2_GATE
SCL
LDO2_VOUT
SDA
LDO1EN
VIN_LDO1
FAN1_GATE
COMPAL_INT# <32>
CLK_14M_COMPAL<29>SMB_EC_CK1<32,33,39>SMB_EC_DA1<32,33,39>
FAN1SPDC<34>
FAN1_VOUTC<34>
+5VS
+5VS
+5VS
+5VS
+5VS
+5VS
+5VS
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2362 1
<Title>
C
38 52Friday, March 11, 2005
2005/03/01 2006/03/01
C64222U_1206_10V4Z
@
1
2
R76610K_0402_1%
@
12
R76810K_0402_1%
@
12
C645
0.1U_0402_16V4Z
@
1
2
LDO1EN2 PAD
@
LDO2
LDO1
FAN
charge pump
U39
@
LDO1_VOUTA 3LDO1_VOUTB 4
LDO2_VOUTA 10LDO2_VOUTB 9
GPIO1 15GPIO2 16GPIO3 17
VC
C2/
5V18
VSS2(GND) 19
GPIO4 20
GPIO6 22
FAN1_VOUTB23 FAN1_VOUTA24
FAN2_OUTA37FAN2_OUTB38
FAN1_GATE27
FAN2_GATE34
LDO1_VINA1
LDO1_EN2
LDO1_FB5
LDVO2_VINA12LDVO2_VINB13LDO2_FB8
LDO2_EN11
FAN1_VINB25 FAN1_VINA26
FAN2_VINA35FAN2_VINB36
CP_EN 28CP_OUT 29
VSS2(GND) 31
VSS1/AGND 7
GPIO0 14
AV
CC
1/5V
6
VC
C2/
5V32
VC
C2/
5V42
CPP 30
GPIO5 21
CPN 33
CLK14M39SCL40SDA41 VSS2(GND) 43
INT# 44RESET#45
LDO1_VINB48
FAN1_TACHFB/GPIO846
FAN2_TACHFB/GPIO947
R767100K_0402_5%
@
12
C643
0.1U_0402_16V4Z
@
1 2
R764100K_0402_5%
@
12
CP_EN1PAD
@
VOUT_LDO2PAD
@
FAN2_VOUT1 PAD@
C638
1U_0603_10V4Z
@
1
2
C6361U_0603_10V4Z
@
1
2
R7734.7K_0402_5%
@
1 2
LDO1EN1 PAD@
CP_OUTPAD
@
R7704.7K_0402_5%
@
12
R76510K_0402_1%
@
12
R76910K_0402_1%
@
12
LDO2EN1 PAD@
C6391U_0603_10V4Z
@
1
2
C63722U_1206_10V4Z
@
1
2
C644
0.1U_0402_16V4Z
@
1
2
C64022U_1206_10V4Z
@
1
2
R7714.7K_0402_5%
@
1 2
C641 22U_1206_10V4Z@12
R7724.7K_0402_5%
@
1 2
VIN_LDO1 PAD
@
VOUT_LDO1PAD
@
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
BATT
+
BATT_TEMP
BATT++P1
PACIN
PRG
++
VIN+
BATT_TEMP <32>
SMB_EC_CK1 <32,33,38>
SMB_EC_DA1 <32,33,38>
ACON<40>
MAINPWRON20,41,44>
PACIN <40>
P1VIN
BATT++BATT+
+3VALWP
B+
VL
+5VALWP
VS
VL
B+VIN
Title
Size Document Number Rev
Date: Sheet of
LA-2362 1
DCIN & DETECTOR & Precharge
39 52Friday, March 11, 2005
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTYOF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT ASAUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NORTHE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
INC.
SECRET INFORMATION. THIS SHEET MAY NOT BETRANSFERRED FROM THE
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
SMARTBattery:1.BAT+2.ID3.B/I4.TS5.SMD6.SMC7.GND
PJPB1 battery connector
B
Precharge detector Min. typ. Max.
H-->L 14.589V 14.84V 15.243V L-->H 15.562V 15.97V 16.388V
ACIN
Precharge detector Min. typ. Max.
H-->L 6.138V 6.214V 6.359V L-->H 7.196V 7.349V 7.505V
BATT ONLY
PL1FBM-L18-453215-900LMA90T_1812
1 2
PD30
RLZ24B_LL34
12
PC4
560P
_040
2_50
V7K
12
PC101000P_0402_50V7K
12
PR22100_0402_5%
1 2
PL2HCB4532K-800T90_1812
1 21
2GG 3
PJPD1
SINGA_2DC-S756B200
PC12
1000
P_04
02_5
0V7K
12
PC70.01U_0402_25V7Z
12
PC81000P_0402_50V7K
12
PR25100_0402_5%
1 2
PC1
560P
_040
2_50
V7K
12
PJP1
SUYIN_200275MR007G113ZL
BATT+ 1ID 2B/I 3TS 4
SMD 5SMC 6GND 7G8 G9
PQ2DTC115EUA_SC70 2
13
PR16100K_0402_1%
12
PR101.5K_1206_5%
1 2
PD11N4148_SOD80
12
PR18
1K_0402_5%
12
PR142.2M_0402_5% 12
PR121.5K_1206_5%
1 2
PR2447K_0402_5%
12
PR17499K_0402_1%
12
PR510_1206_5%
12
PR2666.5K_0402_1%
12
PR151K_0402_5%
1 2
PC110.1U_0603_25V7K
12
PC3
12P_
0402
_50V
8J
12
PR2334K_0402_1%
12
PR19
191K_0402_1%
12
PD2
RB715F_SOT323
2
31
PC2
12P_
0402
_50V
8J
1
2
G
D
S
PQ1RHU002N06_SOT323
2
13
PU1ALM393M_SO8
+ 3
- 2O1
P8
G4
PR111.5K_1206_5%
1 2
PR131.5K_1206_5%
1 2
PR2125.5K_0402_1%
1 2
PR20499K_0402_1%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
ACOFF#
BATT+
ACOFF#
PACIN
PACIN
ACIN
ACON
BATT_OVP<32>
PACIN<39>
ACOFF<32>
FSTCHG<32>
IREF<32>
ACIN <21,32,41>
ACON<39>
P2
BATT+
VS
VIN
BATT+
1908LDO
MAX1908-CCS
B+
1908LDO
P3
VIN
1908LDO
VIN
VIN
VS
+2.5V
+SDREF
Title
Size Document Number Rev
Date: Sheet of
LA-2362 1
Charger
B
40 52Friday, March 11, 2005
Compal Electronics, Inc.
Charger
Charge voltage
4S CC-CV MODE : 16.8V2P4S:4300mAH/cell
BATT-OVP=0.111*BATT+
LI-3S :17.8V----BATT-OVP=1.9758V
0.7C=3.0A
Iadp=0~3A(65W)
PROPRIETARY NOTETHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
OVP voltage :
PR
167
100K
_040
2_1%
1
2
PR16047K_0402_5%
1 2
PR181300K_0603_0.1%
12
PR180150K_0402_1%
12
PR193100K_0402_5%
12
PR16110K_0402_5%
12
PC1450.1U_0603_25V7K
12
PC
156
0.01
U_0
402_
25V
7Z
12
PR1630_0402_5%
12
PR17033_1206_5%
12
PR190
0_0402_5%@
12
PR164150K_0402_1%
12
PC1440.1U_0402_16V7K
12
PR1 0_0402_5%
1 2
PC1511U_0603_10V6K
12
PR168
0_0402_5%
12
PR172
10K_0402_5%
12
PC1550.1U_0402_16V7K
12
PC
141
0.1U
_060
3_25
V7K
12
+
PC
1422
0U_2
5V_M
1
2
PR175
158K_0603_1%@
12
PR17122K_0402_5%
1 2
PC1421U_0603_10V6K
12
PU14ALM358A_SO8
+ 3
- 201P
8G
4
PD25
1SS355_SOD323
12
PR18415K_0402_1%
12
PR
158
47K
_040
2_5%
12
PR410K_0402_5%
1 2
PD271SS355_SOD323
12
PR194681K_0603_1%
1 2
47K
47K
PQ34DTA144EUA_SC70
21
3
PQ40DTC115EUA_SC70
2
13
PQ32AO4407_SO8
3 65
78
2
4
1
PR1770_0402_5% 1 2
PC
139
4.7U
_120
6_25
V6K
12
G
D
S
PQ37RHU002N06_SOT323
2
13
PR162150K_0402_5%
12
PR19110K_0402_1%
12
PC
153
1000
P_0
402_
50V
7K
12
PR
178
10K
_040
2_5%
1
2
PC
152
1000
P_0
402_
50V
7K
12
PD32RLZ22B_LL34@
12
PU14BLM358A_SO8
+ 5
- 607
PD241SS355_SOD323@
12
PD261SS355_SOD323
1 2PC1430.1U_0603_25V7K
12
PC1570.01U_0402_25V7Z
12
PC
146
4.7U
_120
6_25
V6K
12
PC
159
0.1U
_060
3_25
V7K
@
12
PR157
0.01_2512_1%
2
3
1
4
PC
158
0.1U
_060
3_25
V7K
@
12
PR1650.015_2512_1% 1 2
PU13MAX1908ETI_QFN28
CC
I6
VCTL15ICTL13
CLS3
REF4
CELLS17
REFIN12
ACIN10
ACOK#11SHDN#8
IINP28
DCIN1
CC
S5
CCV7
ICHG9
BATT 16
CSSP 27
PG
ND
20
DLOV 22
CSSN 26
LDO 2
BST 24
DHI 25
DLO 21
CSIP 19
LX 23
CSIN 18
GN
D14
PC
148
4.7U
_120
6_25
V6K
12
PC181000P_0402_50V7K
12
PR18220K_0402_1%
12
PR
174
1K_0
402_
1%
12
PC
140
4.7U
_120
6_25
V6K
12
PC1490.01U_0402_16V7K
12
10K
10K
PQ36DTC114EKA_SC59
2
13
PQ31AO4407_SO8
365
78
2
4
1
PD31RLZ4.3B_LL34
12
AO4912_SO8
PQ38
D2 2G28
G1 3D1/S2/K5
D2 1D1/S2/K7
S1/A 4D1/S2/K6
PR19210K_0402_1%
12
PC1501U_0805_25V4Z
12
PR
159
200K
_040
2_1%
12
PQ33AO4407_SO8
3 65
78
2
4
1
G
D
S
PQ39
RHU002N06_SOT323
2
13
PR183143K_0402_1%
12
PC
138
4.7U
_120
6_25
V6K
12
PR1690_0402_5%
12
PC1540.1U_0402_16V7K
12
PR179845K_0603_1%
12
PL16HCB4532K-800T90_1812
1 2
PC
147
4.7U
_120
6_25
V6K
12
PR1669.31K_0402_1%
12PL17
16UH_D104C-919AS-160M_3.7A_20%
1 2
PD281SS355_SOD323
1 2
PR173100K_0402_1%
12
PQ35DTC115EUA_SC70
2
13
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
LX5
DH
3
BST51BST31
BST5DH5
LX3
DL3
DL5
FLYBACKSNB
ACIN
ACIN<21,32,40>
MAINPWRON <20,39,44>
VS
B+++
B+++
VS
2.5VREF
B+
+3VALWP
+5VALWP
VL+12VALWP
Title
Size Document Number Rev
Date: Sheet of
LA-2362
3.3V / 5V / 12V
41 52Friday, March 11, 2005
Compal Electronics, Inc.
+3.3V/+5V/+12V
B 0.1DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+3VALWP Choke DCR = 26.5mΩ.Current limit Threshold Min.=80 mV Mx.=120mV.
OCP Min.= 80mV/1.27K*(1.27K+1.27K)/26.6=6.038AOCP Max.=120mV/1.27K*(1.27K+1.27K)/26.5=9.056A
RS2(PR64)=RS1(PR58)*RS3(PR61)/(RS1+RS3)L/RL(DCR)=RS1*RS3(PR61)/(RS1+RS3)*Cs(PC56)
+5VALWP Choke DCR = 40mΩ.Current limit Threshold Min.=80 mV Mx.=120mV.
OCP Min.= 80mV/0.698K*(1.54K+0.698K)/40=6.412AOCP Max.=120mV/0.698K*(0.698K+1.54K)/40=9.593A
PR
101
3.57
K_0
402_
1%
12
PR9810K_0402_5%
1 2
PD
17S
KU
L30-
02A
T_S
MA
21
PC8147P_0402_50V8J
12
+
PC85
150U
_D2_
6.3V
M_R
45
1
2
PC754.7U_0805_6.3V6K
12
AO4912_SO8
PQ17
D22 G2 8
G13D1/S2/K 5
D21D1/S2/K 7
S1/A4 D1/S2/K 6
PD29EC11FS2_SOD106
12
PC161470P_0805_100V7K@1
2
PR18622_1206_5%@
12
PR931.27K_0402_1%
12
PR910_0402_5%
12
PD14DAP202U_SOT323
1
2 3
PC780.1U_0603_25V7K
12
PC84100P_0402_50V8J
12
PL8
FBM-L18-453215-900LMA90T_1812 1
2
PR890_0402_5%
12
PR961.54K_0402_1%
12
PD18SKS10-04AT_TSMA 2
1
PC
7322
00P
_040
2_50
V7K
@
12
PC89100P_0402_50V8J
12
PC861000P_0402_50V7K
12
PR233_1206_5%
12
PR100300K_0402_5%@
12
PD151SS355_SOD323 1
2
PR
103
10.2
K_0
402_
1%
12
PR97619_0402_1%
1 2
PC902.2U_0805_10V6K
12
PR952M_0402_1%
12
PC720.1U_0603_25V7K
1 2
PC744.7U_1206_25V6K
12
PC83
0.47U_0603_16V7K
12
PC874.7U_0805_6.3V6K
12
PL1010UH_D104C-919AS-100M_4.5A_20%
12
PR
104
10K
_040
2_1%
1
2
PC1624.7U_1206_25V6K
12
PC911U_0805_25V4Z@
12
PU6
MAX1902EAI_SSOP28
LX326DL324
BST325
DH327
CSH31CSL32FB33SKIP#10
GN
D8
12OUT 4VDD 5
BST5 18DH5 16LX5 17DL5 19
PGND 20CSH5 14CSL5 13
FB5 12SEQ 15REF 9
SYNC 6RST# 11SHDN#23
TIME/ON57
RUN/ON328V
L21
V+
22
PC16010U_1210_25V6M
1 2
+
PC88150U_D2_6.3VM_R45
1
2
PR1020_0402_5%
12
PC7947P_0402_50V8J
12
PR10610K_0402_1%
12
PC710.1U_0603_25V7K
1 2
AO4912_SO8
PQ18
D2 2G28
G1 3D1/S2/K5
D2 1D1/S2/K7
S1/A 4D1/S2/K6
PR
941M
_040
2_1%
1
2
PC82
0.47U_0603_16V7K
12
PR
187
2.7K
_120
6_5%
@
12
PC
7622
00P
_040
2_50
V7K
@
12
PL9
10uH_SDT-1205P-100-118_5A_20%
14
32
PR1050_0402_5%
12
PR99698_0402_1%
12
G
D
SPQ41
RHU002N06_SOT323@
2
13
PR921.27K_0402_1%
1 2
PC
774.
7U_1
206_
25V
6K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LX2.5
DH2.5
DL2.5
BST2.5B
BST2.5A
SYSON <32,37>
SUSP#<16,24,32,33,37>
+VCCP_PWRGD <32>
+5VALW
+2.5VP
MAX8743_B+
B+
+VCCPP
+3VALWP
SUSP#
Title
Size Document Number Rev
Date: Sheet of
LA-2362 1
+2.5VP & +VCCPP
COMPAL ELECTRONICS, INC
42 52Friday, March 11, 2005
BMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Vin=19V,Vo=2.5V,Io=4.5A,Fs=255KHZ,L=4.7UHMosfet Rds(on) tpy.=19.7mΩ Max=24mΩ,Delta I =1.8115AIimit=ILIM(V)/10/Rds(on)+1/2 delta I
+2.5VP = 5.6765A ~ 8.614A
Iimit Min=1.98V*100K/(100K+33K)/10/31.2mΩ+0.905=5.6765AIimit Max=2.02V*100K/(100K+33K)/10/19.7mΩ+0.905=8.614A
Vin=19V,Vo=2.5V,Io=4.5A,Fs=345KHZ,L=4.7UHMosfet Rds(on) tpy.=19.7mΩ Max=24mΩ,Delta I =0.6118AIimit=ILIM(V)/10/Rds(on)+1/2 delta I
+VCCPP = 5.824A ~ 9.821A
Iimit Min=1.98V*100K/(100K+15K)/10/31.2mΩ+0.3059=5.824AIimit Max=2.02V*100K/(100K+15K)/10/19.7mΩ+0.3059=9.821A
PC
394.
7U_0
805_
6.3V
6K
12
PR6910K_0402_5%
12
PC61U_0805_50V4Z @1
2P
C42
4.7U
_120
6_25
V6K
12
PC50.1U_0603_25V7K@ 1
2
+
PC
4815
0U_D
2_6.
3VM
_R45
1
2
PR
6610
0K_0
402_
1%
12
PD7DAP202U_SOT323
1
23
PR61499_0402_1%
12
PL64.7UH_D104C-919AS_4R7N_5.2A_20%
1 2
PR5320_0603_5%
1 2
PC
410.
1U_0
603_
25V
7K
12
PR550_0402_5%
1 2
PL54.7UH_D104C-919AS_4R7N_5.2A_20%
1 2
PC
3422
00P
_040
2_50
V7K
@
12
PR59
15K_0402_1%
12
PC
364.
7U_1
206_
25V
6K
12
PC
4022
00P
_040
2_50
V7K
@
12
PR540_0402_5%
1 2
PC
350.
1U_0
603_
25V
7K1
2
PC470.1U_0603_25V7K
12
AO4912_SO8
PQ13
D2 2G28
G1 3D1/S2/K5
D2 1D1/S2/K7
S1/A 4D1/S2/K6
PC
434.
7U_1
206_
25V
6K
12
PC441U_0805_25V4Z
12
PC171000P_0402_50V7K@
12
PU4
MAX8743EEI_QSOP28
OUT2 15
BST2 19
FB2 14
CS2 16
VDD 21
UV
P9
SK
IP6
V+
4G
ND
23
ON111
DH126
LX127
ILIM2 13
DL124V
CC
22
PGOOD 7
FB12 ON2 12
ILIM1 3
OV
P8
RE
F10
LX2 17DL2 20
TON 5
CS128
BST125
DH2 18
OUT11
PL3FBM-L18-453215-900LMA90T_1812
1 2
PR6410K_0402_1%
12
+
PC
5015
0U_D
2_6.
3VM
_R45
1
2
PC460.1U_0603_25V7K
12
PD3RB751V_SOD323
1 2
PC380.1U_0603_25V7K
1
2
PR670_0402_5%
1 2
PC540.01U_0402_25V8K @
12
PC
514.
7U_0
805_
6.3V
6K
@
12
AO4912_SO8
PQ12
D22 G2 8
G13D1/S2/K 5
D21D1/S2/K 7
S1/A4 D1/S2/K 6
PC
494.
7U_0
805_
6.3V
6K
@
12
PR680_0402_5%
12
PR5833K_0402_1%
12
PC450.22U_0603_10V7K
12
PR
6510
0K_0
402_
1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SUSP<16,37,44>
+3VALW
+1.25VSP
+2.5VP
+12VALW+12VALWP
+1.5VS
+VCCPP +VCCP
+1.5VSP
+5VALW
+1.25VSP
+2.5VP
+1.25VS
+5VALWP
+2.5V
+3VALWP +3VALW
Title
Size Document Number Rev
Date: Sheet of
LA-2362 1
+1.25VSP
43 52Friday, March 11, 2005
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DB
G
D
S
PQ20RHU002N06_SOT323
2
13
PR1090_0402_5%
1 2
PJP43MM
21
PJP32MM
21
PJP23MM
21
PR1071K_0402_1%
12
PC994.7U_0805_6.3V6K
12
PR1081K_0402_1%
12
PC970.1U_0603_25V7K
12
PU9
APL5331KAC-TR_SO8
VOUT4
NC 5GND2
VREF3
VIN1 VCNTL 6
NC 7
NC 8
TP 9
PJP83MM
21
PC9310U_1206_6.3V7K
12
PC921U_0603_16V6K
12
PJP63MM
21
PJP103MM
21
PJP73MM
21
+PC98
150U_D2_6.3VM @
1
2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
TM_REF1
CHGRTCP
MAINPWRON <20,39,41>
51ON#<33>
SUSP<16,37,43>
VL
VS
VL
VL
VIN
RTCVREF
VS
CHGRTC
BATT+
+1.5VSP
+5VALW
Title
Size Document Number Rev
Date: Sheet of
LA-2362 1
RTC Battery & OTP & +1.5VP
B
44 52Friday, March 11, 2005
Compal Electronics, Inc.THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTYOF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT ASAUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NORTHE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
INC.
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
Recovery at 44(45) degree CCPU thermal protection at 80 degree CPH2 under CPU botten side :
Ipeak=Iocset*Rocset/RDS(ON)high sideIocset=40uA, Pocset=4.12K RDS(on)=25.5mΩIpeak min=40uA*4.12/(25.5*1.3)=4.97AIpeak max=40uA*4.12/25.5=6.46A
PC56
1U_0
805_
16V7
K
12
PC600.1U_0402_16V7K
12
PU1B
LM393M_SO8
+5
-6 O 7
P8
G4
PR85300_0402_5%
1 2
PR7147K_0402_1%
12
PR75150K_0402_1%
12
G
D
SPQ42
RHU002N06_SOT323
2
13
PC57
1000P_0402_50V7K
12
PQ16TP0610K_SOT23
2
13
PR8322K_0402_5%
1 2
SI4814DY_SO8
PQ15
D1 2G18
G2 3S1/D25
D1 1S1/D27
S2 4S1/D26
PC610.1U_0402_16V7K
12
PC630.1U_0603_25V7K
12
PH1
10KB
_060
3_1%
_TH
11-3
H10
3FT
12
PC650.22U_1206_25V7K
12
PC550.1U_0603_25V7K
12
PR7247K_0402_1%
1 2
PC59470P_0402_50V7K
12
PU8
APW7057KC-TR_SOP8
BOOT 1
LGATE 4
UGATE 2
FB6
PHASE 8
GND3
OCSET7
VC
C5
PR774.12K_0402_1%
12
PD91N4148_SOD80
12
PR8410K_0402_1%
12
PR7933_1206_5%
12
PD10
RB751V_SOD323
12
PD121SS355_SOD323
12
PR828.87K_0603_1%
12
PR86300_0402_5%
1 2
PR76150K_0402_1%
12
PR742.15K_0402_1%
12
+ PC62150U_D2_6.3VM_R45
1
2
PR782.2_0402_5%
12
PR80200_0805_5%
12
PL74.7UH_D104C-919AS_4R7N_5.2A_20%
1 2
PR81100K_0402_5%
12
PC684.7U_0805_6.3V6K
12
PC671U_0805_25V4Z
12
PC66
0.1U_0402_16V7K
12
PC584.7U_0805_6.3V6K
12
PU7G920AT24U_SOT89
IN2
GND
1
OUT 3
PR1890_0402_5%
12
PR7316.9K_0402_1%
1 2
PC64
4.7U
_080
5_6.
3V6K
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCC
OAIN+
OAIN-
FB
FB
VCC
OAIN+
OAIN+
VID0<6>
VID4<6>
VID3<6>
VID1<6>
VID5<6>
VID2<6>
VGATE<8,18,21>
VR_ON <32,37>
PM_DPRSLPVR<21>
PSI#<6>
H_STP_CPU#<18,21>
+3V
+5VSCPU_B+
B+
CPU_B+
+5VS
+CPU_CORE
+5VS
Title
Size Document Number Rev
Date: Sheet of
LA-2362 1
+CPU_CORE
45 52Friday, March 11, 2005
Compal Electronics, Inc.
CPU VCC SENSE
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DB
Vin=19V,Vo=1.484V,Io=12.5A,Fs=300KHZ,L=0.56UHCurrent sense tpy.=1mΩ Max=1.1mΩ,Delta I =8.12AIimit=ILIM(V)/20/DCR+1/2 delta IIimit Min=1.99V*78.7K/(78.7K+470K)/20/1.01mΩ+4.22A*2=36.69AIimit Max=2.01V*78.7K/(78.7K+470K)/20/0.99mΩ+4.22A*2=37.56A
PR14
7
10.7
K_04
02_1
%
12
PR13
73K
_060
3_1%
12
PR142470K_0402_5%
1 2
+
PC11
868
U_2
5V_M
@
1
2
PL150.56UH_ETQP4LR56WFC_21A_20%
1 2
C
BE PQ30
HMBT2222A_SOT23
1
2
3
PC13
44.
7U_1
206_
25V6
K
12
PR13
549
9_04
02_1
% 12
PC11
60.
01U
_040
2_25
V7Z
12
PU12
MAX1532AETL_TQFN40<BOM Structure>
TIME1
TON2
SUS3
S04
S15
SHDN#6
OFS7
REF8
ILIM9
VCC10
GND11
CCV12
GNDS 13
CCI 14
FB 15
OAIN- 16
OAIN+ 17
SKIP18
D519
D420
D321
D222
D123
D024
VROK25
BSTM 26
LXM 27
DHM 28
DLM 29
VDD 30
PGND 31
DLS 32
DHS 33
LXS 34
BSTS 35
V+ 36
CMP 37
CMN 38
CSN 39
CSP 40
PR126 0_0402_5%
12
PD20EP10QY03
2 1
PC1211U_0603_16V6K
12
PR7 0_0402_5%
12
EC31
QS0
4PD
23
@
12
G
D
S
PQ29
RHU002N06_SOT323
2
13
PR131 0_0402_5%
12
PC13
222
00P_
0402
_50V
7K
12
PR13
210
0K_0
402_
1%@
12
EC31
QS0
4PD
21
@
12
PC11
54.
7U_1
206_
25V6
K
12
PR1433K_0603_1%
1 2
PR156909_0402_1%
1 2
PR1490_0402_5%
1 2
PC1360.22U_0603_16V7K
12
PC130100P_0402_50V8J
12
PC1370.47U_0603_16V7K
1 2
PC12
510
00P_
0402
_50V
7K
@
12
PR141 909_0402_1%
1 2
PR125 2_0402_5%
1 2PL14
0.56UH_ETQP4LR56WFC_21A_20%
1 2
PR12
2
33K_
0402
_5%
1
2
PL13FBM-L18-453215-900LMA90T_1812
1 2
PR15120K_0402_1%
1 2
PR140 30.1K_0402_1%
12
G
D
S
PQ26
RH
U00
2N06
_SO
T323
2
13
PC13127P_0402_50V8J
12
PR6 0_0402_5%
12 PR34.7K_1206_5%
12
PC16680P_0603_50V7K
12
PQ27AO4408_SO8
365 7 8
2
4
1
PR133 0_0402_5%
1 2
PR1380_0402_5%
1 2
PC124
0.47U_0603_16V7K
1 2
PR124 0_0402_5%
12
PQ24AO4410_SO8
365 7 8
2
4
1
PR145 100K_0402_1%
1 2
PR14
8
2_04
02_5
%
12
PC1172200P_0402_50V7K
12
PC1280.22U_0603_16V7K
1 2
PR13
649
9_04
02_1
%
12
PC13
34.
7U_1
206_
25V6
K
12
PR128 0_0402_5%
12
PC9
1U_0
805_
50V4
Z
@
12
PQ28AO4410_SO8
365 7 8
2
4
1
PC126270P_0402_50V7K
1 2
PR129
0.001_2512_5%
1 2
PR12
110
_040
2_5%
12
PC15
680P
_060
3_50
V7K
12
PC1220.01U_0402_25V7Z
12
PR13
490
9_04
02_1
%
12
PR8
4.7K
_120
6_5%
12
PR154100K_0402_1%
12
PR123 0_0402_5%
12
PR15310K_0402_1%
12
PC13
50.
01U
_040
2_25
V7Z
12
PR14478.7K_0603_1%
1 2
PC201000P_0402_50V7K
12
PC11
44.
7U_1
206_
25V6
K
12
PR139100K_0402_5%@
1 2
PC191000P_0402_50V7K
12
G
D
SPQ25
RHU002N06_SOT323
2
13
PC13
0.1U
_060
3_25
V7K
@
12
PC1202.2U_0603_6.3V6K
12
PC1290.022U_0402_16V7K
1 2
PC1230.22U_0603_16V7K
12
PR1460_0402_5%
1 2
PR15
590
9_04
02_1
%
12
PC127470P_0402_50V7K
1 2
PR130 0_0402_5%
12
PQ23AO4408_SO8
365 7 8
2
4
1
PD22EP10QY03
21
PR150100K_0402_1% @
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-2362 1
PIR
46 52Friday, March 11, 2005
Compal Electronics, Inc.
1 DVT0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Version change list (P.I.R. List) Page 1 of 2
Reason for change Rev. PG# Modify List B.Ver# PhaseFixed IssueItem
ICH_PME# pull up +3VALW add R 10K
LID_SW# pull up +3VALW add R 10K2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
SB +1.5V regulator footprint error
SB +1.5V regulator footprint error U8 need to reverse
R76 take off
PR191 power plane 2.5vref change to +2.5V
R398 remove to R401
H_DPRSLP# add pull up to +vccp power plane POP R546
POP U9 for lose and foot print error
U3 pin6 & pin 7 need to swap
Add R476/7 40.2 Ohm for memory
R259 short
PR122 chang power plane to +3V for EC voltage leakage
Add R224/R290/R407 470ohm and Q34/9/11 2N7002
ADD R 39K//220p to GND at R518 for modify SIRQ
Reverse the JHP1 & JMIC1 Symble error
21
22
Modify NB FSB speed select for Dothan
Modify ACIN for SB
CardReader pin swap for flash memory
Reverse the JHP1 & JMIC1 Symbl
DVT0.2
DVT0.2
DVT0.2
DVT0.2
DVT0.2
DVT0.2
DVT0.2
DVT0.2
DVT0.2
DVT0.2
DVT0.2
DVT0.2
DVT-20.1
DVT-20.1
DVT-20.1
DVT-20.1
DVT-20.1
0.1 DVT-2
0.1 DVT-2
Add VCCP noise cap. at CPU C664/5/6/7/8/9 C670/1/2 0.2 DVT-3
0.2Change R362/3 2.2K to 10K for Panel select DVT-3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-2362 1
PIR
47 52Friday, March 11, 2005
Compal Electronics, Inc.
DVT-30.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Version change list (P.I.R. List) Page 2 of 2
Reason for change Rev. PG# Modify List B.Ver# PhaseFixed IssueItemAdd C674/5/6/7/8 C680/1/2/3/4/5 C686/7/8/9 C690/1/2/3/4/5/6/7/8/9 C702/3 for NB VCCPnoise cap.ADD C646/7/8/9 C650/1/2/3/4/5 for DDR RAM1.25V noise cap24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
ADD C704/5 for JVGAP1 2.5V for noise
Change R17/8/9 from 75 to 150 OHM for TV-out signal
ADD R774/5 for cost down U29 partsChange SB(U5) sus power from V plane to Always power plane andR457 R69 R456 R455 R456 R451 U7.T2 +1.5VR
R154 remove for FIR function
ADD C656/7 C659/8 for +5VS HDD CDROM powernoiseU9 replace the new package to RM8 and remove to TOP
ADD C706/7/8/9/10/11 for SB 1.5Vrun noise
R129 change to +5VALW
Q3 cahnge to AO3400 for current rating not enough
JMPCI1 P.24 change to +3V for wireless power
Remove KB910 & 39VF080 ROM
R705 change to 13K for MB ID
Change the Killer switch circuit for EC detect methodthen light on the LED
43
44
Move U32 to near NB
ADD 5VALW noise cap. C714/5/2/3,
0.2 DVT-3
0.2 DVT-3
0.2 DVT-3
0.2 DVT-3
0.2 DVT-3
0.2 DVT-3
0.2 DVT-3
0.2 DVT-3
0.2 DVT-3
0.2 DVT-3
0.2 DVT-3
0.2 DVT-3
0.2 DVT-3
0.2 DVT-3
0.2 DVT-3
0.2 DVT-3
0.2 DVT-3
23
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
LA-2362 1
PIR
48 52Friday, March 11, 2005
Compal Electronics, Inc.
Version change list (P.I.R. List) Page 1 of 2
Reason for change Rev. PG# Modify List B.Ver# PhaseFixed IssueItem
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1
1.Delete the PU5 IC LM393M (SM).
2.Delete PD1 S DIO 1N4148 (SM). DVT0.20.2 38Delete the charge circuit.
1.Delete PQ14 S TR DTC115EUA NPN (UMT3).
Delete the charge circuit.3.Delete PR10,PR11,PR12,PR13 S RES 1/4W 1.5K +-5% 1206.
Change the CPU OTP circuit from active H
to active L. to active L.
Change the CPU OTP circuit from active H
2..Delete PD8 S DIO 1SS355.
3.Change PR75 and PR76 from S RES 1/16W 100K +-1% 0402 to
0.2
0.2
0.2 40
DVT
DVT
DVT
0.2
0.2
0.2
S RES 1/16W 150K +-1% 0402.
4.Change PR73 from S RES 1/16W 15K +-1% 0402 to S RES
1/16W 16.9K +-1% 0402.
5.Change PC56 from S CER CAP .22U 16V K X7R 0603 to
S CER CAP 1U 16V K X7R 0805
6.Change PR74 from S RES 1/16W 3.4K +-1% 0402 to S
S RES 1/16W 2.15K +-1% 0402.
43
43For cost down solution.
To prevent the KB-910 damag.
1.Delete the PD33 S ZEN DIO RLZ4.3B (LL-34).
3 To cost down for +1.5VP.
To cost down for RTC charge circuit..
1.Change the PD12 from DIO 1N4148 (SM) to DIO 1SS355.
4 0.2For cost down solution.
5 To prevent the KB-910 damag.
43
DVT
DVT0.2
SCH DIO SKUL30-02AT THIN SMA.
1.Change the PD17 from SCH DIO SKS10-04AT TSMA to
To cost down for snubber circuit.
1.Delete PR127 and PR152 S RES 1/16W 0 +-5% 0402.
To cost down for +1.5VP for +12VALWP circuit. 1.Delete PR187 S RES 1/8W 2.7K +-5% 1206 S7.
1.Delete PR62 S RES 1/16W 0 +-5% 0402.
6
7
8
For cost down solution.
For cost down solution.
For cost down solution.
For cost down solution.
0.2
0.2
0.2
0.2 DVT40
To cost down for DDR 2.5V. 41
44To cost down for CPU_CORE. 0.2
0.2 DVT
0.2 40 0.2 DVT9
100.2 0.2 DVT
1.Deete PR127 and PR152 S RES 1/16W 0 +-5% 0402.
2.Delete the PC161 S CER CAP 470P 100V K X7R 0805.
1.Delete PC41,PC158 and PC159 S CER CAP .1U 25V K X7R 0603.
2.Delete PC40,PC73 and PC76 CER CAP 2200P 50V K X7R 0402.To cost down for EMI capacitor.For cost down solution.
39
40
41
10
10
Don't has pull high resister on VGATE pin.
VCCPP output voltage has error. Adjustment resistor divider.
1.Add the S RES 1/16W 100K +-5% 0402.
1.Change the PR60 from S RES 1/16W 681 +-1% 0402 to
0.2
0.2
0.2
0.2DVT
DVT
S RES 1/16W 1.69K +-1% 0603.
Add pull high resister on VGATE pin. 44
41
Choke Rating not enough for +1.5VP. Choke Rating not enough for +1.5VP.1.Change PL7 from 4.7UH_FDV0630-4.7UH_5.5A_20%
0.2 0.2 DVT43
to 4.7UH_D104C-919AS_4R7N_5.2A_20%.
11.
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
LA-2362 1
PIR
49 52Friday, March 11, 2005
Compal Electronics, Inc.
Version change list (P.I.R. List) Page 2 of 4
Reason for change Rev. PG# Modify List B.Ver# PhaseFixed IssueItem
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1 DVT0.20.2 39
1.Add the PQ40 S TR DTC115EUA NPN (UMT3).
Change the Vin Detector from LM393 to
charger ACOK#.
2.Delete the PR3,PR4,PR8 and PR9 RES 1/16W 10K +-1% 0402.
0.2 DVT0.2
4.Delete PR6 the S RES 1/16W 22K +-1% 0402.
11.Delete PC6 from S CER CAP .1U 25V K X7R 0603.
7.Delete the PR7 S RES 1/16W 20K +-1% 0402.
S RES 1/16W 20K +-1% 0402.38,39
Don't has pull down resister on SHDN# 1.Add PR193 the S RES 1/16W 100K +-5% 0402.Add pull down resister on SHDN# pin.
pin for charger.
Change the Vin Detector from LM393 to
charger ACOK#.
3.Add the PR193,PR172 and PR173 RES 1/16W 100K +-5% 0402.
5.Delete PR1 the S RES 1/16W 1M +-1% 0402.
6.Change PR182 from S RES 1/16W 150K +-1% 0402 to S
8.Delete the PR2 S RES 1/16W 84.5K +-1% 0402.
9.Add the PR175 S RES 1/16W 158K +-1% 0402.
10.Add the PR175 S RES 1/16W 681K +-1% 0402.
12..Delete PC5 from S CER CAP 1000P 50V +-10% X7R 0402.
4
3 DVT0.20.2 39
1.Change PU10 from S IC G965-18P1U SOP-8L REG to S IC APW7057KC-TR SOP-8 PWM.
+1.8VSP power rating not enough.0.2 DVT0.2
4.Delete PQ43 the S TR AO4912 2N SO8 W/D
11.Add the PC163,PC165 and PC168 S CER CAP .1U 16V +-10% X7R 0402
7.Add PR198 the S RES 1/16W 10K +-1% 0402.42
For ACIN pin, 1.Add PR4 the 10K +-5% 0402ACIN pin don't have connect to system.
3.Add the PQ44 S TR RHU002N06 1N SOT323
5.Add PD33 the S DIO 1SS355.
6.Add PR195 the S RES 1/16W 2.2 +-5% 0402
8.Add PR196 the S RES 1/16W 4.12K +-1% 0402
9.Add the PC167 the S CER CAP 4.7U 10V Z Y5V 0805.
10.Add the PC164 S CER CAP 470P 50V +-10% X7R 0402.
12.Delete PC96 the S CER CAP 10U 6.3V K X7R 1206.
5 VCCP's transients cannot meet spec.
13.Add the PC166 S POLY CAP 150U 6.3V M V(D2) T520 LESR.
0.20.2 DVT
41
14.Add PL18 the S COIL 5.0UH +-20% TPRH6D38-5R0M-N 2.9A.
+1.8VSP power rating isnot enough.
2.Add PR197 S RES 1/16W 12.7K +-1% 0402.
VCCP's transients cannot meet spec.
1.Change PC50 from S POLY CAP 150U 6.3V M V(D2) T520 LESR to S POLY C 220U 4V M V(D2) T520 LESR.
1.Change the PR125 and PR148 from S RES 1/16W 0 +-5% 0402S to RES 1/16W 2 +-5% 0402.
2.Change PL6 from S COIL 4.7UH +-20% D104C-919AS-4R7M 5.2A to S COIL 1.8UH +-30% D104C-919AS-1R8N 9.5A.
DVT0.20.2 44For CPU_CORE's EMI,6 For CPU_CORE's EMI,
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
LA-2362 1
PIR
50 52Friday, March 11, 2005
Compal Electronics, Inc.
Version change list (P.I.R. List) Page 3 of 3
Reason for change Rev. PG# Modify List B.Ver# PhaseFixed IssueItem
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
CPU's transients cannot meet spec.1. Add one current sense on phase 2. 0.2 44
1.Delete PC124 and PC137 the S CER CAP 0.47U 16V +-10% X7R 0603.
2.Delete PR134,PR141,PR155 and PR156 the S RES 1/16W909+-1% 0402.
3.Add PR134 S RES 1W 0.01 +-1%2512.
0.2 DVT
To delay timer of 5VALWP.
2.
The 5VALWP rising time is faster than PACIN's.
40 0.3 DVT2
DVT0.2390.2
3.
PACIN pin's high level is only 2.3V. To adjust PACIN pin's level.
1.Delete PR175 the S RES 1/16W 158K+-1% 0402.
2.Change the PR172 from S RES 1/16W 100K +-1% 0402 S to RES 1/16W 10K +-1% 0402.
1.Change the PR105 from S RES 1/16W 47K +-1% 0402 S to RES 1/16W 100K +-1% 0402.
2.Change the PC91 from S CER CAP .047U 25V M X7R 0603 to CAP 1U 25V Z F Y5V 0805..
4. The charge has error on change mode. DVT2
DVT2
39 1.Change PC152 and PC153 from the S CER CAP 0.01U 16V +-10% X7R to CER CAP 0.001U 16V +-10% X7R.
For cost down solution.5.
To adjust input and output current regulation loop compensation.
For cost down solution. 1.Change PC58,PC68,PC95 and PC99 from the S CER CAP 4.7U 25V K X5R 1206 to CAP 4.7U 10V K X7R 0805.
42
43
6. The charger has EMI issue. Add a resistor on charger's boost for EMI. 39 1.Add the PR1 S RES 1/16W 0 +-5% 0402. DVT2
7.44 DVT2Change the current limit's from sense
DRC to resister.To adjust current limit point for CPU_CORE. 1.Change the PR142 from S RES 1/16W 200K +-5% 0402
to S RES 1/16W 470K +-5% 0402.
8.40
0.3
0.3
0.3
0.3
0.3
0.3
0.3
0.3
0.3
0.3
0.3 DVT21.Add PR2 S RES 1/8W 33 +-5% 1206.To preven in-rush current for B+ of MAX1902.
To preven in-rush current for B+ of MAX1902.
DVT20.39. The CPU's dual choke will shortage. Change to single choke.
1.Add PQ26 SB502060000 S TR RHU002N06 1N SOT323.
2.Add PR134,PR141,PR155,PR156 S RES 1/16W 909 +-1% 0402.
3.Delete PL14 S COIL .5UH +-30% CXZT1050-R50 28A.
4.Add the PL14,PL15 S COIL .56UH +-20% ETQP4LR56 WFC 21A.
5.Add the PC124,PC137 0.47U 16V +-10% X7R 0603 S8.
4.Add the PL14,PL15 S COIL .56UH +-20% ETQP4LR56 WFC 21A.
0.3
10. Delete the +1.8VSP on M/B. Delete the +1.8VSP on M/B.
44
0.3
0.3 DVT2
1.Delete the PU10 S IC APW7057KC-TR SOP-8 PWM.
2.Delete the PQ43 S TR AO4912 2N SO8 W/D.
3.Delete the PR188 S RES 1/16W 0 +-5% 0402.
4.Delete the PR195 S RES 1/16W 2.2 +-5% 0402
42
5.Delete the PR196 S RES 1/16W 4.12K +-1% 0402
6.Delete the PR198 S RES 1/16W 10K +-1% 0402
7.Delete the PR197 S RES 1/16W 12.7K +-1% 0402.
8.Delete the PL18 S COIL 5.0UH +-20% TPRH6D38-5R0M-N 2.9A.
9.Delete the PC166 S POLY CAP 150U 6.3V M V(D2) T520 LESR.
10.Change the PC75 and PC87 from S CER CAP 4.7U 10V Z Y5V 0805 to S CER CAP 4.7U 6.3V +-10% X5R 0805
11.Delete PC95 S CER CAP 4.7U 10V Z Y5V 0805.
12.Delete PC163,PC165,PC168 .1U 16V +-10% X7R 0402.
13.Delete PC164 S CER CAP 470P 50V +-10% X7R 0402.
14.Delete PD33 S DIO 1SS355.
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
LA-2362 1
PIR
51 52Friday, March 11, 2005
Compal Electronics, Inc.
Version change list (P.I.R. List) Page 4 of 4
Reason for change Rev. PG# Modify List B.Ver# PhaseFixed IssueItem
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Max1902 protect When power cord fast plug-out and plug-in. 1. Add the pre-chagre circuit.
38
2.Add PQ2 S TR DTC115EUA NPN (UMT3).
3.Add PD2 S SCH DIO RB715F UMD3.
DVT2
The 5VALWP choke rating is not enough.
0.3
6.Add PR16 S RES 1/16W 100K +-1% 0402.
7.Add PR17 and PR20 S RES 1/16W 499K +-1% 0402.
8.Add PR19 S RES 1/16W 191K +-1% 0402.
9.Add PR23 S RES 1/16W 34K +-1% 0402.
DVT2
10.Add PR26 S RES 1/16W 66.5K +-1% 0402.
2.Change the choke.
11.Add PR14 S RES 1/16W 2.2M +-5% 0402.
40
3. TP0610T will EOL. Change the part.
12.Add PR24 S RES 1/16W 47K +-5% 0402.
43
13.Add PC10 and PC12 S CER CAP 1000P 50V +-10% X7R 0402.
0.3
0.3
0.3
4.Add PD1 S DIO 1N4148 (SM)
14.Add PC11 S CER CAP .1U 25V K X7R 0603.
1.Change the PQ16 S TR TP0610T 1P SOT-23 to.S TR TP0610K 1P SOT-23
1.Add PQ1 SB502060000 S TR RHU002N06 1N SOT323.
5.Add PR10,PR11,PR12 and PR13 S RES 1/4W 1.5K +-5% 1206.
1.Change the PL9 from S COIL 10UH +-30% SDT-1050P-100-118 3.5A to S COIL 10uH +-20% SDT-1205P-100-118.
DVT20.30.3
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
LA-2362 1
PIR
52 52Friday, March 11, 2005
Compal Electronics, Inc.
Version change list (P.I.R. List) Page 5 of 5
Reason for change Rev. PG# Modify List B.Ver# PhaseFixed IssueItem
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1. 41 DVT3
The system has re-boot issue when running the 3D mark.
2.
The HW has noise by interference from B+.
LA-2362-0.2 1.Change PC90 from .47U 16V X7R 0603 to 2.2U 10V X5R 0805.
1.Add the PC14 220U 25V. DVT3
To adjust sequence for +5VALWP and +3VALWP. To adjust sequence for +5VALWP and +3VALWP.
Change the pull-high resistor for VGTE pin. For HW request. DVT3
423.
45
DVT3
1.Change PR122 from 100K 0402 to 10K 0402.
1.Add the PL3 FBL-18-453215-900LM90T_1812.
2.Add the PC35 and PC41 0.1U 25V X7R 0603,
4.The CPU's B+ has nosie issue when system into C3/C4. 45
The CPU's B+ has nosie issue when system into C3/C4.
5. To cost down for 150uf/6.3V. To cost down for 150uf/6.3V. DVT31.Change the vendor form KEMET to EPCOS.41,45
LA-2362-0.2
LA-2362-0.2
LA-2362-0.2
LA-2362-0.2 LA-2362-0.2
LA-2362-0.2
LA-2362-0.2
LA-2362-0.2
LA-2362-0.2
6. Change the IC solution from ISL6227 to MAX8743 for +2.5V and +VCCPP. The ISL6227 has shut down issue when windows idle. LA-2362-0.2 42 LA-2362-0.2 DVT3