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8051 Microcontroller: Addressing Modes

8051 Addressing Modes

Introduction:

An "addressing mode" refers to how you are addressing a given memory location. The

8051 instructions use eight addressing modes. These are:

1. Register

2. Direct

2.1) External Direct

3. Indirect

3.1) External Indirect

4. Immediate

5. Relative

6. Absolute

7. Long

8. Indexed

Each of these addressing modes provides important flexibility.

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1) Register Addressing

In this mode the data, which the instruction operates on, is in one of eight registers

labelled R0 to R7 (Rn, in general). These registers are to be found in one of four register

banks, only one of which can be active at any one time. The active bank may be

selected by using bit 3 and bit 4 of the PSW (rs0 & rs1). On power-up or reset, the

default register bank is bank 0. The format of an instruction using register addressing:

Op code ==> n

For example, to logically OR the contents of accumulator A with that of register R3, the

following instruction is used:

ORL A, R3

and the op-code is 01001011B. The upper five bits, 01001, indicate the instruction, and

the lower three bits, 011, the register.

2) Direct Addressing

Direct addressing is so-named because the value to be stored in memory is obtained by

directly retrieving it from another memory location. For example:

MOV A,30h

This instruction will read the data out of Internal RAM address 30 (hexadecimal) and

store it in the Accumulator.

Instructions using direct addressing consists of two bytes: op-code and address.

Op code Address

Direct addressing is generally fast since, although the value to be loaded isn’t included

in the instruction, it is quickly accessible since it is stored in the 8051s Internal RAM. It

is also much more flexible than Immediate Addressing since the value to be loaded is

whatever is found at the given address--which may be variable.

Also, it is important to note that when using direct addressing any instruction which

refers to an address between 00h and 7Fh is referring to Internal Memory. Any

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instruction which refers to an address between 80h and FFh is referring to the SFR

control registers that control the 8051 microcontroller itself.

The obvious question that may arise is, "If direct addressing an address from 80h

through FFh refers to SFRs, how can I access the upper 128 bytes of Internal RAM that

are available on the 8052?" The answer is: You can’t access them using direct

addressing. As stated, if you directly refer to an address of 80h through FFh you will be

referring to an SFR. However, you may access the 8052s upper 128 bytes of RAM by

using the next addressing mode, "indirect addressing."

Disadvantages : Looping is not possible in direct addressing mode

2.1) External Direct

External Memory is accessed using a suite of instructions which use what I call

"External Direct" addressing. I call it this because it appears to be direct addressing, but

it is used to access external memory rather than internal memory.

There are only two commands that use External Direct addressing mode:

MOVX A,@DPTR

MOVX @DPTR,A

As you can see, both commands utilize DPTR. In these instructions, DPTR must first be

loaded with the address of external memory that you wish to read or write. Once DPTR

holds the correct external memory address, the first command will move the contents of

that external memory address into the Accumulator. The second command will do the

opposite: it will allow you to write the value of the Accumulator to the external memory

address pointed to by DPTR.

3) Indirect Addressing

Indirect addressing is a very powerful addressing mode which in many cases provides

an exceptional level of flexibility. Indirect addressing is also the only way to access the

extra 128 bytes of Internal RAM found on an 8052.

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Indirect addressing appears as follows:

MOV A,@R0

SUBB A, @R0

This instruction performs the operation: (A) (A) – (C) – ((R0)).

This instruction causes the 8051 to analyse the value of the R0 register. The 8051 will

then load the accumulator with the value from Internal RAM which is found at the

address indicated by R0.

For example, let’s say R0 holds the value 40h and Internal RAM address 40h holds the

value 67h. When the above instruction is executed the 8051 will check the value of R0.

Since R0 holds 40h the 8051 will get the value out of Internal RAM address 40h (which

holds 67h) and store it in the Accumulator. Thus, the Accumulator ends up holding 67h.

Indirect addressing always refers to Internal RAM; it never refers to an SFR. Thus, in a

prior example we mentioned that SFR 99h can be used to write a value to the serial port.

Thus one may think that the following would be a valid solution to write the value 1 to

the serial port:

MOV R0,#99h Load the address of the serial port

MOV @R0,#01h Send 01 to the serial port -- WRONG!!

This is not valid. Since indirect addressing always refers to Internal RAM these two

instructions would write the value 01h to Internal RAM address 99h on an 8052. On an

8051 these two instructions would produce an undefined result since the 8051 only has

128 bytes of Internal RAM.

Advantage:

It makes accessing a data dynamics rather than static or in the case of direct addressing

mode.

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Limitation :

R0 and R1 ( 8-bit wide ) are the only registers that can be used for pointer in register

indirect addressing mode.

3.1 External Indirect

External memory can also be accessed using a form of indirect addressing which I call

External Indirect addressing. This form of addressing is usually only used in relatively

small projects that have a very small amount of external RAM. An example of this

addressing mode is:

MOVX @R0,A

Once again, the value of R0 is first read and the value of the Accumulator is written to

that address in External RAM. Since the value of @R0 can only be 00h through FFh the

project would effectively be limited to 256 bytes of External RAM. There are relatively

simple hardware/software tricks that can be implemented to access more than 256 bytes

of memory using External Indirect addressing; however, it is usually easier to use

External Direct addressing if your project has more than 256 bytes of External RAM.

4) Immediate Addressing

Immediate addressing is so-named because the value to be stored in memory

immediately follows the operation code in memory. That is to say, the instruction itself

dictates what value will be stored in memory.

For example, the instruction:

MOV A,#20h

This instruction uses Immediate Addressing because the Accumulator will be loaded

with the value that immediately follows; in this case 20 (hexadecimal).

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Immediate addressing is very fast since the value to be loaded is included in the

instruction. However, since the value to be loaded is fixed at compile-time it is not very

flexible.

Note : The use of leading 0 for all numbers that begin with an alphabetic

character.

5) Relative Addressing

Sometimes this is also called program counter relative addressing. This addressing

mode is used only with certain jump instructions. A relative address (or offset) is an 8-

bit signed value, which is added to the program counter to form the address of the next

instruction executed. The range for such a jump instruction is –128 to +127 locations.

Although the range is rather limited, relative addressing does offers the advantage of

providing position-independent code (since absolute addresses are not used). For

example, the instruction

JZ rel

Performs the following operations:

(PC) ¬ (PC) + 2

IF (A) = 0

THEN (PC) ¬ (PC) + rel

ELSE continue

The branch destination is computed by adding the signed relative-displacement in the

second instruction byte to the PC, after incrementing the PC twice.

6) Absolute Addressing

There are only two instructions that use this addressing: ACALL (absolute call) and

AJMP (absolute jump).

These instructions perform branching within the current 2K page of program memory.

The branch address is obtained by successively concatenating the five high-order bits of

the program counter, bits 5 – 7 of the op-code, and the second byte of the instruction.

The diagram illustrates how this is done:

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Note that the branch destination address is within the same 2K page of program memory

because the highest

most five address bits

are the same as those in

the program counter

before the branch is

taken.

7) Long Addressing

Only two instructions use this addressing mode. These instructions are LCALL addr16

and LJMP addr16.

Both of these are three byte instructions with the op-code being the first byte and the

following two bytes are the address high-byte and address low-byte respectively. These

instructions enable the program to branch to anywhere within the full 64 K-bytes of

program memory address space.

8) Indexed Addressing

In this mode the 16-bit address in a base register is added to a positive offset to form an

effective address for the jump indirect instruction JMP @A+DPTR, and the two move

code byte instructions MOVC A,@A+DPTR and MOVC A,@A+PC. The base

register in the jump instruction is the data pointer and the positive offset is held in the

accumulator. For the move instructions the base register can either be the data pointer or

the program counter, and again the positive offset is in the accumulator. The operations

of these three instructions are as follows:

JMP @A+DPTR (PC) (A) +(DPTR)

MOVC A,@A+DPTR (A) ((A) + (DPTR))

MOVC A,@A+PC (PC) (PC) + 1

(A) ((A) + (PC))

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CONCLUSION :

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