© 2001 By Default!
A Free sample background from www.pptbackgrounds.fsnet.co.uk
Slide 1
Optical Ethernet DesignOptical Ethernet Design
Receiver Group G1Receiver Group G1David GewertzDavid GewertzRyan BaldwinRyan Baldwin
Geoffrey SizemoreGeoffrey Sizemore
Presented : February 14, 2002Presented : February 14, 2002
© 2001 By Default!
A Free sample background from www.pptbackgrounds.fsnet.co.uk
Slide 2
OutlineOutline
Understanding of previous team Understanding of previous team progressprogress– removal, redesign, debugremoval, redesign, debug
Maxim Evalution KitMaxim Evalution Kit– understand chip functionality and future understand chip functionality and future
applicationsapplications Redesign transeiver for Gigabit EthernetRedesign transeiver for Gigabit Ethernet
– replacement, improvementreplacement, improvement Testing and verificationTesting and verification
– BER, compatibility, signal quality BER, compatibility, signal quality
© 2001 By Default!
A Free sample background from www.pptbackgrounds.fsnet.co.uk
Slide 3
Previous Team’s ProgressPrevious Team’s Progress
Design Team ObjectivesDesign Team Objectives– Separation of optical transceiver from Intel cardSeparation of optical transceiver from Intel card– Redesign and fabrication of new board containing Redesign and fabrication of new board containing
optical functionalityoptical functionality– Reintegration of board with Intel setupReintegration of board with Intel setup– Verification to meet optical ethernet specificationsVerification to meet optical ethernet specifications– Use of evaluation kits in further design effortsUse of evaluation kits in further design efforts
© 2001 By Default!
A Free sample background from www.pptbackgrounds.fsnet.co.uk
Slide 4
Transmission linenoise
• Avoided right angles in printedcircuitry
• Length considerations (1/10-1/4 of a wavelength)
• Differential signalingPower supplyinterference
• Load balancing (50-Ohm)• Filtering required to isolatecurrent sources
Different currentrequirements formultiple components
• Multiple power supplies• Decoupling capacitors
Pitfalls and ResolutionsPitfalls and Resolutions
© 2001 By Default!
A Free sample background from www.pptbackgrounds.fsnet.co.uk
Slide 5
Final Circuit Diagram (Fall 2001)Final Circuit Diagram (Fall 2001)
© 2001 By Default!
A Free sample background from www.pptbackgrounds.fsnet.co.uk
Slide 6
Maxim Evaluation KitsMaxim Evaluation Kits
MAX3266 Evaluation Board DiagramMAX3266 Evaluation Board DiagramPhotodiode emulation circuit replaced by
photodetector
© 2001 By Default!
A Free sample background from www.pptbackgrounds.fsnet.co.uk
Slide 7
Maxim Evaluation KitsMaxim Evaluation Kits
Circuit Modifications to Minimize Current LossCircuit Modifications to Minimize Current Loss– Replacing series resistors and adding a 67-Ohm resistor in Replacing series resistors and adding a 67-Ohm resistor in
parallelparallel
© 2001 By Default!
A Free sample background from www.pptbackgrounds.fsnet.co.uk
Slide 8
MAX3266 Board FunctionalityMAX3266 Board Functionality
Photodiode emulationPhotodiode emulation– inexpensively mimic the output of a photodetector inexpensively mimic the output of a photodetector
for chip feature testingfor chip feature testing Transimpedance Amplifier (TIA) on chipTransimpedance Amplifier (TIA) on chip
– converts current to voltageconverts current to voltage– converts single-ended input to differential outputconverts single-ended input to differential output– 1 mA p-p input = 250 mV p-p output1 mA p-p input = 250 mV p-p output– 10 micro-A p-p input = 2.5 mV p-p output10 micro-A p-p input = 2.5 mV p-p output
© 2001 By Default!
A Free sample background from www.pptbackgrounds.fsnet.co.uk
Slide 9
Maxim Evaluation KitsMaxim Evaluation Kits
MAX3264 Evaluation Board DiagramMAX3264 Evaluation Board Diagram
© 2001 By Default!
A Free sample background from www.pptbackgrounds.fsnet.co.uk
Slide 10
MAX3264 Board FunctionalityMAX3264 Board Functionality
Proper termination impedance and series Proper termination impedance and series capacitors to maintain voltage regularitycapacitors to maintain voltage regularity
Buffer on chipBuffer on chip– maintains integrity of output from TIAmaintains integrity of output from TIA
Limiting Amplifier on chipLimiting Amplifier on chip– provides 55 dB gain with 1.2 Volt maxprovides 55 dB gain with 1.2 Volt max– low jitter enables higher speedslow jitter enables higher speeds
RMS Power DetectionRMS Power Detection
© 2001 By Default!
A Free sample background from www.pptbackgrounds.fsnet.co.uk
Slide 11
Testing and VerificationTesting and Verification
BERTBERT– Tektronix GTS 1250 (1250 Mb/s)Tektronix GTS 1250 (1250 Mb/s)– desired BER = 10desired BER = 10-12-12 or 1 error every terabit or 1 error every terabit
• Example - For a 4 MB MP3, that would be one bit error Example - For a 4 MB MP3, that would be one bit error for every 31,000 songs transferredfor every 31,000 songs transferred
Tektronix CSA 7xxx ScopeTektronix CSA 7xxx Scope– accurately measures and records Gb eye accurately measures and records Gb eye
diagramsdiagrams– uses specially designed Communications Signal uses specially designed Communications Signal
Analyzer softwareAnalyzer software
© 2001 By Default!
A Free sample background from www.pptbackgrounds.fsnet.co.uk
Slide 12
DesignDesign
Single PCB with both chipsSingle PCB with both chips Interface with other design groups (OE, Interface with other design groups (OE,
TX)TX) Interference-free implementation of a Interference-free implementation of a
single power source to drive all active single power source to drive all active componentscomponents
© 2001 By Default!
A Free sample background from www.pptbackgrounds.fsnet.co.uk
Slide 13
ConclusionsConclusions
Gb Ethernet technology has been Gb Ethernet technology has been researched and understoodresearched and understood
Fall 2001 group projects have been Fall 2001 group projects have been studied for increased understanding and studied for increased understanding and legacy developmentlegacy development
Maxim data sheets have been analyzedMaxim data sheets have been analyzed Initial research has been completedInitial research has been completed
© 2001 By Default!
A Free sample background from www.pptbackgrounds.fsnet.co.uk
Slide 14
ConclusionsConclusions
Next StepsNext Steps– Get previous team’s testbed up and Get previous team’s testbed up and
functionalfunctional– Connect and test Maxim boardsConnect and test Maxim boards– Understand development of a receiver Understand development of a receiver
module and implement it using our own module and implement it using our own designdesign