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Direct Memory Access (DMA). (C A, Lecture Notes)

DIRECT MEMORY ACCESS (DMA)

Since peripheral devices are much slower than the CPU, which limits processorsefficiency. In order to overcome this difficulty, a H/W approach called direct memoryaccess is employed. DMA is a technique that transfers data between the computer and a

physical I/O device without involving CPU.

DMA involves an additional module on the system bus.

A Typical DMA Block Diagram

When the CPU wishes to read or write a block of data, it issues a command to the DMAcontroller with the following information:

type of transfer (read/write), starting address of the memory

where reading and writing needs to be performed, I/O device

address, block size.Then the CPU continues with other work, the I/O operation is delegated to the DMAmodule. Now it is DMAs job to take care of the transfer.

DMA simply use one of its transfer techniques to transfer the data to/from memorywithout going through CPU.

DMA makes a request to CPU for the system bus by raising the DMA request line high.DMA uses bus only when CPU is not using it or just about to use. CPU acknowledges theDMA request through the DMA acknowledgment line.

DMA module starts transferring the data. At the end of data transfer DMA returns thecontrol back to CPU by interrupting the CPU and CPU checks the status of data transfer.Thus the CPU is only involved at the beginning and end of the transfer.

Since I/O & CPU activities overlap, the DMA increases the system performancesignificantly.TYPES OF DMA:

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Block transferDMA controller takes the bus control by CPU. CPU has no access to bus until thetransfer is complete. During this time CPU can perform internal operations that do notneed bus. This is a common and popular method with modern microprocessors.

Cycle stealingThis is a word-by-word transfer based on CPU cycle stealing. When DMA steals acycle, CPU is stopped completely for one cycle. Cycle stealing is not an interrupt.CPU pauses for just one machine cycle. This type of transfer takes a period of time.

Some major steps of DMA cycle stealing in order to transfer data to and form memoryare:

DMA needs control of the CPU DMA must use the bus only when the CPU does not need it CPU is suspended by DMA just before it needs to use the bus CPU pauses for one bus cycle DMA transfers one words and then returns the control to CPU

The overall effect is to cause the CPU to execute more slowly

DMA & Interrupt Breakpoints For Cycle Stealing During An Instruction Cycle

Interleaved DMA.

It is similar to block transfer technique, here DMA controller takes the control ofsystem bus only when CPU is not using it. For example, performing an ALUoperation or incrementing a counter. The data transfer by this kind of methodtakes a period of time.

POSSIBLE DMA CONFIGURATIONDMA mechanism can be configured in different ways:

1. Single Bus, Detached DMA

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Inexpensive but inefficient in the terms of bus cycles, because each transfer of wordconsumes two bus cycles.

System Bus

Single Bus, Detached DMA

2. Single Bus, Integrated DMA I/OCostly but efficient use of bus cycle. Here the required bus cycle can be cut

substantially. System Bus

Single Bus, Integrated DMA I/O

3. Separate I/O BusExpensive, easily expandable, efficient use of system bus. It is one step further tosingle bus one. Here an I/O bus is implemented in a way, which reduces the number

of I/O interfaces in the DMA module to one.

Separate I/O Bus

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