dld project report

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http://www.juraatmedia.com/gladiator-2000/watch-online-hindi- dubbed-video_49ada8e25.html DIGITAL LOGIC DESIGN PROJECT REPORT : FIBNOACCI SERIES  INTRODUCTION: Definition : Sequence of numbers in which 1 appears twice as the first two numbers, and every subsequent number is the sum of two preceding numbe rs: 1, 1, 2, 3, 5, 8, 13 ... and so on. Components: The basic requirment of the circuit are  5v supply  6 D-type flipflop  Single 4bit adder  12 LEDS.  switches Circuit Design and operation: We arrange flipflop to form two la tches connected with each other.  Data latches are needed to store data that is only available or valid for a short time. If this data is latched (stored), the latch output remains available for as long as necessary. On the rising edge of the clock pulse, the data on D 0 , D 1 , D 2 and D 3 is copied to Q 0 , Q 1 , Q 2 and Q 3 . The data remains valid until the next clock pulse. Latches are further connected with 4 bit adder . 4bit binary adde r accept two 4 bit inpu t(A0,A1,A2,A 3) &(B0,B1,B2,B3)

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http://www.juraatmedia.com/gladiator-2000/watch-online-hindi-

dubbed-video_49ada8e25.html DIGITAL LOGIC DESIGN

PROJECT REPORT :

“FIBNOACCI SERIES” 

INTRODUCTION:

Definition : 

Sequence of numbers in which 1 appears twice as the first twonumbers, and every subsequent number is the sum of twopreceding numbers: 1, 1, 2, 3, 5, 8, 13 ... and so on. 

Components:

The basic requirment of the circuit are

  5v supply

  6 D-type flipflop

  Single 4bit adder

  12 LEDS.

  switches

Circuit Design and operation:

We arrange flipflop to form two latches connected with each other. 

Data latches are needed to store data that is only available or valid for

a short time. If this data is latched (stored), the latch output remains

available for as long as necessary.

On the rising edge of the clock pulse, the data on D0, D1, D2 and D3 iscopied to Q0, Q1, Q2 and Q3. The data remains valid until the next clockpulse. Latches are further connected with 4 bit adder .

4bit binary adder accept two 4 bit input(A0,A1,A2,A3) &(B0,B1,B2,B3)

 

and produce the output of sum (S0,S1,S2,S3) of two 4 bit input.

We use leds which are connected at two 4 bit input and with sum

 

output of adder . All the d type flipflop through D input and clk

 

terminal are connected with power suplly of 5 volts . the circuit getcontrolled with switchs . As a general one d flipflop output becomesinput of other flipflop and second stage flipflop out put is connected

 

with adder input also connected with leds.

CIRCUIT DIAGRAM: