distributed computer systemsjacklange/teaching/cs2510-f15/obsolete_lectures/03... · process...

36
9/17/15 1 DISTRIBUTED COMPUTER SYSTEMS PROCESSES AND THREADS Dr. Jack Lange Computer Science Department University of Pittsburgh Fall 2015 Outline Heavy Weight Processes Threads and Thread Implementation User Level Threads Kernel Level Threads Light Weight Processes Scheduler Activation Client/Server Implementation Multithreaded Server Xwindow Server General Design Issues

Upload: others

Post on 15-Mar-2020

3 views

Category:

Documents


0 download

TRANSCRIPT

Page 1: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

1!

DISTRIBUTED COMPUTER SYSTEMS

PROCESSES AND THREADS

Dr. Jack Lange Computer Science Department

University of Pittsburgh

Fall 2015

Outline

n  Heavy Weight Processes n  Threads and Thread Implementation

n  User Level Threads n  Kernel Level Threads n  Light Weight Processes n  Scheduler Activation

n  Client/Server Implementation n  Multithreaded Server n  Xwindow n  Server General Design Issues

Page 2: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

2!

PROCESS CONCEPT Process and Process Management

Process Concept n  A primary task of an operating system is to execute

and manage processes n  What is a program and what is a process?

n  A program is a specification, which contains data type definitions, how data can be accessed, and set of instructions that when executed accomplishes useful “work”

n  A sequential process is the activity resulting from the execution of a program with its data by a sequential processor

n  Program is passive, while a process is active A process is an instance of a program in execution!

Page 3: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

3!

Process Traditional Structure

n  Address Space n  Code – Binary code n  Static and dynamic data n  Execution stack – Contains data such as subroutine parameter,

return address, and temporary variables n  Process CPU State

n  Process Status Word (PSW) – Execution mode, Last operation outcome, Interrupt level, …

n  Instruction Register (IR) – Current instruction being executed n  Program Counter (PC) – Next instruction to be executed n  Stack pointer (SP) n  General purpose registers

PROCESS ADDRESS SPACE Process and Process Management

Page 4: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

4!

Memory Layout

User Mode Space (3GB)

Kernel Space (1GB)

0xffffffff!!!!!0xc0000000!!!!!!!!!!!!!!!!!!

0!

User Mode Space (2GB)

Kernel Space (2GB)

0xffffffff!!!!!!!!!!!0x80000000!!!!!!!!!!!!

0!

32bit Linux Kernel/User Memory Split

32bit Windows Default Memory Split

Max 0

Process Address Space

Stack

Heap

Data

Text

Name   Interpretation  Code Segment (Text) Program executable

statements Data Segment 1. Initialized Data

2.  Zero-Initialized or Block Started by Symbol (BSS) data

1. Static or global data initialized with non-zero values 2. Uninitialized static or global data

Categories occupy a single contiguous area.

Heap Dynamic memory allocation

Stack Segment •  Local variables of the scope.

•  Function parameters

Page 5: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

5!

PROCESS STATE Process and Process Management

Blocked (waiting)!

Created!

Exit!

Ready!

Running!

Process States n  Process in one of 5 states

n  Created n  Ready n  Running n  Blocked n  Exit

n  Transitions between states 1 - Process enters ready queue 2 - Scheduler picks this process 3 - Scheduler picks a different

process 4 - Process waits for event (such as

I/O) 5 - Event occurs 6 - Process exits 7 - Process ended by another

process

1!

5!

4!

3!

2!

7!7! 6!

Page 6: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

6!

Processes Representation

n  To users and to other processes, a process is identified by its unique Process ID (PID) n  PID <= 30,000 in Unix

n  In the OS, processes are represented by entries in a Process Table (PT) n  PID is index to (or pointer to) a PT entry n  PT entry = Process Control Block (PCB)

n  PCB is a large data structure that contains or points to all information about the process n  Linux, defined in task_struct – It contains about 70 fields n  NT – defined in EPROCESS – It contains about 60 fields

What’s In A Process Table Entry?

File management!Root directory!Working (current) directory!File descriptors!User ID!Group ID!

Memory management!Pointers to text, data, stack!

!or!Pointer to page table!

Process management!Registers!Program counter!CPU status word!Stack pointer!Process state!Priority / scheduling parameters!Process ID!Parent process ID!Signals!Process start time!Total CPU usage!

May be stored

on stack!

Page 7: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

7!

Process Information

Process ID!UID GID EUID EGID CWD!

Signal Dispatch Table!Memory Map!

CPU State!

Priority!

Signal Mask!

Stack!

File Descriptors!

Process CPU State

l  The CPU state is defined by the registers’ contents n  Process Status Word (PSW)

n  exec. mode, last op. outcome, interrupt level n  Instruction Register (IR)

n  Current instruction being executed n  Program counter (PC) n  Stack pointer (SP) n  General purpose registers

Page 8: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

8!

Process control block (PCB)

state memory

files

accounting

priority

user

CPU registers storage

text

data

heap

stack

PSW

IR

PC

SP

general purpose registers

PCB CPU kernel user

Operating System Control Structure

Memory

Files

Devices

Processes

Process 1 Process 2

Process n

Process 1 PCB

Process 1 PCB

Process 1 PCB

Memory Table!

Process Table!

Device Table!

File Table!

Page 9: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

9!

CONTEXT SWITCHING Process and Process Management

Processes in the OS

n  Two “layers” for processes n  Lowest layer of process-structured OS handles interrupts,

scheduling n  Above that layer are sequential processes

n  Processes tracked in the process table n  Each process has a process table entry

Scheduler

0 1 N-2 N-1 …!

Processes!

Page 10: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

10!

Process Management

n  In multi-programming and time sharing environments, process management is required n  A program may require multiple processes n  Many processes may be instances of the same program n  Many processes from different programs can run

simultaneously n  How does the OS manage multiple processes

running concurrently? n  What kind of information must be kept? n  What functions must the OS perform to run processes

correctly.

Switching Between Processes

n  An important task of the OS is to manage CPU allocation among concurrent processes n  When the OS takes away the CPU from a running process,

the OS must perform a switch between the processes n  This referred to as context switch

n  It is also referred to as a “state save” and “state restore”

n  What is a context? n  What operations must take place to achieve this

switch? n  How can the OS guarantee that the interrupted

process can resume correctly?

Page 11: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

11!

Process Context

n  Process Context is the necessary information of the current process operational state that must be stored in order to later resume process operation from an identical position as when the process was interrupted.

n  Context information is system dependent and typically includes: n  User Level Context n  Register Level Context n  System Level Context

n  Address space, stack space, Program Counter (PC), Stack Pointer (SP), Instruction Register (IR), Program Status Word (PSW) and other general processor registers, profiling or accounting information, associated kernel data structures and current state of the process

CPU Switch From Process to Process

Page 12: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

12!

Process Context Switch

n  Save processor context, including program counter and other registers

n  Update the process control block with the new state and any accounting information

n  Move process control block to appropriate queue - ready, blocked n  Select another process for execution n  Update the process control block of the process selected n  Update memory-management data structures n  Restore context of selected process and set the PC to the that

process code – typically, implicit in the interrupt return instruction

Context Switch Design Issues

n  Context can be costly and must be minimized n  Context switch is purely system overhead, as no “useful”

work accomplished during context switching n  The actual cost depends OS and on the support provided

by the hardware n  The more complex the OS and the PCB -> longer the context

switch n  Some hardware provides multiple sets of registers per CPU,

allowing multiple contexts to be loaded at once n  A “full” process switch may require a significant number of

instruction execution.

Page 13: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

13!

What Happens On A Trap/Interrupt?

1.  Hardware saves program counter (on stack or in a special register)

2.  Hardware loads new PC, identifies interrupt 3.  Assembly language routine saves registers 4.  Assembly language routine sets up stack 5.  Assembly language calls C to run service routine 6.  Service routine calls scheduler 7.  Scheduler selects a process to run next (might be

the one interrupted…) 8.  Assembly language routine loads PC & registers

for the selected process

Process Concept Revisited

Heavy and Light Weight Process Model

Page 14: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

14!

Process Characteristics

n  In modern operating systems, the two main characteristics of a process are treated separately

n  The unit of resource ownership is usually

referred to as a process or task

n  The unit of execution is usually referred to a thread or a “lightweight process”

Heavyweight Processes

n  A virtual address space which holds the process image

n  Protected access to processors, files, and other I/O resources

n  Use message passing or shared memory to communicate with other processes

Code Data Files

Registers Stack

Thread!

Single-Threaded Process!

Page 15: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

15!

“Heavyweight” Process Model

n  Simple, uni-threaded model n  Security provided by address space boundaries n  High cost for context switch n  Coarse granularity limits degree of concurrency

. . .

User

Kernel

Threads

User and Kernel Level Threads

Page 16: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

16!

Threads: “Processes” Sharing Memory

n  Process == Address Space n  Thread == Program Counter / Stream of Instructions n  Two examples

n  Three processes, each with one thread n  One process with three threads

Kernel! Kernel!Threads!Threads!

Systemspace!

Userspace!

Process 1! Process 2! Process 3! Process 1!

Process and Thread Information

Per process items!Address space!Open files!Child processes!Signals & handlers!Accounting info!Global variables!

Per Thread Items!Program counter!Registers!Stack & stack pointer!State!

Per Thread Items!Program counter!Registers!Stack & stack pointer!State!

Per Thread Items!Program counter!Registers!Stack & stack pointer!State!

Page 17: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

17!

Threads & Stacks

Kernel!

Process!

Thread 1! Thread 2! Thread 3!

Thread 1’sstack!

Thread 3’sstack!

Thread 2’sstack!

User space!

=> Each thread has its own stack!

Why Use threads?

n  Allow a single application to do many things at once n  Simpler programming model n  Less waiting

n  Threads are faster to create or destroy n  No separate address space

n  Overlap computation and I/O n  Could be done without

threads, but it’s harder n  Example: word processor

n  Thread to read from keyboard n  Thread to format document n  Thread to write to disk

Kernel!

When in the Course of human events, it becomes necessary for one people to dissolve the political bands which have connected them with another, and to assume among the powers of the earth, the separate and equal station to which the Laws of Nature and of Nature's God entitle them, a decent respect to the opinions of mankind requires that they should declare the causes which impel them to the separation.

We hold these truths to be self-evident, that all men are created equal, that they are endowed by their Creator with certain unalienable Rights, that among these are Life, Liberty and the pursuit of Happiness.--That to secure these rights, Governments are instituted among Men, deriving their just powers from the consent of the governed, --That whenever any Form of Government becomes

destructive of these ends, it is the Right of the People to alter or to abolish it, and to institute new Government, laying its foundation on such principles and organizing its powers in such form, as to them shall seem most likely to effect their Safety and Happiness. Prudence, indeed, will dictate that Governments long established should not be changed for light and transient causes; and accordingly all

Page 18: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

18!

Implementing threads

Kernel!

Run-time system!

Thread table!

Processtable!

Kernel!

Thread!

Process!

Thread table!

Processtable!

Scheduling User-Level Threads

Kernel!

Run-time system!

Thread table!

Processtable!

n  Kernel picks a process to run next

n  Run-time system (at user level) schedules threads n  Run each thread for less than

process quantum n  For example, a processes is

allocated 40ms each, threads get 10ms each

n  Example schedule:���A1,A2,A3,A1,B1,B3,B2,B3

n  Not possible:���A1,A2,B1,B2,A3,B3,A2,B1

Process A! Process B!

Page 19: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

19!

Scheduling Kernel-Level Threads

n  Kernel schedules each thread n  No restrictions on ordering n  May be more difficult for

each process to specify priorities

n  Example schedule:���A1,A2,A3,A1,B1,B3,B2,B3

n  Also possible:���A1,A2,B1,B2,A3,B3,A2,B1

Process A! Process B!

Kernel!

Thread table!

Processtable!

ULTs Pros and Cons

Advantages n Thread switching does not involve the kernel – no need for mode switching

n  Fast context switch time, n Threads semantics are defined by application n Scheduling can be application specific

n  Best algorithm can be selected n ULTs are highly portable – Only a thread library is needed

Disadvantages n  Most system calls are

blocking for processes n  All threads within a process

will be implicitly blocked n  Waste of resource and

decreased performance n  The kernel can only assign

processors to processes. n  Two threads within the same

process cannot run simultaneously on two processors

Page 20: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

20!

KLT Pros and Cons

Advantages n  The kernel can schedule

multiple threads of the same process on multiple processors

n  Blocking at thread level, not process level n  If a thread blocks, the CPU

can be assigned to another thread in the same process

n  Even the kernel routines can be multithreaded

Disadvantages n  Thread switching always

involves the kernel n  This means two mode

switches per thread switch are required

n  KTLs switching is slower compared ULTs n  Still faster than a full

process switch

Combined ULTs and KLTs

Solaris Approach

Page 21: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

21!

Combined ULT/KLT Approaches

n  Thread creation done in the user space

n  Bulk of thread scheduling and synchronization done in user space

n  ULT’s mapped onto KLT’s n  The programmer may adjust the

number of KLTs n  KLT’s may be assigned to

processors n  Combines the best of both

approaches “Many-to-Many” Model

Solaris Process Structure

n  Process includes the user’s address space, stack, and process control block

n  User-level threads – Threads library n  Library supports for application parallelism n  Invisible to the OS

n  Kernel threads n  Visible to the kernel n  Represents a unit that can be dispatched on a processor

n  Lightweight processes (LWP) n  Each LWP supports one or more ULTs and maps to

exactly one KLT

Page 22: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

22!

Solaris Threads

§  Task 2 is equivalent to a pure ULT approach – Traditional Unix process structure !§  Tasks 1 and 3 map one or more ULT’s onto a fixed number of LWP’s, which in turn

map onto KLT’s!§  Note how task 3 maps a single ULT to a single LWP bound to a CPU!

“bound” thread

Solaris – User Level Threads

n  Share the execution environment of the task n  Same address space, instructions, data, file (any thread

opens file, all threads can read). n  Can be tied to a LWP or multiplexed over multiple

LWPs n  Represented by data structures in address space of

the task – but kernel knows about them indirectly via LWPs

Page 23: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

23!

Solaris – Kernel Level Threads

n  Only objects scheduled within the system n  May be multiplexed on the CPU’s or tied to a

specific CPU n  Each LWP is tied to a kernel level thread

Solaris – Versatility

n  ULTs can be used when logical parallelism does not need to be supported by hardware parallelism n  Eliminates mode switching

n  Multiple windows but only one is active at any one time

n  If ULT threads can block then more LWPs can be added to avoid blocking the whole application

n  High Versatility – System can operate in a Windows style or conventional Unix style, for example

Page 24: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

24!

ULTs, LWPs and KLTs

n  LWP can be viewed as a virtual CPU n  The kernel schedules the LWP by scheduling the

KLT that it is attached to n  Run-time library (RTL) handles multiple threads

handled by RTL n  When a thread invokes a system call, the

associated LWP makes the actual call n  LWP blocks, along with all the threads tied to the LWP n  Any other thread in same task will not block.

Thread Implementation

Scheduler Activation

Page 25: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

25!

Scheduler Activation – Motivation

n  Application has knowledge of the user-level thread state but has little knowledge of or influence over critical kernel-level events – By design, to achieve the virtual machine abstraction

n  Kernel has inadequate knowledge of user-level thread state to make optimal scheduling decisions

Underscores the need for a mechanism that facilitates exchange of information between user-level and kernel-level mechanisms.

A general system design problem: communicating information and control across layer boundaries while preserving the inherent

advantages of layering, abstraction, and virtualization.

Scheduler Activations: Structure

. . .

Kernel Support!

User

Kernel

•  Change in Processor Allocation •  Change in Thread Status

•  Change in Processor Requirements Thread

Library

Scheduler Activation!

Page 26: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

26!

Communication via Upcalls §  The kernel-level scheduler activation

mechanism communicates with the user-level thread library by a set of upcalls

Add this processor (processor #) Processor has been preempted (preempted activation #, machine state) Scheduler activation has blocked (blocked activation #) Scheduler activation has unblocked (unblocked activation #, machine state)

§  The thread library must maintain the association between a thread’s identity and thread’s scheduler activation number.

Role of Scheduler Activations

Virtual Multiprocessor

User-level Threads

. . .

. . .

P1 P2 Pn . . .

. . .

SA SA SA

Kernel

Thread Library

Invariant: There is one running scheduler activation (SA) for each processor assigned to the user process.

Abstraction Implementation

Page 27: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

27!

Avoiding Effects of Blocking

User

kernel

User

Kernel

3: New

Kernel Threads Scheduler Activations

1: System Call

2: Block

1

2

4: Upcall

5: Start

Resuming Blocked Thread

user

kernel

2: preempt

1: unblock

3: upcall

5 4

4: preempt 5: resume

Page 28: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

28!

Scheduler Activations – Summary

n  Threads implemented entirely in user-level libraries n  Upon calling a blocking system call

n  Kernel makes an up-call to the threads library n  Upon completing a blocking system call

n  Kernel makes an up-call to the threads library n  Is this the best possible solution? Why not?

n  Specifically, what popular principle does it appear to violate?

Servers and Clients

Page 29: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

29!

Threads in distributed systems - clients

n  Client usage is mainly to hide network latency n  E.g. multithreaded web client

n  Web browser scans incoming HTML page, and finds additional objects to fetch

n  Each file is fetched by a separate thread, each of which performs a blocking I/O operation

n  As files come in, the browser displays them n  Multiple request-response calls to remote systems

n  A client does several RPC calls at the same time, each using a separate thread

n  It waits until all results have been returned n  Note: if calls are to different servers, we may have a linear speed-up

compared to doing calls one after the other

Threads in distributed systems – servers

n  In servers, the main issue is improved performance and better structure

n  Improve performance: n  Starting a thread to handle an incoming request is much cheaper than

starting a new process n  Having a single-threaded server prohibits simply scaling the server to

a multiprocessor system n  As with clients: hide network latency by reacting to next request while

previous one is being replied n  Better structure:

n  Most servers have high I/O demands. Using simple, well- understood blocking calls simplifies the overall structure.

n  Multithreaded programs tend to be smaller and easier to understand due to simplified flow of control

Page 30: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

30!

Multithreaded Web server

Kernel!

Network Connection

Dispatcher Thread

Worker Thread

Web Page Cache

while(TRUE) { getNextRequest(&buf); handoffWork(&buf);}

while(TRUE) { waitForWork(&buf); lookForPageInCache(&buf,&page); if(pageNotInCache(&page)) { readPageFromDisk(&buf,&page); } returnPage(&page);}

Multithreaded Servers (1) n  A multithreaded server organized in a dispatcher/worker model.

Page 31: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

31!

Three ways to build a server

n  Thread model n  Parallelism n  Blocking system calls

n  Single-threaded process: slow, but easier to do n  No parallelism n  Blocking system calls

n  Finite-state machine n  Each activity has its own state n  States change when system calls complete or interrupts

occur n  Parallelism n  Non-blocking system calls n  Interrupts

Multithreaded Servers (2)

Model Characteristics

Threads Parallelism, blocking system calls

Single-threaded process No parallelism, blocking system calls

Finite-state machine Parallelism, nonblocking system calls

Page 32: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

32!

Out-of-band communication

n  How to interrupt a server once it has accepted (or is in the process of accepting) a service request?

n  Solution 1: Use a separate port for urgent data (possibly per service request): n  Server has a separate thread (or process) waiting for incoming urgent

messages n  When urgent msg comes in, associated request is put on hold

n  Require OS supports high-priority scheduling of specific threads or processes

n  Solution 2: Use out-of-band communication facilities of the transport layer: n  E.g. TCP allows to send urgent msgs in the same connection n  Urgent msgs can be caught using OS signaling techniques

Kinds of Servers

n  Iterative vs. Concurrent

n  Iterative Servers n  Receive request n  Perform service n  Reply if necessary n  Process next request

n  Concurrent Servers n  Receive request n  Pass to separate process/thread n  Receive next request

Page 33: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

33!

Servers and state

n  Stateless servers: Never keep accurate information about the status of a client after having handled a request: n  Don’t record whether a file has been opened (simply close it again

after access) n  Don’t promise to invalidate a client’s cache n  Don’t keep track of your clients

n  Consequences: n  Clients and servers are completely independent n  State inconsistencies due to client or server crashes are reduced n  Possible loss of performance because, e.g., a server cannot anticipate

client behavior (think of prefetching file blocks)

Servers and state

n  Stateful servers: Keeps track of the status of its clients: n  Record that a file has been opened, so that pre-fetching

can be done n  Knows which data a client has cached, and allows clients

to keep local copies of shared data

n  Observation: The performance of stateful servers can be extremely high, provided clients are allowed to keep local copies. As it turns out, reliability is not a major problem.

Page 34: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

34!

Thin-client computing

n  Thin-client n  Client and server communicate over a network using a

remote display control n  Client sends user input, server returns screen updates

n  Graphical display can be virtualized and served to a client n  Application logic is executed on the server

n  Technology enablers n  Improvements in network bandwidth, cost and ubiquity n  High total cost of ownership for desktop computing

The X-Window System n  The basic organization of the X Window System n  Position of window manager affects/reflects the sophistication

of the “client” (running the X-“server”)

Page 35: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

35!

Servers: General Design Issues

a)  Client-to-server binding using a daemon as in Distributed Computing Environment (DCE)

b)  Client-to-server binding using a superserver as in UNIX

Client-Side Software for Distribution Transparency

n  A possible approach to transparent replication of a remote object using a client-side solution.

Page 36: DISTRIBUTED COMPUTER SYSTEMSjacklange/teaching/cs2510-f15/obsolete_lectures/03... · Process control block (PCB) state memory files accounting priority user CPU registers storage

9/17/15!

36!

Conclusion – Server Activation

n  Heavy Weight Processes n  Threads and Thread Implementation

n  User Level Threads n  Kernel Level Threads n  Light Weight Processes n  Scheduler Activation

n  Client/Server Implementation n  Multithreaded Server n  Xwindow n  Server General Design Issues