Rev. Roum. Sci. Techn.– Électrotechn. et Énerg. Vol. 64, 2, pp. 131–136, Bucarest, 2019

Électronique et transmission de l’information

1 Horia Hulubei National Institute for R&D in Physics and Nuclear Engineering, Department of Elementary Particle Physics, Romania, vlad-mihai.placinta@nipne.ro 2 Polytechnic University of Bucharest, Faculty of Electronics, Telecommunications and Information Technology, Romania 3 National Institute for R&D in Electrical Engineering, ICPE-CA Romania

DIGITALLY CONTROLLED ELECTRONIC LOAD FOR TESTING POWER SUPPLIES RELIABILITY

VLAD-MIHAI PLACINTA1,2, FLORIN BABARADA2, CRISTIAN RAVARIU2, LAURA GEORGETA ALECU3

Key words: Electronic load, Digital control, Power supplies, MOSFET, Microcontroller.

This paper presents a prototype of a digital controlled electronic load proposed to be used in testing the reliability of linear and switching mode power supplies and as well as the batteries. The proposed design of the electronic load was implemented around an 8 bit microcontroller which manages the configuration, monitoring and control of the entire system. The testing data is displayed on a 128x64 graphic liquid crystal display (GLCD) and sent to a graphical user interface (GUI) designed with LabVIEWTM. By using GUI, the user can perform the acquisition and the configuration of the testing routine having the possibility to save the data in ASCII files for later analyses. The architecture, thermal analysis and the testing results with different power supplies are presented in the last part of the paper.

1. INTRODUCTION The reliability of power supplies is a very important topic

which has been intense studied by a broad range of research groups either they are needed to supply consumer electronics or safety-critical applications. As very common testing equipment in this area of testing and qualifying the power supplies, the electronic loads have been vital in establishing the stability and the reliability of the entire system in which the tested power supply is embedded [1].

An electronic load is basically a very precise controllable high-power resistor which sinks a specific amount of current from the tested power supply [2–5]. To have that kind of control over the current that is needed to be sink from the power supply under test (PSUT) a transistor-based configuration is needed. Among all types of transistors, the metal oxide field effect transistor (MOSFET) is the best solution to be used due to its excellent parameters: low internal resistance (RDS-on), voltage mode gate control, and high-power dissipation.

An electronic load can work in four operation modes: constant current (CC), constant voltage (CV), constant resistance (CR) and constant power (CP). In the CC mode which is the most common mode used, the electronic load will sink a constant current, programmed by the user, regardless the PSUT output voltage.

The CV mode is used to program the electronic load to maintain a specific voltage level across the PSUT’s output by sensing its voltage and sinking current till it reaches to the programmed value.

For testing the batteries, the CR mode is the best solution to be used. In this mode, the electronic load is sensing both the voltage and current and is configured to act as a fixed resistor by sinking current linearly proportional to the input voltage. This feature is also used to test the start-up condition of the power supplies.

By using the CP mode, the electronic load is sensing the PSUT’s output voltage and calculates the necessary current to be sink in order the maintain the programmed amount of load power. This feature can be used to test the maximum amount of power delivered by a specific power supply over its entire output voltage range.

In other situations, the testing of thin film transistors or specific nanodevices with polymers requires very stable power supplies; hence an electronic load is needed to qualify these power supplies.

This work presents the design, testing and implementation of a digital controlled electronic load with a maximum dissipated power up to 30 W. The digital control is achieved with a low cost 8 bit microcontroller together with an external digital to analog converter (DAC) which are used to drive the analog circuit of the electronic load implemented with an operational amplifier (op amp). Using a custom graphical user interface, the user can monitor and control the electronic load and the testing data can be saved in ASCII files for later analysis. Additionally, the data is displayed on a graphical liquid crystal display (GLCD), Fig. 1, and the user can configure the electronic load parameters using local push-buttons.

Testing plans like transient testing and constant current mode (CC) operation are implemented and described in this paper.

Other researchers have designed and studied electronic loads for testing the power supplies and batteries either using analog control techniques or digitally controlled techniques using digital signal processing (DSP) or high-performance microcontrollers [6–8].

2. DESIGN AND IMPLEMENTATION

2.1 OPERATION PRICIPLE The main principle in designing an electronic load is to control the MOSFET transistor as a voltage-controlled resistor. This mode of operation is achieved by varying the gate to source voltage (VGS) to control the on-state resistance (RDS-on).

Most of the electronic loads are using op amps to drive the MOSFETs, either they are using analog or digital voltage references to program the current needed to be sink.

Sense functions for voltage, current and temperature need to be implemented to achieve small errors in the control loop which is responsible for setting the constant current/voltage/resistance/power parameter.

132 Digitally controlled electronic load 2

2.2 ELECTRONIC LOAD DESIGN The electronic load proposed to stress the PSUTs is described in Fig 1 and is based on an N-channel MOSFET configuration placed in parallel with the PSUT. The load design requirements are presented in Table 1.

Table 1 Electronic load requirements

Parameter Value Voltage range 0 - 25 V Current range 0 - 5 A

Maximum dissipated power 30 W Operation modes CC, transient

An opamp-based configuration is used to create the error amplifier stage which drives the MOSFET’s gate. Its non-inverting input is connected to a DAC used to set the voltage reference corresponding to a given current to be sink. The inverting input is connected to the source terminal of the MOSFET where the current sense shunt resistor is placed. Hence, any differences between these two voltages are compensated by the error amplifier by driving the MOSFET’s gate till they are equal; hence the sink current will vary with the DAC’s register configuration.

For sensing the voltage, this measurement block is based on a voltage divider followed by an op amp-based voltage buffer with an anti-aliasing filter.

The current sensing is based on a current sense shunt resistor used with a low side current sense amplifier, INA180A1 [9], to amplify the voltage drop across the shunt resistor with a gain of 20. This amplification is needed for accurate readings of the low current values by the microcontroller’s internal analog to digital converter (ADC).

The current which will be sink from the PSUT will pass through the shunt resistor. Its selection is important because the value need to be lower to ensure a lower voltage drop across it, hence a lower dissipation power. A 50 mΩ shunt resistor has been chosen and assuming 5 A as the maximum current I which will be sink, its power rating can be calculated with the equation (1).

Pdiss = Rshunt· I2 = 1.25 W . (1)

To generate the voltage reference (Vref) needed to drive

the error amplifier a 12 bit DAC is used, MCP4726 [10]. To have a high resolution over a small voltage range, an external voltage reference of 1.25 V is used to set the DAC output range, hence for a 0 – 1.25 V range the resolution per each low significant bit (LSB) is 0.3 mV. Given this value and the shunt resistor value, 50 mΩ, the current value to be sink can be incremented with a step of ~6 mA.

When choosing the op amp, a few parameters need be taken into account: I/O rail to rail, single power supply operation and low offset voltage between inputs VOS. The VOS is needed to be very low, less than ± 100 µV, because this value will establish the minimum current which can be sink from the PSUT when the voltage reference is 0 V. Assuming VOS is equal with 100 µV and the shunt resistor value is 50 mΩ, then the minimum current value can be calculated by using equation (2).

Imin = VOS / Rshunt = 100 µV / 50 mΩ = 2 mA. (2)

Given these results, OPA196 [11] op amp circuit has been proposed to be used to drive the MOSFET’s gate. It has the typical VOS value equal to ± 25 µV and the maximum value is ± 100 µV.

The most important part is choosing the right MOSFET transistor for use in such application. When choosing a MOSFET for a given application, the safe operating area (SOA) is essential.

Apart from this, the following requirements are needed to be considered: high power dissipation, high current capability, low RDS-on, package, input capacitance and low gate-to-source threshold voltage (VGS(th)).

Based on these requirements, CSD19506KCS [12], N-channel power MOSFET has been chosen. Its main parameters which are needed for this application are listed in Table 2.

Table 2 CSD19506KCS parameters

Parameter Value Drain-to-source voltage (VDS) 80 V Continuous drain current (ID) 150 A Power dissipation 375 W Drain-to-source resistance (RDS-on) 2.2 mΩ | VGS = 6V Gate-to-source threshold voltage (VGS(th)) 2.5 V Input capacitance (CISS) 9380 pF (typical) Package TO-220

Fig. 1 – Proposed electronic load architecture.

3 Vlad-Mihai Placinta et al. 133

By analysing the transfer characteristics from CSD19506KCS’s datasheet, Fig. 2, for IDS = 20A a VGS value equal with ~3.8 V is needed. This is important when the op amp used to drive the gate is supplied with 5 V, and its output swing from rail must cover that value.

Fig. 2 – CSD19506KCS transfer characteristics [12].

When driving capacitive loads, as is the MOSFET’s gate, the op amp operation tends to become unstable. To prevent that, a series resistor placed between the output and the MOSFET’s gate should be used as compensation.

Two digital temperature sensors are used to monitor the MOSFET’s heatsink and to control a cooling fan to cool down the MOSFET package while is dissipating a large amount of power. The fan is triggered when a temperature higher than 40 °C is read. The second sensor is an auxiliary sensor proposed to be used for logging and monitor the temperature of the PSUT’s main power switch.

The entire architecture is controlled by an 8 bit microcontroller, ATMEGA328P [13], which are responsible with all the testing routines and the configuration for evaluating the PSUT. Also, the voltage and current sensing are done using its internal 10 bit ADC.

The microcontroller is controlled using an UART communication from a graphical user interface designed with LabVIEWTM, shown in Fig. 3, and all the data are displayed and saved at user request into an ASCII file for later analysis. Apart from these, the user can anytime to overdrive the auto cooling control by manually set the cooling fan to a given speed.

Fig. 3 – LabVIEWTM GUI used to control the electronic load.

Figure 4 shows the prototype of designed electronic load ready for testing and in Fig. 5 the maximum dissipated power characteristics are highlighted. From these characteristics, it can be seen that the electronic load can sink up to 5 A for a maximum PSUT output voltage of up to 6 V without exceeding the maximum dissipated power established by design.

Fig. 4 – The electronic load prototype ready for testing.

Fig. 5 – The electronic load maximum dissipated power with the I-V

characteristics.

2.3 THERMAL ANALYSIS Due to the fact that the MOSFET is working in the linear region as a high-power resistor, a thermal analysis is needed to establish its thermal profile while is dissipating the maximum power. Hence, its thermal stability can only be ensured if proper cooling is provided.

For cooling, a 77 mm x 43 mm x 68 mm aluminium heatsink with forced cooling has been proposed for use. The junction temperature (TJ) in the worst-case scenario can be calculated using equation (3) [14].

TJ = Tamb + (Rth(j-a) · Pmax), (3) where Tamb is the ambient temperature, Rth(j-a) is junction-to-ambient thermal resistance and Pmax is the maximum dissipated power.

Because the Rth(j-a) parameter depends on each application and how the MOSFET’s junction will be cooled down, the Rth(j-a) can be expressed by using equation (4) [14].

Rth(j-a) = Rth(j-c) + Rth(c-h) + Rth(h-a) , (4) where Rth(j-c) is the junction-to-case thermal resistance, Rth(c-h) the case-to-heatsink thermal resistance and Rth(h-a) is the heatsink-to-ambient thermal resistance.

The Rth(c-h) as general rule can be approximated to be equal with 0.3 °C/W and it depends on which materials and how the thermal interface between the case and heatsink is done. However, for a given 77 mm x 43 mm x 68 mm aluminium heatsink without forced cooling, since its datasheet is unknown, the Rth(h-a) can be approximated to be equal with 1.3 °C/W. Assuming the Rth(j-c) maximum value is 0.4°C/W from MOSFET’s datasheet, then the Rth(j-a) has

134 Digitally controlled electronic load 4 been found to be equal with 2 °C/W.

Knowing all these thermal resistance values, the junction temperature TJ while is dissipating the maximum power of 30 W has been found to be 85 °C for a 25 °C ambient temperature. This value is well below its maximum junction temperature of 175 °C specified in datasheet. However, when forced cooling is used the TJ will be even lower.

3. TESTING RESULTS For testing, a setup has been proposed to evaluate

different scenarios for different types of power supplies as described in Fig. 6. However, when sinking large amounts of current from the power supplies, the voltage drops on the cables between the PSUT and the electronic load can be significant large. The evaluating process described in this paper will not treat this aspect since the power supplies doesn’t have the possibly to use remote feedback to compensate the voltage drop on the cables.

Different types of power supplies with different output voltages and currents will be tested regarding their stability and their transient response.

Fig. 6 – Test bench proposed for testing PSUTs.

3.1 PSUT 1 First PSUT tested was a commercial laptop switching

mode power supply with the following output configuration: 19 V, 3.42 A and a 2 meter cable length. A 1st test has been done to check its output stability with ~ 20 % load and the results are presented in Figs. 7 and 8.

Fig. 7 – Voltage and current measurements for PSUT 1 [1st test].

As it can be seen, the first test revealed that the output voltage is very stable for a ~ 20 % load. However, while the dissipated power was around 11 W, the heatsink temperature increased up to 40°C from which the forced cooling was activated and cooled down the heatsink at around 26°C.

Fig. 8 – Power dissipation and temperature measurements for PSUT 1

[1st test].

A 2nd test has been done to test the PSUT with a large load, up to 45 %, which is close to the maximum dissipated power allowed by the electronic load. A testing pattern regarding the current needed to be sink has been implemented to check the stability and the PSUT compensation with slow transient loads. The results are presented in Figs. 9 and 10.

Fig. 9 – Voltage and current measurements for PSUT 1 [2nd test].

Fig. 10 – Power dissipation and temperature measurements for PSUT 1

[2nd test].

The second test revealed that the PSUT is reliable for slow transient loads and its stability is good. As in the 1st

5 Vlad-Mihai Placinta et al. 135 test the heatsink temperature increased up to 40 °C where the forced cooling was activated, and the temperature dropped up to around 26°C. Being just some basic tests and following the results presented above, this PSUT can be used to supply various electronic without any restriction.

3.2 PSUT 2 The second PSUT tested was a commercial switching mode power supply with the following output configuration: 12 V, 0.5 A and a 1 meter cable length. This PSUT has been tested by sinking its maximum power in steps and above to test if the overcurrent protection works as expected. The results are given in the Figs. 11 and 12.

Fig. 11 – Voltage and current measurements for PSUT 2.

Fig. 12 – Power dissipation and temperature measurements for PSUT 2.

The overcurrent protection engaged at about 0.77 A which is 50 % larger than the nominal current described by vendor. However, its stability while delivering the maximum power was good and the overcurrent protection worked in the cut-off mode till the load current drops below the cut-off threshold. The heatsink temperature followed the same pattern as in the previous tests, but a hysteresis function has been implemented in the forced cooling control function. Hence, the forced cooling is activated when the heatsink temperature reaches 40 °C and is stays active till the heatsink temperature drops below 35 °C.

3.3 PSUT 3 A 3rd power supply has been used to test the electronic load itself at low voltages. Figures 13 and 14 show the electronic load testing a commercial smartphone 5 V switching mode

power supply with a sinking current configured to step-up with 0.25 A at each ~60 s. The heatsink temperature slowly increased while the MOSFET was dissipating up to 8.5 W, but the forced cooling was not triggered.

Fig. 13 – Voltage and current measurements for PSUT 3.

Fig. 14 – Power dissipation and temperature measurements for PSUT 3.

3.4 PSUT 4 Another test has been done at even very low voltage, 0.8 V, to test the electronic load capability to sink correctly high currents at low voltages. This feature is very important for designers which are implementing low voltage power supplies. The measurement results while the PSUT 4 was tested with a low voltage and having the electronic load to sink the current in steps are presented in Figs. 15 and 16.

Fig. 15 – Voltage and current measurements for PSUT 4.

136 Digitally controlled electronic load 6

Fig. 16 – Power dissipation and temperature measurements for PSUT 4.

As it can be seen, the low voltage tests revealed a good stability of the electronic load even at lower voltages. Such tests are needed because most of modern complex integrated circuits are operating at voltages equal or below 1 V due to the need to reduce the power consumption and to increase the performance of the integrated circuits.

3. CONCLUSIONS This paper shows an implemented low-cost solution for

an electronic load to test a wide range of power supplies or power systems such as photovoltaic systems [15] or battery-based systems [16], which are intended to be used in consumer electronics and safety critical applications. The digital controlled electronic load described in this paper has been intensively tested with various types of power supplies. The results presented above shows a good stability and reliability of the electronic load in the voltage range 0.8 V to 19 V with a very precise current sinking from the PSUTs. Its advantages over other related electronic loads are the temperature monitoring of the PSUT’s main switch, as well as easy integration and easy to be modified for larger power domains.

Such device has been proven helpful to test the reliability of custom power supplies used to supply various complex integrated circuits when operating in harsh environments with radiation background (e.g. space and accelerator experiments). The ionizing radiation can trigger high current states, e.g. latch-up structures, in the active complementary metal oxide semiconductor (CMOS) layer of electronic circuits like field programmable gate arrays (FPGA) and applications specific integrated circuits (ASIC). Such events are causing high currents to be sink from their power supplies, hence the power supply need to be able to sustain that amount of power while keeping its output voltage stability within a specified range [17–24].

ACKNOWLEDGEMENT This study was supported by the national project

“NUCLEU” under grant number PN 16 42 01 03 and partially supported by grant of the Romanian National Authority for Scientific Research and Innovation, CNCS/CCCDI UEFISCDI: TFTNANOEL project number PN-III-P4-ID-PCE-2016-0480 within PNCDI III project number 4/2017.

Received on April 7,2019

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