digital logic - north carolina a&t state...
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Digital LogicCOMP375 Computer Architecture and
Organization
“Contrariwise, if it was so, it might be; and if
it were so, it would be; but as it isn't, it ain't.
That's logic.”
Lewis Carroll
Types of Digital Logic
• Combinational Logic – Digital circuits that have no
memory. The same inputs always produce the same
output.
• Sequential Logic – Logic elements with memory whose
output depends on the input and the current contents of
the memory
Logic Gates
AND *
OR +
NOT X
Negative Logic Gates
NAND
NOR
Boolean Laws
Identity X + 0 = X and X * 1 = X
One X + 1 = 1
Zero X * 0 = 0
Inverse X + X = 1 and X * X = 0
Reflexive X + X = X and X * X = X
Commutative X + Y = Y + X and X*Y = Y*X
Associative X + (Y + Z) = (X + Y) + Z
X * (Y * Z) = (X * Y) * Z
Boolean Laws
Distributive X * (Y + Z) = (X * Y) + (X * Z)
X + (Y * Z) = (X + Y) * (X + Z)
DeMorgan’s X + Y = (X * Y)
X * Y = (X + Y)
Sum of Product Form
Sum of Product (A*B) + (C*D)
Product of Sums (A+B) * (C + D)
Truth Table to Function
• A sum of products solution
can be written by ORing
the lines of the truth table
that are true.
F = ABC + ABC + ABC
A B C F
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 0
Programmable Logic Array
• PLAs implement
the sum of
products
Sequential Logic
• Some logic circuits have memory that
determines the future outcome of the circuit
• Flip-flops are a simple sequential logic elements
SR Flip-Flops
• An SR flip-flop can be
constructed from two
NOR gates
S R Action
0 0 Keep state
0 1 Q = 0
1 0 Q = 1
1 1Restricted
combination
D Flip-Flop
• A D flip-flop has only one
data input plus enable, C
C D Qnext Comment
0 X Qprev No change
1 0 0 Reset
1 1 1 Set
Logic Simplification
• It is frequently possible to simplify a logical expression.
This makes it easier to understand and requires fewer
gates to implement
• There are several simplification techniques including
Boolean algebra and Karnough maps
Karnough maps
CD CD CD CD
AB 0000 0001 0011 0010
AB 0100 0101 0111 0110
AB 1100 1101 1111 1110
AB 1000 1001 1011 1010
Single Variable Group of 8
CD CD CD CD
AB 0000 0001 0011 0010
AB 0100 0101 0111 0110
AB 1100 1101 1111 1110
AB 1000 1001 1011 1010
Single Variable Group of 8
CD CD CD CD
AB 0000 0001 0011 0010
AB 0100 0101 0111 0110
AB 1100 1101 1111 1110
AB 1000 1001 1011 1010
Single Variable Group of 8
CD CD CD CD
AB 0000 0001 0011 0010
AB 0100 0101 0111 0110
AB 1100 1101 1111 1110
AB 1000 1001 1011 1010
Single Variable Group of 8
CD CD CD CD
AB 0000 0001 0011 0010
AB 0100 0101 0111 0110
AB 1100 1101 1111 1110
AB 1000 1001 1011 1010
Two Variable Group of 4
CD CD CD CD
AB 0000 0001 0011 0010
AB 0100 0101 0111 0110
AB 1100 1101 1111 1110
AB 1000 1001 1011 1010
Two Variable Group of 4
CD CD CD CD
AB 0000 0001 0011 0010
AB 0100 0101 0111 0110
AB 1100 1101 1111 1110
AB 1000 1001 1011 1010
Two Variable Group of 4
CD CD CD CD
AB 0000 0001 0011 0010
AB 0100 0101 0111 0110
AB 1100 1101 1111 1110
AB 1000 1001 1011 1010
Two Variable Group of 4
CD CD CD CD
AB 0000 0001 0011 0010
AB 0100 0101 0111 0110
AB 1100 1101 1111 1110
AB 1000 1001 1011 1010
Two Variable Group of 4
CD CD CD CD
AB 0000 0001 0011 0010
AB 0100 0101 0111 0110
AB 1100 1101 1111 1110
AB 1000 1001 1011 1010
Two Variable Group of 4
CD CD CD CD
AB 0000 0001 0011 0010
AB 0100 0101 0111 0110
AB 1100 1101 1111 1110
AB 1000 1001 1011 1010
Three Variable Pairs
CD CD CD CD
AB 0000 0001 0011 0010
AB 0100 0101 0111 0110
AB 1100 1101 1111 1110
AB 1000 1001 1011 1010
Three Variable Pairs
CD CD CD CD
AB 0000 0001 0011 0010
AB 0100 0101 0111 0110
AB 1100 1101 1111 1110
AB 1000 1001 1011 1010
Three Variable Pairs
CD CD CD CD
AB 0000 0001 0011 0010
AB 0100 0101 0111 0110
AB 1100 1101 1111 1110
AB 1000 1001 1011 1010
Three Variable Pairs
CD CD CD CD
AB 0000 0001 0011 0010
AB 0100 0101 0111 0110
AB 1100 1101 1111 1110
AB 1000 1001 1011 1010
Subtract X - Y
Example 1 bit Subtraction
Bin X Y Dif Bout
0 0 0 0 0
0 0 1 1 1
0 1 0 1 0
0 1 1 0 0
1 0 0 1 1
1 0 1 0 1
1 1 0 0 0
1 1 1 1 1
Diff = X - Y
Subtraction Karnough Maps
XY XY XY XY
Bin 0 1 0 1
Bin 1 0 1 0
Dif = XYBin + XYBin + XYBin + XYBin
Subtraction Karnough Maps
XY XY XY XY
Bin 0 1 0 0
Bin 1 1 1 0
Bout = XBin + XY + YBin
Karnaugh Maps for Programming
if (((S <6)&&(L>10)) ||
((S>=6)&&(N==G)&&(L>10)) ||
((N==G)&&(L<=10)) ||
((S>=6)&&(N==G)) ||
((S>=6)&&(N!=G)&&(L>10)) ) {
print “OK”;
}
Fill Table with IF ClausesS is (S>=6) L is (L>10) N is (N==G)
S’ is (S<6) L’ is (L<=10) N’ is (N!=G)
S’N’ S’ N S N S N’
L’ 0 1 1 0
L 1 1 1 1
if ((N==G) || (L>10))
Ignored Input Combinations
• Sometimes the logical system will not have certain input
combinations
• It may not matter what the output is for input combinations
that will not occur
• Karnaugh map squares can be marked with a “d” for Don’t
care
• A “don’t care” may be included to make a big group, but
do not have to be included
Truth Table with “Don’t Care”
B’C’ B’C BC BC’
A’ d 1 0 0
A 1 1 0 d
A B C F
0 0 0 d
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 d
1 1 1 0F = B’
Note that one “d” was
included to make a big group
while the other was ignored
7 Segment DisplayA B C D a b c d e f g
0 0 0 0 1 1 1 1 1 1 0
0 0 0 1 0 1 1 0 0 0 0
0 0 1 0 1 1 0 1 1 0 1
0 0 1 1 1 1 1 1 0 0 1
0 1 0 0 0 1 1 0 0 1 1
0 1 0 1 1 0 1 1 0 1 1
0 1 1 0 0 0 1 1 1 1 1
0 1 1 1 1 1 1 0 0 0 0
1 0 0 0 1 1 1 1 1 1 1
1 0 0 1 1 1 1 0 0 1 1
Inputs 0xA – 0xF should not occur, so the output is “don’t care”
Segment “b” of Display
C’D’ C’D CD CD’
A’B’ 1 1 1 1
A’B 1 0 1 0
AB d d d d
AB’ 1 1 d d
A B C D b
0 0 0 0 1
0 0 0 1 1
0 0 1 0 1
0 0 1 1 1
0 1 0 0 1
0 1 0 1 0
0 1 1 0 0
0 1 1 1 1
1 0 0 0 1
1 0 0 1 1
Segment “b” of Display
C’D’ C’D CD CD’
A’B’ 1 1 1 1
A’B 1 0 1 0
AB d d d d
AB’ 1 1 d d
A B C D b
0 0 0 0 1
0 0 0 1 1
0 0 1 0 1
0 0 1 1 1
0 1 0 0 1
0 1 0 1 0
0 1 1 0 0
0 1 1 1 1
1 0 0 0 1
1 0 0 1 1 seg b = B’ + C’D’ + CD