digital logic & design (dld) presentation

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DIGITAL LOGIC & DESIGN DIGITAL LOGIC & DESIGN PRESENTED BY: PRESENTED BY: Md. Foyez Ahammad Md. Foyez Ahammad Dept: EEE Dept: EEE ID:13205100 ID:13205100 PRESENTED PRESENTED FOR: FOR: Dr. Shariful Dr. Shariful Islam Islam Faculty,Dept Faculty,Dept of EEE of EEE Combinational Logic 1

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Page 1: Digital Logic & Design (DLD) presentation

DIGITAL LOGIC & DESIGNDIGITAL LOGIC & DESIGN

PRESENTED BY:PRESENTED BY: Md. Foyez AhammadMd. Foyez Ahammad Dept: EEEDept: EEE ID:13205100ID:13205100 PRESENTED FOR:PRESENTED FOR: Dr. Shariful IslamDr. Shariful Islam Faculty,Dept of EEEFaculty,Dept of EEE

Combinational Logic 1

Page 2: Digital Logic & Design (DLD) presentation

Combinational Logic 2

RememberRemember

CombinationalCombinational The outputs depend only on the current input valuesThe outputs depend only on the current input values It uses only logic gatesIt uses only logic gates

Sequential Sequential The outputs depend on the current and past input The outputs depend on the current and past input

valuesvalues It uses logic gates and storage elementsIt uses logic gates and storage elements

Network.

.

.

.

.

.

Inputs Outputs

Page 3: Digital Logic & Design (DLD) presentation

Combinational Logic 3

NotesNotes If there are If there are n n input variables, there are input variables, there are

2^n input combinations2^n input combinations For each input combination, there is For each input combination, there is

one output valueone output value Truth tables are used to list all possible Truth tables are used to list all possible

combinations of inputs and combinations of inputs and corresponding output values corresponding output values

Page 4: Digital Logic & Design (DLD) presentation

Combinational Logic 4

Basic Combinational Basic Combinational CircuitsCircuits AddersAdders MultipliersMultipliers MultiplexersMultiplexers DecodersDecoders EncodersEncoders ComparatorsComparators SubtractorsSubtractors

Page 5: Digital Logic & Design (DLD) presentation

Combinational Logic 5

DesignDesign Determine the inputs and outputsDetermine the inputs and outputs Assign a symbol for eachAssign a symbol for each Derive the truth tableDerive the truth table Get the simplified boolean expression Get the simplified boolean expression

for each outputfor each output Draw the network diagramDraw the network diagram

Page 6: Digital Logic & Design (DLD) presentation

Combinational Logic 6

ExampleExample Conversion from BCD to excess-5Conversion from BCD to excess-5

Page 7: Digital Logic & Design (DLD) presentation

Combinational Logic 7

Example (Cont.)Example (Cont.)

CDBAW

Page 8: Digital Logic & Design (DLD) presentation

Combinational Logic 8

Example (Cont.)Example (Cont.)

'''' BCDCBDBAX

Page 9: Digital Logic & Design (DLD) presentation

Combinational Logic 9

Example (Cont.)Example (Cont.)

diagramnetwork theDraw Zand FindY

Page 10: Digital Logic & Design (DLD) presentation

Combinational Logic 10

AddersAdders Essential part of every CPUEssential part of every CPU Half adder (Ignore the carry-in bit)Half adder (Ignore the carry-in bit)

It performs the addition of two bitsIt performs the addition of two bits Full adderFull adder

It performs the addition of three bitsIt performs the addition of three bits

Page 11: Digital Logic & Design (DLD) presentation

Combinational Logic 11

Half-AdderHalf-Adder

You can use K-Map to simplifyYou can use K-Map to simplify It is also obvious from the truth tableIt is also obvious from the truth table

Page 12: Digital Logic & Design (DLD) presentation

Combinational Logic 12

Full-AdderFull-Adder

Page 13: Digital Logic & Design (DLD) presentation

Combinational Logic 13

Full-AdderFull-Adder

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BACBACBACCBAS

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HOW?????

Page 14: Digital Logic & Design (DLD) presentation

Combinational Logic 14

4-bit Adder Implementation4-bit Adder ImplementationFrom course book

00 C

Page 15: Digital Logic & Design (DLD) presentation

Combinational Logic 15

QuestionQuestion How can you get 32-bit implementation?How can you get 32-bit implementation?

Page 16: Digital Logic & Design (DLD) presentation

Combinational Logic 16

Binary SubtractorBinary Subtractor RememberRemember

You need to take 2’s complement to represent You need to take 2’s complement to represent negative numbersnegative numbers

A-BA-B Take 2’s complement of B and add it to ATake 2’s complement of B and add it to A

First take 1’s complement and add 1First take 1’s complement and add 1

Page 17: Digital Logic & Design (DLD) presentation

Combinational Logic 17

4-Bit Adder and Subtractor4-Bit Adder and Subtractor

)()(1

)(0

OverflowVSubtractorMAdderM

From course book

Page 18: Digital Logic & Design (DLD) presentation

Combinational Logic 18

Binary MultiplierBinary Multiplier

From course book

Page 19: Digital Logic & Design (DLD) presentation

Combinational Logic 19

ComparatorsComparators Compare two input wordsCompare two input words

Returns 1 if Returns 1 if A=B, 0 A=B, 0 otherwiseotherwise

Page 20: Digital Logic & Design (DLD) presentation

Combinational Logic 20From course book

Page 21: Digital Logic & Design (DLD) presentation

Combinational Logic 21

DecoderDecoder n by 2^n decoder n by 2^n decoder

Converts information from n input lines into 2^n Converts information from n input lines into 2^n output linesoutput lines

2x4 Decoder2x4 Decoder 3x8 Decoder3x8 Decoder

Page 22: Digital Logic & Design (DLD) presentation

Combinational Logic 22

2x4 Decoder2x4 Decoder

Page 23: Digital Logic & Design (DLD) presentation

Combinational Logic 23

Internal Structure of 2x4 Internal Structure of 2x4 Decoder Decoder

Page 24: Digital Logic & Design (DLD) presentation

Combinational Logic 24

Another View Another View

Page 25: Digital Logic & Design (DLD) presentation

Combinational Logic 25

From course book

Page 26: Digital Logic & Design (DLD) presentation

Combinational Logic 26

ExampleExample

Page 27: Digital Logic & Design (DLD) presentation

Combinational Logic 27

4x16 Decoder4x16 Decoder

From course book

Page 28: Digital Logic & Design (DLD) presentation

Combinational Logic 28

Full Adder with DecoderFull Adder with Decoder

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Page 29: Digital Logic & Design (DLD) presentation

Combinational Logic 29

MultiplexersMultiplexers You can select information from one of You can select information from one of

many input lines and assign it to one many input lines and assign it to one output lineoutput line

You have input lines, control lines, and You have input lines, control lines, and one output lineone output line

It is called MUXIt is called MUX

Page 30: Digital Logic & Design (DLD) presentation

Combinational Logic 30

2x1 Multiplexer2x1 Multiplexer

Page 31: Digital Logic & Design (DLD) presentation

Combinational Logic 31

4x1 Multiplexer4x1 Multiplexer

Page 32: Digital Logic & Design (DLD) presentation

Combinational Logic 32

Boolean Function Boolean Function ImplementationImplementation

How do you implement it with 8x1 MUX?

Page 33: Digital Logic & Design (DLD) presentation

Combinational Logic 33

ExampleExample

Page 34: Digital Logic & Design (DLD) presentation

Combinational Logic 34

Three-State BufferThree-State Buffer

Page 35: Digital Logic & Design (DLD) presentation

Combinational Logic 35

2x1 MUX with Three-State 2x1 MUX with Three-State BufferBuffer

Page 36: Digital Logic & Design (DLD) presentation

Combinational Logic 36

ShiftersShifters 8-input, 8-output shifter8-input, 8-output shifter C=1 => right shift, C=0 => left shiftC=1 => right shift, C=0 => left shift

Page 37: Digital Logic & Design (DLD) presentation

Combinational Logic 37

Study ProblemStudy Problem Course Book Chapter – 4 ProblemsCourse Book Chapter – 4 Problems

4 – 314 – 31 Construct a 16x1 multiplexer with two 8x1 and Construct a 16x1 multiplexer with two 8x1 and

one 2x1 multiplexer. Use block diagramsone 2x1 multiplexer. Use block diagrams

Page 38: Digital Logic & Design (DLD) presentation

Combinational Logic 38

Study ProblemStudy Problem Course Book Chapter – 4 ProblemsCourse Book Chapter – 4 Problems

4 – 344 – 34

implementsr multiplexe hat thefunction tBoolean theDetermine'

;;1

;0 inputs data The

ly.respective S and ,S ,S inputsselection the toconnected C and B, A, inputs hasr multiplexe 8x1An

6

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012

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Page 39: Digital Logic & Design (DLD) presentation

Combinational Logic 39

Study ProblemsStudy Problems Course Book Chapter – 4 ProblemsCourse Book Chapter – 4 Problems

4 – 14 – 1 4 – 44 – 4 4 – 64 – 6 4 – 114 – 11 4 – 204 – 20 4 – 214 – 21 4 – 254 – 25 4 – 324 – 32 4 – 334 – 33 4 – 354 – 35

Page 40: Digital Logic & Design (DLD) presentation

Combinational Logic 40

QuestionsQuestions