digital circuit and logic design i · panupong sornkhom, 2005/2 12 2. switching algebra (cont.)...

Digital Circuit And Logic Design I

Lecture 3

Panupong Sornkhom, 2005/2 2

Outline

Combinational Logic Design Principles (1)1. Introduction2. Switching algebra3. Combinational-circuit analysis4. Combinational-circuit synthesis

Combinational Logic Design Principles (1)


1. Introduction

Logic circuits are classified into two typesCombinational circuits outputs depend only on its current inputsSequential circuits outputs depend not only on its current inputs but also on its current state.

Combinational-circuit analysisLogic diagram formal description (truth table or logic expression)

Combinational-circuit synthesisFormal description logic diagram


1. Introduction (cont.)

Combinational-circuit designRequirements Informal descriptionInformal description formal descriptionFormal description logic diagram


2. Switching algebra

In 1854, George Boole invented a two-value algebraic system, now called Boolean algebraIn 1938, Claude E. Shannon showed how to adapt Boolean algebra to analyze and describe the behavior of circuits built from relaysAxioms

(A1) X = 0 if X ≠ 1 (A1′) X = 1 if X ≠ 0(A2) If X = 0, then X ′ = 1 (A2′) If X = 1, then X ′ = 0(A3) 0·0 = 0 (A3′) 1+1 = 1(A4) 1·1 = 1 (A4′) 0+0 = 0(A5) 0·1 = 1·0 = 0 (A5′) 0+1 = 1+0 = 1


2. Switching algebra (cont.)

Single-Variable Theorems(T1) X+0 = X (T1′) X·1 = X (Identities)(T2) X+1 = 1 (T2′) X·0 = 0 (Null elements)(T3) X+X = X (T3′) X·X = X (Idempotency)(T4) (X′)′ = X (Involution)(T5) X+X′ = 1 (T5′) X·X′ = 0 (Complements)

Two- and Three-Variable Theorems(T6) X+Y = Y+X (T6′) X·Y = Y·X (Commutativity)(T7) (X+Y)+Z = X+(Y+Z)(T7′) (X·Y)·Z = X·(Y·Z) (Associativity)(T8) X·Y+X·Z = X·(Y+Z)(T8′) (X+Y)·(X+Z) = X+Y·Z (Distributivity)



Two- and Three-Variable Theorems (cont.)(T9) X+X·Y = X (T9′) X·(X+Y) = X (Covering)(T10) X·Y+ X·Y′ = X(T10′) (X+Y)·(X+Y′) = X (Combining)(T11) X·Y+X′·Z+Y·Z = X·Y+X′·Z(T11′) (X+Y)·(X′+Z)·(Y+Z)= (X+Y)·(X′+Z) (Consensus)

n-Variable Theorems(T12) X+X+…+X = X(T12′) X·X·…·X = X (Generalized idempotency)(T13) (X1·X2·…·Xn)′ = X1′+X2′ +…+Xn′(T13′) (X1+X2+…+Xn)′ = X1′·X2′·…·Xn′(DeMorgan’s theorems)



Principle of DualityIf a Boolean statement is proved true, the dual of statement is also true.The dual of expression is obtained by replacing each “+” in the expression by “·” and vice versa, and replacing 1 by 0 and vice versa. Notice that we must preserving the existence of all parentheses, whether present or impliedFor example, given X·Y+X·Z = X·(Y+Z) its dual is (X+Y)·(X+Z) = X +(Y·Z)



Standard representations of logic functionsTruth tableAn algebraic sum of minterms, the canonical sumA minterm list using the Σ notationAn algebraic product of maxterms, the canonical productA maxterm list using the Π notation



Standard representations of logic functions (cont.)

1011611117

010151001411103001020100110000FZYXRow

Truth table for a particular 3-variable logic function, F(X,Y,Z)



Standard representations of logic functions (cont.)A literal is a variable or the complement of a variable.A product term is a single literal or a logical product of two or more literals.A sum-of-products expression is a logical sum of product termsA sum term is a single literal or a logical sum of two or more literalsA product-of-sums expression is a logical product of sum termsA normal term is a product or sum term in which no variable appears more than once.An n-variable minterm is a normal product term with n literals.An n-variable maxterm is a normal sum term with n literals



Standard representations of logic functions (cont.)

There is a close correspondence between the truth table and minterms and maxterms. A minterm can be defined as a product term that is 1 in exactly one row of the truth table.A maxterm can be defined as a sum term that is 0 in exactly one row of the truth table. Picture from Textbook DDPP



Standard representations of logic functions (cont.)Based on the correspondence between the truth table and minterms, we can create an algebraic representation of a logic function from its truth tableThe canonical sum of a logic function is a sum of the mintermscorresponding to truth-table rows (input combinations) for which the function produce a 1 output.The cannonical product of a logic function is a product of the maxterms corresponding to input combinations for which the function produces a 0 output.



Standard representations of logic functions (cont.)F=ΣX,Y,Z(0,3,4,6,7)

=X′·Y′·Z′+ X′·Y·Z+ X·Y′·Z′+ X·Y·Z′+X·Y·Z



Standard representations of logic functions (cont.)F=ΠX,Y,Z(1,2,5)

=(X+Y+Z′)·(X+Y′+Z)·(X′+Y+Z′)



Standard representations of logic functions (cont.)Therefore, ΣX,Y,Z(0,3,4,6,7) = ΠX,Y,Z(1,2,5)In fact, for any logic function F, minterm list is complement of maxterm list and vice versa


3. Combinational-Circuit Analysis

11117

00116

11015

00014

01103

10102

11001

00000

FZYXRow

Pictures from text book DDPP

Exhaustive approach


3. Combinational-Circuit Analysis (cont.)


Algebraic approach

F = ((X+Y′)·Z)+(X′·Y·Z ′)


3. Combinational-Circuit Analysis (cont.)

From F = ((X+Y′)·Z)+(X′·Y·Z′)We can use theorems to transform this expression into another formF = X·Z+Y′·Z+X′·Y·Z′ (sum of product form)Or F = ((X+Y′)·Z)+(X′·Y·Z′)

= ((X+Y′)+X′·Y·Z′)·(Z+X′·Y·Z′)= ((X+Y′)+X′)·((X+Y′)+Y)·((X+Y′)+Z′)·(Z+X′)·(Z+Y)·(Z+Z′)= 1·1·(X+Y′+Z′)·(X′+Z)·(Y+Z)·1= (X+Y′+Z′)·(X′+Z)·(Y+Z) (product of sum form)


4. Combinational-Circuit Synthesis

Circuit description and designsGiven a circuit description, we convert it to formal descriptionFrom formal description, we can derive it to logic diagramFor example

The description of a 4-bit prime-number detector might be, “Given a 4-bit input combination N = N3N2N1N0, this function produces a 1 output for N = 1, 2, 3, 5, 7, 11, 13, and 0 otherwise.”A formal description (logic function) can be designed directly from the canonical sum of product expression F = ΣN3N2N1N0(1, 2, 3, 5, 7, 11, 13)

= N3′·N2′·N1′·N0 + N3′·N2′·N1·N0′ + N3′·N2′·N1·N0 + N3′·N2·N1′·N0 + N3′·N2·N1·N0 + N3·N2′·N1·N0 + N3·N2·N1′·N0


4. Combinational-Circuit Synthesis (cont.)

Picture from text book DDPP

Canonical-sum design for 4-bit prime-number detector



Circuit manipulationsSometimes we would like to use NAND and NOR gates instead of useAND, OR, and NOT gatesBecause NANDs and NORs are faster than ANDs and ORs in most technologiesWe can translate any logic expression into an equivalent sum-of-products expression, such an expression may be realized directlywith two-level AND-OR circuit or may be converted to two-level NAND-NAND circuitSimilarly, we can translate any logic expression into an equivalent product-of-sums expression, such an expression may be realized directly with two-level OR-AND circuit or may be converted to two-level NOR-NOR circuit

digital circuit and logic design i · panupong sornkhom, 2005/2 12 2. switching algebra (cont.)...

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