digital abstraction

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  • 8/14/2019 Digital Abstraction

    1/206.002 Fall 2000 Lecture 14

    6.002 CIRCUITS ANDELECTRONICS

    The Digital Abstraction

  • 8/14/2019 Digital Abstraction

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    6.002 Fall 2000 Lecture 24

    Review

    Discretize matter by agreeing toobserve the lumped matter discipline

    Analysis tool kit: KVL/KCL, node method,superposition, Thvenin, Norton

    (remember superposition, Thvenin,Norton apply only for linear circuits)

    Lumped Circuit Abstraction

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    6.002 Fall 2000 Lecture 34

    Discretize value Digital abstraction

    Interestingly, we will see shortly that thetools learned in the previous threelectures are sufficient to analyze simpledigital circuits

    Reading: Chapter 5 of Agarwal & Lang

    Today

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    6.002 Fall 2000 Lecture 44

    Analog signal processing

    But first, why digital?In the past

    By superposition,

    The above is an adder circuit.

    2

    21

    11

    21

    20

    VRR

    VRR

    V+

    +

    +

    =

    If ,21 RR =

    2

    21

    0

    VVV

    +=

    1V

    1

    2+

    2V +

    0V

    and

    might represent the

    outputs of two

    sensors, for example.

    1V 2V

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    6.002 Fall 2000 Lecture 54

    Noise Problem

    noise hampers our ability to distinguishbetween small differences in value e.g. between 3.1V and 3.2V.

    Receiver:

    huh?

    add noise onthis wire

    t

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    6.002 Fall 2000 Lecture 64

    Value Discretization

    Why is this discretization useful?

    Restrict values to be one of two

    HIGH

    5V

    TRUE

    1

    LOW

    0V

    FALSE

    0

    like two digits 0 and 1

    (Remember, numbers larger than 1 can berepresented using multiple binary digits andcoding, much like using multiple decimal digits torepresent numbers greater than 9. E.g., thebinary number 101 has decimal value 5.)

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    6.002 Fall 2000 Lecture 74

    Digital System

    sender receiverS

    VRV

    noise

    SV

    0 01

    0V

    2.5V

    5V HIGH

    LOW

    t

    RV

    0 01

    0V

    2.5V

    5V

    t

    VVN

    0=

    NV

    SV

    0 01

    2.5V t

    With noiseVV

    N2.0=

    SV

    0 01

    0V

    2.5V

    5V

    t

    0.2V

    t

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    6.002 Fall 2000 Lecture 84

    Digital System

    Better noise immunityLots of noise margin

    For 1: noise margin 5V to 2.5V = 2.5VFor 0: noise margin 0V to 2.5V = 2.5V

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    6.002 Fall 2000 Lecture 94

    Voltage Thresholdsand Logic Values

    1

    0

    1

    0

    sender receiver

    1

    0

    0V

    2.5V

    5V

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    6.002 Fall 2000 Lecture 104

    forbidden

    region

    VH

    V L

    3V

    2V

    But, but, but What about 2.5V?

    Hmmm create no mans landor forbidden region

    For example,

    senderreceiver

    0V

    5V

    1 1

    0 0

    1 V 5V

    0 0V V

    H

    L

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    6.002 Fall 2000 Lecture 114

    sender receiver

    But, but, but Wheres the noise margin?

    What if the sender sent 1: ?VHHold the sender to tougher standards!

    5V

    0V

    11

    00

    V

    0H

    V0L

    VIH

    VIL

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    6.002 Fall 2000 Lecture 124

    sender receiver

    VH

    But, but, but Wheres the noise margin?

    What if the sender sent 1: ?Hold the sender to tougher standards!

    5V

    0V

    1 noise margin:

    0 noise margin:

    VIH

    - V0H

    VIL

    - V0L

    11

    00

    V

    0H

    V0L

    VIH

    VIL

    Noise margins

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    6.002 Fall 2000 Lecture 134

    Digital systems follow static discipline: ifinputs to the digital system meet valid inputthresholds, then the system guarantees itsoutputs will meet valid output thresholds.

    sender

    receiver

    0 1 0 1

    t

    5VV

    0H

    V0L

    0V

    VIH

    VIL

    0 1 0 1

    t

    5VV

    0H

    V0L

    0V

    VIH

    VIL

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    6.002 Fall 2000 Lecture 144

    Processing digital signals

    Recall, we have only two values

    Map naturally to logic: T, F

    Can also represent numbers

    1,0

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    6.002 Fall 2000 Lecture 154

    Processing digital signalsBoolean Logic

    If X is true and Y is trueThen Z is true else Z is false.

    Z = X AND YX, Y, Z

    are digital signals0 , 1

    Z = X YBoolean equation

    Enumerate all input combinations

    Truth table representation:

    ZX Y

    AND gateZX

    Y

    0 0 0

    0 1 01 0 0

    1 1 1

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    6.002 Fall 2000 Lecture 164

    Adheres to static discipline Outputs are a function of

    inputs alone.

    Combinational gateabstraction

    Digital logic designers do not

    have to care about what is

    inside a gate.

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    6.002 Fall 2000 Lecture 174

    Demo

    Noise

    ZXY

    Z = X Y

    Z

    Y

    X

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    6.002 Fall 2000 Lecture 184

    Z = X Y

    Examples for recitation

    X

    t

    Y

    t

    Z

    t

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    6.002 Fall 2000 Lecture 194

    In recitation

    Another example of a gateIf (A is true) OR (B is true)

    then C is true

    else C is false

    C = A + B Boolean equation

    OR

    OR gate

    CA

    B

    ZX

    Y NAND

    Z = X Y

    More gates

    B B

    Inverter

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    Boolean Identities

    AB + AC = A (B + C)

    X 1 = XX 0 = XX + 1 = 1X + 0 = X

    1 = 0

    0 = 1

    output

    BC B C

    A

    Digital Circuits

    Implement: output = A + B C