diagnostic test pattern generation and fault simulation for stuck-at and transition faults...
TRANSCRIPT
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Diagnostic Test Pattern Generation and Fault Simulation for Stuck-at and
Transition Faults
Committee:
Vishwani D. Agrawal
Adit Singh
Victor P. Nelson
Bogdan M. Wilamowski
Mar. 21, 2012
Student: Yu Zhang
Auburn University, Auburn, Alabama 36849 USA
University Reader:Sanjeev Baskiyar, CSSE
Zhang: PhD Defense
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Purpose
Mar. 21, 2012 2
• Identification of fault is useful in the characterization phase of design.
• Present ATPG tools emphasize only fault detection.
• There is an accepted measure for fault detection coverage but none for diagnostic coverage.
• Diagnosis must deal with non-classical faults, not just single stuck-at faults.
Zhang: PhD Defense
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Outline
• Purpose (motivation)
• Introduction & Background
• Diagnostic ATPG System– Diagnostic Fault Simulation– Exclusive Test Generation– Equivalence Identification
• Exclusive test for transition fault
• Experimental results
• ConclusionMar. 21, 2012 Zhang: PhD Defense
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Diagnostic ATPG Problem
Mar. 21, 2012
• Given a circuit and a fault model, find:– Test vectors to distinguish between all, or
most, fault-pairs.– Measure diagnostic coverage of vectors.
• Present contributions:– A new diagnostic coverage metric.– A diagnostic ATPG system using new algorithms and
conventional stuck-at fault detection tools.– A diagnostic ATPG system for transition faults using
new algorithms and available fault-detection tools
Zhang: PhD Defense
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Introduction
Mar. 21, 2012 5
---00---01---11--- ----- ----- -----10
TestPatterns/Vectors
Circuit under Test(CUT)
Stored expected
output response
Comparator
MatchMismatch
10---01----- ----- ----- ---11---
Faulty Circuit
Good Circuit
Output Responses
Basic testing flow.
Zhang: PhD Defense
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Fault Detection and Diagnosis
Mar. 21, 2012
• Fault detection: Need at least one vector that
detects a target fault.
• Fault diagnosis: Need at least one vector that
produced different responses for every pair of faults.
CUT
1
0
1
D
D
Fault
Fault
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Introduction*
CUT withfault f1
Detectiontest vector C1
Fault freeCUT C0
sa0
Mar. 21, 2012 7
Fault detection test generation:Find an input vector such that faulty response
differs from fault-free response. C0 C1 = 1
* Yu Zhang, V. D. Agrawal, “A Diagnostic Test Generation System,” in Proc. International Test Conf., Nov 2010.
Zhang: PhD Defense
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Introduction
Mar. 21, 2012
CUT withfault f1
CUT withfault f2
Exclusivetest vector C1
C2
Fault freeCUT
Fault freeCUT
C0
C0
sa0
Exclusive test:A test that detects only one fault from a fault-pair.
CUT withfault f1
CUT withfault f2
Exclusivetest vector C1
C2
sa0
Simplified:(C0 C1) (C0 C2) = 1 ⇒ C1 C2 = 1
Zhang: PhD Defense
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Mar. 21, 2012 9
1. Structurally collapsed fault set
2. ATPG system for detection fault coverage
Test vectors
Detection vectors
4. Exclusive test generator
Exclusive vectors
3. Diagnostic fault simulator
Adequate diagnostic coverage
?
Undiagnosed fault-pair
No
YesStop
Functionally equivalent fault-pair
DiagnosticATPG
Conventional ATPG
Diagnostic Test Generation System
Zhang: PhD Defense
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Diagnostic Fault Simulator*
• Given a set of vectors and a set of
faults, find:
– Diagnostic coverage
– Identify undiagnosed fault groups with two
or more faults
– Eliminate the need to target all n(n – 1)/2
fault pairs
Mar. 21, 2012
* Y. Zhang and V. D. Agrawal, “An Algorithm for Diagnostic Fault Simulation,” Proc. 11th IEEE Latin-American Workshop, March 2010.
Zhang: PhD Defense
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Diagnostic Fault Simulation
1. For an input test vector find detected faults.
2. Group faults with same syndrome (detection
pattern at primary outputs).
3. Calculate/update diagnostic coverage (DC).
4. Continue steps 1 through 3 with next test vector
until no vectors left.
Mar. 21, 2012 Zhang: PhD Defense
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Simulate tn
Diagnostic Fault Simulation
Mar. 21, 2012
Original fault set
Simulate t1G0 fa G2
G3
Simulate t2 fb G7G5
Simulate t3
G4G0 G2
G5fefc fd
Zhang: PhD Defense
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Diagnostic Fault Coverage (DC)*
Mar. 21, 2012 13
* Yu Zhang, V. D. Agrawal, “A Diagnostic Test Generation System and a Coverage Metric,” 15th IEEE European Test Symp., May 2010.
• Diagnostic coverage
• Fault coverage (conventional),
Where g0 is the set of undetected faults.
(new)
faultsofnumberTotal
groupsfaultecteddetofNumberDC
pairs faultofnumberTotal
pairsfaultedistinguishdofNumberDC
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DC vs. Fault-Pair Coverage – C432
Mar. 21, 2012 14
1 6 11 16 21 26 31 36 41 46 51 56 61 660
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
1.1
0
100
200
300
400
500
600
700
800
900
1000Diagnostic Coverage
DC Distin. FP/Total FP No. of Un. FP
Number of ATPG Vectors
Co
ve
rag
e a
s f
rac
tio
n
Nu
mb
er
of
Un
dis
tin
gu
ish
ed
F
au
lt P
air
s
Zhang: PhD Defense
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Diagnostic Fault Simulation
Mar. 21, 2012 15
1
3
2
6
7
10
16
11
22
23
14
15
20
2119
5
Take ISCAS85 benchmark circuit c17 as an example:
Zhang: PhD Defense
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Diagnostic Fault Simulation
• 22 collapsed fault in c17 (f1~f22):
f1: 22 sa1f2: 10 sa1f3: 22 sa0f4: 16->22 sa1f5: 3->10 sa1f6: 1 sa1f7: 3 sa0f8: 3 sa1f9: 16 sa1f10: 16 sa0f11: 11->16 sa1
f12: 2 sa1f13: 11 sa0f14: 3->11 sa1f15: 11 sa1f16: 6 sa1f17: 23 sa1f18: 19 sa1f19: 23 sa0f20: 16->23 sa1f21: 11->19 sa1f22: 7 sa1
Mar. 21, 2012 Zhang: PhD Defense
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Diagnostic Fault Simulation
t1: 00000 00 t2: 10110 10 t3: 11101 11 t4: 01110 00 t5: 10011 01 t6: 00111 00 t7: 11000 11 t8: 01010 11
Test vector set for c17 (generated by our diagnostic ATPG system):
Mar. 21, 2012
1
3
2
6
7
10
16
11
22
23
14
15
20
2119
5
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Diagnostic Fault Simulation
test 1: 00000 00 f1: * 10 f2: 00 f3: 00 f4: 00 f5: 00 f6: 00 f7: 00 f8: 00 f9: 00 f10: * 11 f11: 00
Fault simulation without fault dropping:
f12: * 11 f13: 00 f14: 00 f15: 00 f16: 00 f17: * 01 f18: 00 f19: 00 f20: 00 f21: 00 f22: * 01
Mar. 21, 2012
Fault free responsefor test 1
* indicates detected faults
Zhang: PhD Defense
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Diagnostic Fault Simulation
In syndrome, ‘1’ represents a mismatch with fault free response. ‘0’ means match.f1 will be dropped from further simulation.
Faults can be grouped according to syndromes (syndromes of t1):
Mar. 21, 2012
Groups FaultsSyndrome
t1
G1 f1 10
G2 f10,f12 11
G3 f17,f22 01
G0 All other faults 00
Zhang: PhD Defense
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Diagnostic Fault Simulation
%64.1322
3
faultsofnumberTotal
groupsfaultecteddetofNumberDC
%73.2222
5
faultsofnumberTotal
faultsecteddetofNumberFC
Mar. 21, 2012
Groups FaultsSyndrome
t1
G1 f1 10
G2 f10,f12 11
G3 f17,f22 01
G0 All other faults 00
Zhang: PhD Defense
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Diagnostic Fault Simulation
test 2: 10110 10
G2: f10: * 11 f12: 10
G3: f17: * 11 f22: 10
Fault simulation with t2: G0: f2: * 00 f3: * 00 f4: 10 f5: 10 f6: 10 f7: * 00 f8: 10 f9: 10 f11: 10 f13: 10 f14: 10 f15: 10 f16: 10 f18: 10 f19: 10 f20: 10 f21: 10
Mar. 21, 2012
Fault free response
G0 contains undetected faults.After test2 f2, f3, and f7 will leave G0.
Zhang: PhD Defense
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Diagnostic Fault Simulation
After applying t2:
f10, f12, f17, f22 are dropped from further simulation
Mar. 21, 2012
Groups FaultsSyndrome
t2
G2 f10 01
G4 f12 00
G3 f17 01
G5 f22 00
G0 All other faults 00
G6 f2, f3, f7 10
Zhang: PhD Defense
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Diagnostic Fault Simulation
%27.2722
6DC %36.36
22
8FC
Mar. 21, 2012
Groups FaultsSyndrome
t2
G2 f10 01
G4 f12 00
G3 f17 01
G5 f22 00
G0 All other faults 00
G6 f2, f3, f7 10
Zhang: PhD Defense
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Dictionary ConstructionThis is a fault dictionary constructed after applying t2.It can be used for cause-effect diagnosis‘X’ means don’t care or unknown
Mar. 21, 2012
FaultsSyndrome
t1Syndrome
t1Syndrome
t3 ~ t8
f1 10 X …
f10 11 01 …
f12 11 00 …
f17 01 01 …
f22 01 00 …
f2, f3, f7 00 10 …
All other faults 00 00 …
Zhang: PhD Defense
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Diagnostic Fault Simulation
Continue to apply test vectors to all groups, and divide faults into sub groups.
G0:f1, f2, f3,…f22
(no test applied)G0:All other
faults (00)
G3:f17, f22 (01)
G2:f10, f12 (11)
G1:f1 (10)
After t1:
f1 is dropped
Mar. 21, 2012 Zhang: PhD Defense
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Diagnostic Fault Simulation
G2:f10, f12
After t2:
G5:f12 (00)
G2:f10 (01)
Single fault groups are dropped.
Mar. 21, 2012 Zhang: PhD Defense
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Diagnostic Fault Simulation
G3:f17, f22
G6:f22 (00)
G3:f17 (01)
Single fault groups are dropped.
Mar. 21, 2012
Similarly for G3:
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Diagnostic Fault Simulation
G0:f2~f9, f11, f13~f16,
f18~f21
G0:all other
undetected faults (00)
G7:f2, f3, f7
(10)
Mar. 21, 2012
For G0:
No faults are dropped here
Zhang: PhD Defense
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Diagnostic Fault Simulation
• For c17 after applying all 8 test vectors, we
get 22 fault groups with only one fault in each
group.
%10022
22DC %100
22
22FC
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Fault Dropping
• Each group contains faults that are not
distinguished from others within that group,
but are distinguished from those in other
groups.
• During simulation once a fault is placed alone
in a single-fault group, it is dropped from
further simulation.
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Simulate tn
Diagnostic Fault Simulation
Mar. 21, 2012
Original fault set
Simulate t1G0 fa G2
G3
Simulate t2 fb G7G5
Simulate t3
G4G0 G2
G5fefc fd
Summarize:
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Summary for Fault Simulation
• Diagnostic coverage metric defined.
• Diagnostic fault simulation has similar
complexity as conventional simulation with
fault dropping.
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Exclusive Test* Generation
• An exclusive test for fault-pair (f1, f2)
distinguishes between the two faults.
• If no exclusive test exists, then the two faults
cannot be distinguished from each other and
form an equivalent fault-pair.
* V. D. Agrawal, D. H. Baik, Y. C. Kim, and K. K. Saluja,
“Exclusive Test and its Applications to Fault Diagnosis,” Proc.
16th International Conf. VLSI Design, Jan. 2003, pp. 143–
148.
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Exclusive Test Generation
Mar. 21, 2012 34
CUT withfault f1
CUT withfault f2
Exclusivetest vector
y
C1
C2
0
1
New model:
Sa0 or Sa1
X
G(X,y)
CUT withfault f1
CUT withfault f2
Exclusivetest vector C1
C2
sa0
C1 C2 = 1Previous model:
Need two copies of circuit
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Exclusive Test Generation
Mar. 21, 2012
line x2
PI PO
Single circuit copy ATPG: find a test vector to distinguish fault f1 (line x1 s-a-a) from fault f2 (line x2 s-a-b)
s-a-b
line x1s-a-a
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New Diagnostic ATPG Model
Mar. 21, 2012 36
• Two-copy ATPG model with C1 and C2:
• Substitue:
• Single-copy ATPG model with C:
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Single Copy Exclusive Test Generation
Mar. 21, 2012 37
PI
POConsider exclusive test for x1 s-a-a and x2 s-a-b
yx1
G
CUT C
x1’
ax2
b
x2’
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A Simplified Model
Mar. 21, 2012 38
Suppose a is 0 and b is 1, the model can be simplified:
PI PO
y
x1 x1’
x2
x2’
CUT CZhang: PhD Defense
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Exclusive Test Generation Example
Mar. 21, 2012 39
ISCAS85 c17 benchmark circuit:
t1: 00000 00 t2: 10110 10
Seven test vectors generated by ATPG; 100% fault coverage but some fault-pairs not distinguished
1
3
2
6
7
10
16
11
22
23
14
15
20
2119
sa0
sa1
5
Zhang: PhD Defense
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Exclusive Test Generation
Mar. 21, 2012 40
Sa0 or Sa1y
1
3
2
6
7
10
16
11
22
23
14
15
20
2119
t8: 10010 00
10
0
1
0
1/0
0/1
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Advantages of Exclusive Test Algorithm
• Reduced complexity: Single-copy ATPG
model is no more complex than a single fault
ATPG.
• No need for especially designed diagnostic
ATPG tools that try to propagate different
logic values of two faults to POs.
• Can take advantage of various existing fault
detection ATPG algorithms.
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42
Experimental Results
CircuitNo. offaults
Detection test Generation Diagnostic test Generation
Det. Vect.
FC %
CPUs*
DC %
Excl.Vect.
Abortpairs
Equv.pairs
DC%
CPU s*
c17 22 7 100.0 0.03 95.5 1 0 0 100.0 0.03
c432 524 51 99.2 0.03 92.0 18 13 13 100.0 0.03
c499 758 53 100.0 0.03 97.4 0 12 12 100.0 0.03
c880 942 60 100.0 0.05 92.6 10 55 55 100.0 0.05
c1355 1574 85 100.0 0.05 58.9 2 740 740 100.0 0.13
c1908 1879 114 99.9 0.05 84.7 20 300 277 98.8 0.07
c2670 2747 107 98.8 0.11 79.1 43 494 466 98.9 0.34
c3540 3428 145 100.0 0.13 85.2 29 541 486 97.2 0.42
c6288 7744 29 99.6 0.22 85.3 108 842 977 99.5 7.60
c7552 7550 209 98.3 0.39 86.0 87 904 1091 99.4 2.18
Mar. 21, 2012
* Core 2 Duo 2.66GHz 3GB RAMZhang: PhD Defense
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Need for Equivalence Identification
Mar. 21, 2012 43
• Some fault-pairs are functionally equivalent; not found in
structural collapsing.
• Exclusive test ATPG may leave many undiagnosed fault pairs
as aborted faults.
• Many techniques have been proposed for fault equivalence
identification:
– Structural analysis
– Exhaustive enumeration
– Learning & implication
– Branch & bound
– Circuit transformation & symmetry identificationZhang: PhD Defense
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Equivalence Identification*
Mar. 21, 2012 44
sa0
sa1
Dominator gatefor both faults
Extract a small logic blockFaults are functionally equivalent if,
exclusive test impossible, or faulty circuits identical.
* M. E. Amyeen, W. K. Fuchs, I. Pomeranz, and V. Boppana, “Fault Equivalence Identification in Combinational Circuits Using Implication and Evaluation Techniques,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 22, no. 7, Jul. 2003.
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45
Summary of Test Generation
• New diagnostic test generation algorithm
uses conventional tools:
– Diagnostic fault simulation drops diagnosed
faults; similar complexity to conventional
fault simulators.
– Exclusive test generation requires only
single fault detection.
– Fault equivalence checking is important for
DC; requires effective algorithm.
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46
Exclusive Test Gen. For Tran. Faults
• Introduction and background
• Representing a transition fault as a single
stuck-at fault
• Exclusive test patterns for transition faults– One and two time frame models
• Experimental Results
• Summary
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Purpose
Mar. 21, 2012 47
• Many modern design failures behave as non-classical faults.
• Most failures are timing related.
• Transition fault model is widely used due to its simplicity.
• There exist a need for diagnosis using the transition fault model.
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Problem Statement and Contribution
Mar. 21, 2012 48
• Modeling and test generation for transition faults:– Detection of single transition faults– Exclusive tests for fault-pairs
• Contribution:– A diagnostic ATPG system for transition faults
using conventional fault-detection tools.
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Mar. 21, 2012 49
Examples of Transition Fault *
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Transition Fault Test with Scan
Mar. 21, 2012 50
Combinational Logic
SFF
SFF
Scan in
Scan out
Scan enable
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Two Time-Frame Model
Mar. 21, 2012 51
PI PO
line x1 line x1
1st time frame 2nd time frame
• There are 2 possible ways to model a transition fault
with a single stuck-at fault:– First, since most digital designs are sequential,
we can use a 2-time-frame circuit.
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Two-time-frame Model (Simplified):
Mar. 21, 2012 52
x x’
Detection test for xx’ slow-to-riseUseful for equivalence identification
x
x’
PI PO
s-a-1
Detection Test Generation
y
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Representation of a Transition Fault
Mar. 21, 2012 53
x’Slow to rise
x
x’x
MFF init. 1
x x’
00 00
01 00
10 10
11 11
01
MFF Model:
Clock
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Detection Test Generation
Mar. 21, 2012
PI
xx’
Using MFF Model:
y
PO
54
s-a-1
Test for y sa1 is also a test for xx’ slow to rise
MFF init. 1
0
1
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Detection Test Generation
Mar. 21, 2012 55
PI
xx’
MFF init. 1
y
PO
s-a-1
Test for y sa1 is also a test for xx’ slow to rise
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Single Copy Exclusive Test Generation
Mar. 21, 2012 56
x1 x1’
x2’x2MFF init. 1
s-a-0/1
0
1
MFF init. 0
0
1
POPI
Exclusive test for x1x1’ slow-to-fall and x2x2’ slow-to-rise:
y
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Single Copy Exclusive Test Generation
Mar. 21, 2012 57
x1 x1’
x2’x2
s-a-0/1
MFF init. 0
POPI
MFF init. 1
Simplified version:
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DC vs. Fault-Pair Coverage – s27
Mar. 21, 2012 58
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 170
0.2
0.4
0.6
0.8
1
1.2
0
5
10
15
20
25
30
35
40
45
50Diagnostic Coverage
DC
Distin. FP/Total FP
No. of Un. FP
Number of ATPG Vectors
Co
ve
rag
e a
s f
rac
tio
n
Nu
mb
er
of
Un
dis
tin
gu
ish
ed
F
au
lt P
air
s
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Experimental Results
CircuitNo. offaults
Detection test Generation Diagnostic test Generation
Det. Vect.
FC %
UnFlt Grp
DC %
Excl.Vect.
UnFltGrp
Largest Grp
DC%
s27 46 11 100.0 12 52.2 18 1 2 97.8
s298 482 44 79.9 62 62.4 34 39 4 70.1
s382 616 51 80.8 82 64.1 24 58 4 68.5
s1423 2364 102 92.9 280 79.3 106 182 5 84.1
s5378 6589 205 91.2 400 82.0 472 85 7 90.0
s9234 10416 377 92.8 1219 75.8 597 754 8 82.1
s13207 14600 480 89.1 1707 70.0 543 1392 11 74.1
s15850 17517 306 87.6 1961 71.2 486 1565 7 74.3
s35932 52988 75 99.0 3737 88.3 725 2867 4 90.2
s38417 47888 244 98.4 4090 87.5 1336 2883 8 91.0
s38584 56226 395 95.7 4042 86.7 1793 2440 7 90.3
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Experimental Results
Mar. 21, 2012 Zhang: PhD Defense 60
s38584No. offaults
Detection test Generation Diagnostic test Generation
Det. Vect.
FC %
UnFlt DC %
Excl.Vect.
UnFltDC%
CPUs
Previous 1000 2120 -- 14197 97.16* 583 12881 97.42* 174649
This work 56226 395 95.7 4042 86.7 1793 2440 90.3 14841
• Results compared to a recent work*
* Y. Higami, Y. Kurose, S. Ohno, H. Yamaoka, H. Takahashi, Y. Takamatsu, Y. Shimizu, and T. Aikyo, “Diagnostic Test Generation for Transition Faults Using a Stuck-at ATPG Tool,” in Proc. International Test Conf., 2009. Paper 16.3.
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Future Work
Mar. 21, 2012 61
• Implement 2-time frame model to get higher
DC.
• Targeting mixed/multiple fault models.
• Test set compaction using DATPG and diagnostic
fault simulation:
– E.g. reverse/random order simulation of
generated vector set, if no new faults are
detected AND no new fault groups are formed,
the vector in simulation can be dropped.
– Combined with ILP for further compaction.
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Future Work• Example of exclusive test generation for a stuck-at fault and a
bridging fault:
Mar. 21, 2012 62
b
cy
a
s-a-0
0
1
1
0 c’
da’
e e’
ab
c
de
1
1
1
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Future Work
Mar. 21, 2012 Zhang: PhD Defense 63
FaultsTest Syndrome
010 011 100 110 111
a sa0 0 0 0 1 0
a sa1 1 0 0 0 0
b sa1 0 0 1 0 0
c sa0 0 1 0 0 0
c sa1 1 0 1 0 0
e sa0 0 1 0 1 1
AND bridge (a, c)
0 1 0 1 0
Fault dictionary for previous example:
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64
Summary
• A diagnostic coverage metric is proposed.
• A new diagnostic ATPG system for stuck-at
fault is constructed.
• Experimental results show their
effectiveness.
• Extend the DATPG system for transition
fault.
• Experimental results show improved DC.
• Only conventional tools are used.Mar. 21, 2012 Zhang: PhD Defense
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References for Some Figures Used
• Acknowledgement:
* http://courses.ece.uiuc.edu/ece543/docs/
DelayFault_6_per_page.pdf (Slide 49)
* http://www.sciencephoto.com/media/347881/
enlarge (Slide 47)
* http://www.ami.ac.uk/courses/topics/0268_wb/
index.html (Slide 47)
* http://materials.usask.ca/images/photos/SEM-
6LevelCuChipP98.GIF (Slide 2)
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Publications• Y. Zhang and V. D. Agrawal, “Reduced complexity test generation algorithms for transition fault
diagnosis,” in International Conference on Computer Design (ICCD), Oct. 2011, pp. 96 -101.
• Y. Zhang and V. D. Agrawal, “A Diagnostic Test Generation System,” in Proc. International Test
Conf., 2010. Paper 12.3.
• Y. Zhang and V. D. Agrawal, “Diagnostic Test Generation and Fault Simulation Algorithms for
Transition Faults” in Proc. 20th North Atlantic Test Workshop, May, 2011
• Y. Zhang and V. D. Agrawal, “An Algorithm for Diagnostic Fault Simulation,” in Proc. 11th IEEE
Latin-American Workshop, 2010.
• Y. Zhang and V. D. Agrawal, “A Diagnostic Test Generation System,” in Proc. 19th North
Atlantic Test Workshop, May, 2010.
• Y. Zhang and V. D. Agrawal, “A Diagnostic Test Generation System and a Coverage Metric,” in
15th IEEE European Test Symp., May 2010.
• Y. Zhang and V. D. Agrawal, “On Diagnostic Test Generation for Stuck-at Faults,” in
preparation.
• Y. Zhang and V. D. Agrawal, “A Diagnostic ATPG System Targeting Multiple/Mixed Fault
Models,” in preparation.
Mar. 21, 2012 Zhang: PhD Defense 66
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Mar. 21, 2012 67
Thank youQuestions?
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