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SRI PADMAVATHI COLLEGE OF ENGINEERINGDepartment of Electronics and Communication Engineering
SUBJECT CODE : SUBJECT NAME : DIGITAL PRINCIPLES AND SYSTEM DESIGN.FACULTY NAME : Mr. S V DHARANI KUMARCLASS : II Yr/III Sem/ IT
OBJECTIVES
• To understand different methods used for the simplification of Boolean functions• To design and implement combinational circuits• To design and implement synchronous sequential circuits• To design and implement asynchronous sequential circuits• To study the fundamentals of VHDL / Verilog HDL
UNIT I BOOLEAN ALGEBRA AND LOGIC GATES 8
Review of binary number systems - Binary arithmetic – Binary codes – Boolean algebra and theorems - Boolean functions – Simplifications of Boolean functions using Karnaugh map and tabulation methods – Implementation of Boolean functions using logic gates.
UNIT IICOMBINATIONAL LOGIC 9
Combinational circuits – Analysis and design procedures - Circuits for arithmetic operations - Code conversion – Introduction to Hardware Description Language (HDL)
UNIT III DESIGN WITH MSI DEVICES 8
Decoders and encoders - Multiplexers and demultiplexers - Memory and programmable logic - HDL for combinational circuits
UNIT IV SYNCHRONOUS SEQUENTIAL LOGIC 10
Sequential circuits – Flip flops – Analysis and design procedures - State reduction and state assignment - Shift registers – Counters – HDL for Sequential Circuits.
UNIT V ASYNCHRONOUS SEQUENTIAL LOGIC 10
Analysis and design of asynchronous sequential circuits - Reduction of state and flow tables – Race-free state assignment – Hazards. ASM Chart.
TEXT BOOKS
1. M.Morris Mano, “Digital Design”, 3rd edition, Pearson Education, 2007.
REFERENCES
1. Charles H.Roth, Jr. “Fundamentals of Logic Design”, 4th Edition, Jaico Publishing House, Cengage Earning, 5th ed, 2005.
2. Donald D.Givone, “Digital Principles and Design”, Tata McGraw-Hill, 2007.6
Staff In-charge H.O.D
Principal
SRI PADMAVATHI COLLEGE OFENGINEERING
Department of Electronics and Communication Engineering
LESSON PLAN
STAFF NAME: S V Dharani Kumar DEPT : ECESUB CODE : SUBNAME: Digital Principles and System Design
Sl.NoTotal No.of
Hour
Required
Topics Book & Page No
UNIT-11. 1 Review of binary number systems, Binary Arithmetic 01/08/20112. 1 Binary Codes 02/08/2011\3. 1 Boolean Algebra and Theorems 03/08/20114. 1 Boolean Functions 04/08/20115. 2 Simplifications of Boolean Functions using Karnaugh
Map and Tabulation methods05/08/201108/08/2011
6. 2 Logic Gates 09/08/201110/08/2011
UNIT-27. 2 Combinational Circuits 11/08/2011
12/08/20118. 2 Analysis and Design Procedures 16/08/2011
17/08/20119. 2 Circuits for Arithmetic Operations 18/08/2011
19/08/201110. 2 Code Conversion 22/08/2011
23/08/201111. 1 Introduction to Hardware Description Language(HDL) 24/08/2011
UNIT-312. 2 Decoders and Encoders 25/08/2011
26/08/201113. 2 Multiplexers and Demuultiplexers 29/08/2011
30/08/2011
14. 2 Memory and Programmable logic 02/09/201106/09/2011
15. 2 HDL for Combinational Circuits 07/09/201108/09/2011
UNIT-416. 2 Sequential Circuits, Flip flops 09/09/2011
13/09/201117. 2 Analysis and Design procedures 14/09/2011
20/09/201118. 2 State Reduction and State Assignment 21/09/2011
22/09/201119. 1 Shift Registers 23/09/2011
20. 1 Counters 26/09/201121. 2 HDL for Sequential Circuits 27/09/2011
28/09/2011UNIT-5
22. 2 Analysis and Design of Asynchronous Sequential Circuits 29/09/201103/10/2011
23. 2 Reduction of State and Flow Tables 04/10/201105/10/2011
24. 2 Race – Free State Assignment 06/10/201107/10/2011
25. 2 Hazards 10/10/201111/10/2011
26. 2 ASM Chart 13/10/201114/10/2011
Staff In-charge H.O.D
Principal