development of quantum annealing technology at …talk2...1 q 2 q 3 q 4 q 5 q 6 q 7 ro ccjj lt ico...

Development of QuantumAnnealing Technology atD-Wave Systems

Trevor Lanting

November 29, 2017

Copyright © D-Wave Systems Inc.

Overview

I Why Quantum Annealing?I Processor Design and ManufacturingI Using the System

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Building a Large-Scale Quantum Technology

I scalability directlyinforms implementationdetails

I device design tightlycoupled with controlinfrastructure

I general in situ tunabilityrequired

I manufacturing→leverage CMOStechniques

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Quantum Annealing - What is it?GOAL: �nd ground state or low energy con�gurations of the Ising model

I quantum annealing proposed as an algorithm for �nding ground statecon�gurations of this model PRE 58, 5355 (1998)

I H(t) = ∆(t)Hinitial + E(t)HtargetI begin with ∆(t)� E(t), evolve Hamiltonian to ∆(t)� E(t)

problem variables

Ene

rgy

globalminimum

localminimum

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Quantum Annealing - Why?

Build systems expertise in developing a large-scale commercially-viable quantumtechnology

I slow control over annealing time scales→ nofast microwaves routed to every device

I QA Hamiltonian is “on” during the entireevolution

I exploiting tendency of systems to evolve to lowenergy con�gurations

I persistent entanglement even at equilibriumI Phys. Rev. X 4, 021041 (2014)

0.6 0.65 0.70

1

2

3

4

5

6

7

E−E0(GHz)

Φccjj / Φ0

kBT

Γ 1 Γ ∼ 1 Γ 1

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Quantum Annealing - Why?

What can you do with an algorithm that returns optimal or low energy solutions of aprogrammable Ising spin system? almost everything!

Kochenberger, G. et al, J Comb Optim 28.1 (2014): 58-81

I machine learningI satis�abilityI materials simulation

HQSG(t) = E(t)[−∑

ihiσ

(i)z + ∑

i,j>iJijσ

(i)z σ

(j)z

]− ∆(t)∑

iσ(i)x . (1)

hi and Jij are in situ tunable→ huge space of problems can be mapped onto thisHamiltonian

e.g. T. Kadowaki and H. Nishimori, PRE, 58(5), pp. 5355-5363, (1998),or E. Farhi, et al., Science 292, 472 (2001) for details.

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Flux Qubit→ Quantum Ising spin

Φ 2

Φ 1

Josephsonjunction

a

"spin-down" circulating current

"spin-up" circulating currentΦ1X

Φ2X

U

δU

Φ1

2h

b

Bll

Bt

Hq = − 12

[εqσz + ∆qσx

]HQS = −gµB

[B||σz + Btσx

]where εq = 2

∣∣Ipq∣∣Φx

q = −hiσz − 12 ∆σx

Parameter Qubit Quantum Ising SpinBias Energy εq/2 gµBB|| or h

Tunneling Energy ∆q/2 gµBBtMoment Ip

q gµB

Binary information encoded in �ux basis: |0〉 → |↓〉 and |1〉 → |↑〉.6 / 19


A Scalable QA Processor Architecture

In this architecture, a 2000 Q processor requires ∼ 20,000 bias signals,I only 150 di�erential biased pairs passed to the chip via wirebondsI Local �ux biases applied by on-chip �ux-DAC’s

Use on-chip DAC’s to:I Program {hi} ,

{Jij}

I homogenize devicesI coerce Ising behaviour

X/Y/Z addressing scheme uses 80 wires to address 20,000 DAC “loops”See Bunyk et al., arXiv:1401.5504 (2014),

or Johnson et al., Supercond. Sci. Technol. 23, 065004 (2010)

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A Scalable QA Processor Architecture

In this architecture, a 2000 Q processor requires ∼ 20,000 bias signals,I only 150 di�erential biased pairs passed to the chip via wirebondsI Local �ux biases applied by on-chip �ux-DAC’s

Use on-chip DAC’s to:I Program {hi} ,

{Jij}

I homogenize devicesI coerce Ising behaviour

X/Y/Z addressing scheme uses 80 wires to address 20,000 DAC “loops”See Bunyk et al., arXiv:1401.5504 (2014),

or Johnson et al., Supercond. Sci. Technol. 23, 065004 (2010)8 / 19


Schematic layout of an eight qubit unit cell

q0

RO

CCJJ

LT

IPC

I Lay out a qubit with a stretched body of superconducting wire.

I Replicate four vertical qubits q0 → q3 spaced evenly apart.I Overlay four horizontal qubits q4 → q7.I Overlay internal couplers (ICO) at intersections of qubit bodies.I Overlay portions of external couplers (XCO) at extrema of qubits.

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q0 q1 q2 q3

RO

CCJJ

LT

IPC

I Lay out a qubit with a stretched body of superconducting wire.I Replicate four vertical qubits q0 → q3 spaced evenly apart.

I Overlay four horizontal qubits q4 → q7.I Overlay internal couplers (ICO) at intersections of qubit bodies.I Overlay portions of external couplers (XCO) at extrema of qubits.

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q0 q1 q2 q3q4

q5

q6

q7

RO

CCJJ

LT

IPC

I Lay out a qubit with a stretched body of superconducting wire.I Replicate four vertical qubits q0 → q3 spaced evenly apart.I Overlay four horizontal qubits q4 → q7.

I Overlay internal couplers (ICO) at intersections of qubit bodies.I Overlay portions of external couplers (XCO) at extrema of qubits.

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q0 q1 q2 q3q4

q5

q6

q7

RO

CCJJ

LT

ICO

IPC

I Lay out a qubit with a stretched body of superconducting wire.I Replicate four vertical qubits q0 → q3 spaced evenly apart.I Overlay four horizontal qubits q4 → q7.I Overlay internal couplers (ICO) at intersections of qubit bodies.

I Overlay portions of external couplers (XCO) at extrema of qubits.

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q0 q1 q2 q3q4

q5

q6

q7

RO

CCJJ

LT

ICO

XCO

XCO

IPC

I Lay out a qubit with a stretched body of superconducting wire.I Replicate four vertical qubits q0 → q3 spaced evenly apart.I Overlay four horizontal qubits q4 → q7.I Overlay internal couplers (ICO) at intersections of qubit bodies.I Overlay portions of external couplers (XCO) at extrema of qubits.

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The D-Wave 2000Q Processor

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Manufacturing

I leverage decades of development in semiconductor manufacturingI integration stack→ maps on to standard CMOSI immediate manufacturing scalabilityI targeted research program evaluating new materials→ lowering environmental

noise

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Manufacturing - 2000Q technology

Most complex superconducting integrated circuit ever built

I 2048 qubitsI 6016 couplersI > 128, 000 Josephson

junctionsI 20, 000 on-chip DACsI 106 interlayer vias

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QA→ Optimization

https://www.dwavesys.com/sites/default/�les/14-1001A_tr_Optimization_with_Clause_Problems.pdf13 / 19


QA→ Optimization

Selected publications from external users of QA technologyI “Solving a Higgs optimization problem with quantum annealing for machine

learning”I http://www.nature.com/nature/journal/v550/n7676/full/nature24047.html

I “Tra�c �ow optimization using a quantum annealer”I https://arxiv.org/abs/1708.01625

I “A deceptive step towards quantum speedup detection”I https://arxiv.org/abs/1711.01368

I “Graph Partitioning using Quantum Annealing on the D-Wave System”I https://arxiv.org/abs/1705.03082v1

I “What is the Computational Value of Finite Range Tunneling?”I Phys. Rev. X 6, 031015 (2016)

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QA→ sampling many good solutions quickly

Ener

gy

Time (ms)“Benchmarking a quantum annealing processor with the time-to-target metric”,J. King et al., arXiv:1508.05087 [quant-ph]

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QA→ machine learningI generating low energy samples

quickly from programmabledistribution very powerful tool

I a machine learning model calledBoltzmann Machine→probabilistic technique that relatesprobabilities to energies

I During the learning process, onemust sample from lowest points ina complex energy landscape.

I Landscapes can often have tallthin energy barriers andnon-trivial interactions betweenvariables

“Quantum annealing amid local ruggedness and global frustration”, J. King, et al., 201616 / 19


QA→ machine learningQA hardware returns better models with fewer updates

“Benchmarking Quantum Hardware for Training of Fully Visible Boltzmann Machines”,

D. Korenkevych, et al., arXiv:1611.04528 [quant-ph]

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Summary

I superconducting quantum annealing processors→ path to large scale quantumtechnology

I design of processor building blocks tightly coupled to control and programminginfrastructure→ need a systems approach in building technology

I broad base of users developing algorithms on current generation of systemsI using QA systems to quickly generate low energy samples from programmable

distributions→ accelerate machine learning

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development of quantum annealing technology at …talk2...1 q 2 q 3 q 4 q 5 q 6 q 7 ro ccjj lt ico...

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