development of 3d silicon detectors at itc-irst claudio piemonte itc-irst trento [email protected]

Development of 3D silicon detectors at ITC-irst

Claudio PiemonteITC-irst [email protected]

C. Piemonte IFAE 20 - 04 - 2006 Pavia

OutlineOutline

• 3D detectors: concept & status

• ITC-irst activity on 3D:

• Single-Type Column 3D detector concept

• Simulation, Design, Process and First Characterization

• Future Activity


Standard planar detectors (1)Standard planar detectors (1)

n--substrate

n+ - bulk contact

p+

E fieldNormal operation:bulk is over-depleted =>electric field separates the pairsand forces the carriers to drift

For uniform charge depositioncarriers are collected one by one

Planar devices:junctions are located closeto surface of the silicon bulk

~1m

~300m

~1m

-

+-

+V1<V2

12


Standard planar detectors (2)Standard planar detectors (2)

Collection time = time needed to collect the last carrier (hole)

It depends on: 1. bias voltage

2. substrate thickness

0.E+00

1.E-08

2.E-08

3.E-08

4.E-08

5.E-08

6.E-08

7.E-08

0 100 200 300 400 500

Voltage (V)

Co

llect

ion

tim

e (

s)

electrons

holes

Rough estimation of the collection time vs bias voltage for electrons and holes in a 300m thick subst.

We can reduce the collection time thinning the substratebut we have smaller signal!!


3D detectors - concept3D detectors - concept

Proposed by Parker et al. NIMA395 (1997)

n-columns p-columns

wafer surface

ionizing particle

n-type substrate

All the carriers are collectedat the same time!


Designing structure with small electrode pitch (i.e. 50m):

• very low full depletion voltage• short collection distance

more radiation hard than planar detectors!!

The distance between the electrodes dependsonly on the detector layout.

The collection time is independent from the substrate thickness!

3D detectors - advantages3D detectors - advantages

3D detectors can find applicationin high energy physics experimentswhere radiation damage is a concern


1) Electrodes are dead regions

2) Non standard fabrication process

- long R&D needed - concerns on the yield

3D detectors - disadvantages3D detectors - disadvantages

The problem can be partiallysolved tilting the detector

no signal from this particle track


Groups involved in 3DGroups involved in 3D

• SLAC (Sherwood Parker)

• double columns filled with doped polysilicon, holes all the way through the wafer thickness (150m)

• University of Glasgow

• double columns: one Schottky & one diffused, deep hole

• VTT (Finland)

• Semi 3D: single column boron doped on n-type Si; limited depth (150-200micron)

• ITC-irst

•Single-Type-Column : single column phosphorus doped on p-type Si; limited depth (150-200micron).

workshop on 3D held in february 2006 in Trento : http://tredi.itc.it/


3D detectors @ ITC-irst3D detectors @ ITC-irst

Development of 3D sensors at ITC-irst started almost 2 years ago in collaboration with INFN.

1.Simulations of 3D-STC detectors;

2.Technology used in the first two fab. runs;

3.Electrical characterization of first prototypes;

4.Future Activity on 3D.


Single-Type-Column 3D detectors - conceptSingle-Type-Column 3D detectors - concept

n+ n+n+ n+n+ n+

ionizing particle

electrons are swept away by the transversal field

holes drift in the central region and diffuse towards p+ contact

p-type substraten+ electrodes

Uniform p+ layer

NIM A 541 (2005) 441–448 “Development of 3D detectors ..” C. Piemonte et al

Main features of proposed 3D-STC:• column etching and doping performed only once• holes not etched all through the wafer• bulk contact is provided by a backside uniform p+ implant

Simplification of the fabrication process


Depletion mechanismDepletion mechanism1) Vbias=0V 2) Vbias=2V 3) Vbias=5V 4) Vbias=20V

Do not consider the hot spot in the pictures,it is the charge released by a particle.

DRAWBACK of 3D-stc: once full depletion is reached it is not possible to increase the electric field between the columns


In the worst case of a track centered the central region, 50% of the charge is collected at t ~ 300ns

Outside this region, 50% of the charge is collected within 1ns.

Signal & Charge collectionSignal & Charge collection

1 2

34

(25,25)(20,20)(10,10)

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1E-12 1E-11 1E-10 1E-09 1E-08 1E-07 1E-06 1E-05 1E-04Time (s)

Col

lect

ed c

harg

e (a

.u.)

250um_25-25

250um_20-20

250um_10-10

Same Vbias, different impact point

charge collectedis ¼ for interactionin the middle point

First phaseTransversal movement (fast)

Second phaseHole vertical movement(slow)

e h

250

m50

m

50m


Mask layoutMask layout

Small version of strip detectors

Planar and 3D test structures

1. “Low density layout” to increase mechanical robustness of the wafer

2. Strip detector = “easy” to electrical test

“Large” strip-like detectors


Strip detectors - layoutStrip detectors - layout

metal

p-stop

hole

Contact opening

n+

Inner guard ring (bias line)

Different strip-detector layouts:• Number of columns from 12000 to 15000 • Inter-columns pitch 80-100 m• Holes Ø 6 or 10 m


n+ diffusion

contact

metal

oxide

hole

Deep RIE performed at CNM, Barcelona (it

will be available at IRST within this year) Wide superficial n+ diffusion around the hole

to assure good contact Passivation of holes with oxide

3D process3D process

hole

Hol

e de

pth

~ 1

20μ

m

hole metal strip

Si: High Resistivity, p-type, <100> Surface isolation: p-stop or p-spray Holes are “empty”


Current distribution @ 40V of 70 different devices

Good process yield

Strip detectors – IV measurementsStrip detectors – IV measurements

1.0E-10

1.0E-09

1.0E-08

1.0E-07

1.0E-06

1.0E-05

0 50 100 150 200Vbias [V]

I lea

k [A

]

p-spray

p-stop

Bias line

Guard ring

Number of columns per detector: 12000 - 15000

0

5

10

15

20

25

30

0 5 10 15 20 25 30 35 40 45 50 >50

I bias line [nA]

Det

ecto

rs c

ou

nt

Average leakage Leakage current < 1pA/column


3D diode – CCE measurements3D diode – CCE measurements

• CCE @ 0V ≈ tc/tw

• 100% CCE @ low voltages

• Vdep(CCE)<Vdep(CV)

tc

tw

a b• Substrate thickness = 500m• Column depth = 150m

Carlo Tosi, Mara Bruzzi, Antonio De SioINFN and University of Florence


On going activityOn going activity

End second run (may 2006)

University of Glasgow (UK): CCE measurements with on 3D diodes and short strips

SCIPP (USA): CCE measurements on large strips

INFN Firenze (Italy): CCE meas with on 3D diodes;

University of Freiburg (D); measurements on short strips

Ljubljana: TCT and neutron irradiation


New process (within the year)New process (within the year)

Actual Process• p-type Si• hole depth ~ 200m• no hole filling• single column• single side

New Process• n-type Si• DRIE ~ 250m• no hole filling• double columns• double side


New LayoutNew Layout

Actual Layout(basically microstrip)

New Layout(mainly Pixel)

p-diff n-diff

bump region

metal


ConclusionConclusion

• 3D detectors are extremely interesting devices for high luminosity

colliders (inner tracking layers).

• R&D is ongoing at ITC-irst:

- fabricated first prototypes of 3D-stc detectors with excellent

results

- within the year double column detectors will be ready.

development of 3d silicon detectors at itc-irst claudio piemonte itc-irst trento [email protected]

Documents

d detectors

d silicon detectors

d diode cce measurements

silicon bulk

pacolumn slide

d detector concept simulation

bulk contact p

line na detectors