Design of cmos based ring oscillator

By

Ushaswini Chowdary.M

14204115

INTRODUCTION

• Millions of transistors can be integrated on a single chip so

that system on chip (SoC) can be designed.

• As ring oscillator is a part of analog circuit design, so is the

basic type of oscillator used in radio frequency integrated

circuit design.

• In comparison with LC voltage-controlled oscillator (VCO)

ring oscillators have the advantage of small size, high

integration, multiphase outputs, and wide oscillation range.

• These multiphase signals are used by communication

systems,such as phase-array transceivers, clock data recovery

circuits.

• Circuits such as phase-locked-loops (PLLs), delay-

lockedloops (DLLs), and high-speed input output modules are

becoming important in (SoC) designs.

• For such circuits, timing measurements and specifications,

such as jitter in the range of a few picoseconds are frequent.

• Ring oscillator is a closed loop comprising of the odd number

of stages of identical inverters which forms a feedback circuit.

• This feedback from its last output to the input causes the

oscillations. Even number of transistors in a circular chain

feedback loop cannot be used to design ring oscillator because

the last output of the inverter is same as the input.

• The even stage design can be considered as the memory

element and acts as basic building block of SRAM

INVERTER

• A single stage inverter consists of a PMOS and an NMOS

connected through gate to acquire the single input.

• When high input is given at its input NMOS becomes ON and

PMOS becomes OFF. Since the source of NMOS transistor is

connected to ground so that it gives the low output at its drain

therefore the output of inverter is inverted and becomes low.

Similarly when an inverter input is low, output becomes high

as PMOS is at high voltage.

RING OSCILLATOR (3 stages)

RING OSCILLATOR (9 stages)

• The most important factor in ring oscillator is gate delay

because in devices fabricated with MOSFET, gate cannot

switch immediately.

• The gate capacitance needs to be charged before current flows

between drain and source so that every inverter takes time to

give output.

• Therefore increase in the number of stages of ring oscillator

increase the gate delay.

• Odd number of inverter stages used to give the effect of single

inverter amplifier with a negative feedback gain of greater than

1 so that the output will be in opposite direction to the input

and it will be amplified with an amount more than the input.

• Odd number of inverter stages used to give the effect of single

inverter amplifier with a negative feedback gain of greater than

1 so that the output will be in opposite direction to the input

and it will be amplified with an amount more than the input.

DELAY

• Propagation delay in ring oscillator is defined as the time

difference between input and output.

• JITTER AND PHASE NOISE

• Phase noise is the representation of random fluctuations in

frequency domain which is caused by the jitter.

• Jitter is significant and usually undesired factor in

communication systems and in clock recovery circuits, it is

called timing jitter.

• It may be caused due to the electromagnetic interference

(EMI) and crosstalk with other signals.

• Jitter affects the performance of the device, can cause

undesired affect in audio signals and loss in the transmitted

data between devices .

• Jitter can be divided into period jitter and cycle to cycle jitter.

• Period jitter:

• It is the difference between any one clock period and an ideal

clock period. It tends to be important in synchronous circuits.

• Cycle to cycle jitter:

• It is the difference between the duration of two adjacent clock

periods. It can be important for clock generation circuits.

Simulation Results

• According to the operation

of ring oscillator, when

input voltage is applied at

once, oscillation starts

spontaneously.