design and development of thin double side silicon microstrip sensors for cbm experiment
DESCRIPTION
Design and development of thin double side silicon microstrip sensors for CBM experiment. Mikhail Merkin Skobeltsyn Institute of Nuclear Physics Moscow State University. 1-st CBM - Russia - JINR Collaboration Meeting May 19-22 , 2009 , Dubna , Russia. - PowerPoint PPT PresentationTRANSCRIPT
Design and development of thin double side silicon
microstrip sensors for CBM experiment
Mikhail MerkinSkobeltsyn Institute of Nuclear Physics
Moscow State University
1-st CBM-Russia-JINR Collaboration Meeting May 19-22, 2009, Dubna, Russia1-st CBM-Russia-JINR Collaboration Meeting May 19-22, 2009, Dubna, Russia
1-st CBM-Russia-JINR Collaboration Meeting May 19-22, 2009, Dubna, Russia
Sensor Geometry
– According simulation optimal sensors size for central part, because very hard radiation environment and high multiplicity - 40 • 60 mm2
– Strip pitch for both sides - 58 μm– Stereoangle - ±7.5о
– Number of strips on both sides - 1024 – Number of readout chips for both sides -
8
1-st CBM-Russia-JINR Collaboration Meeting May 19-22, 2009, Dubna, Russia
Sensor N-side Contact Pads
1-st CBM-Russia-JINR Collaboration Meeting May 19-22, 2009, Dubna, Russia
N-side poly-Si resistors
1-st CBM-Russia-JINR Collaboration Meeting May 19-22, 2009, Dubna, Russia
N-side p-stops configuration
1-st CBM-Russia-JINR Collaboration Meeting May 19-22, 2009, Dubna, Russia
N-side Guard Rings
1-st CBM-Russia-JINR Collaboration Meeting May 19-22, 2009, Dubna, Russia
Sensor P-side 1st and 2nd metal
1-st CBM-Russia-JINR Collaboration Meeting May 19-22, 2009, Dubna, Russia
Sensor P-side 1st and 2nd metal details
1-st CBM-Russia-JINR Collaboration Meeting May 19-22, 2009, Dubna, Russia
P-side Guard Rings
1-st CBM-Russia-JINR Collaboration Meeting May 19-22, 2009, Dubna, Russia
Results
•Number of masks:•N-side – 8•P-side – 9
•Estimated production time - 3 months + 1 month for masks production.
1-st CBM-Russia-JINR Collaboration Meeting May 19-22, 2009, Dubna, Russia
Expected
• Full Depletion Voltage (FDV) - <50 V• Working voltage – 70 - 250 V• Dark current at 100 V – < 15 nА/см2
• AC capacitance - >10 pF/см• Capacitors breakdown voltage -
>170 V• Bias resistor value - 1.0 ± 0.4 MOhm• Number of bad strips - <0.5%/side
1-st CBM-Russia-JINR Collaboration Meeting May 19-22, 2009, Dubna, Russia
Last
• This work have been done within CBM-MPD STS Consortium and supported by ISTC, see Yu. Murin presentation
1-st CBM-Russia-JINR Collaboration Meeting May 19-22, 2009, Dubna, Russia