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Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

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Page 1: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Department of Electronics

Advanced Information Storage

02

Atsufumi Hirohata

16:00 10/October/2013 Thursday (V 120)

Page 2: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Contents of Advanced Information Storage

Lectures : Atsufumi Hirohata ([email protected], P/Z 023)

Advancement in information storages (Weeks 2 ~ 9)

[17:00 ~ 18:00 Mons. (AEW 105) & 16:00 ~ 17:00 Thus. (V 120)]

No lectures on Week 6 + Mon., Week 9

Replacements (tbc) : Week 4, 15:00 on Mon. (P/L 005),

Week 5, 15:00 on Mon. (P/L 005) & Week 7, 10:00 on Mon. (D/L 002)

I. Introduction to information storage (01 & 02)

II. Optical information storages (03 & 04)

III. Magnetic information storages (05 ~ 10)

IV. Solid-state information storages (11 ~ 15)

Practicals : (1/2 marks in your mark)

Analysis on magnetic & solid-state storages

[Weeks 2 ~ 5, 10:00 ~ 12:00 Fri. (York JEOL Nanocentre),

Weeks 6 ~ 10, 10:00 ~ 12:00 Fri. (P/Z 011)]

Laboratory report to be handed-in to the General Office (Week 10).

Continuous Assessment : (1/2 marks in your mark)

Assignment to be handed-in to the General Office (Week 10).

V. Memories and future storages (16 ~ 18)

Page 3: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Quick Review over the Last Lecture

Von Neumann’s model :

• CPU

• Input

• Output

• Working storage

• Permanent storage

Bit / byte :

• 1 bit :

• 2 1 = 2 combinations

• 1 digit in binary number

• 1 byte (B) = 8 bit

Memory access :

* http://testbench.in/introduction_to_pci_express.html;

Page 4: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

02 Binary Data

• Binary numbers

• Conversion

• Advantages

• Logical conjunctions

• Adders

• Subtractors

Page 5: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Bit and Byte

Bit :

“Binary digit” is a basic data size in information storage.

1 bit : 2 1 = 2 combinations ; 1 digit in binary number

2 2 2 = 4 2

3 2 3 = 8 3

4 2 4 = 16 4

: : : :

Byte :

A data unit to represent one letter in Latin character set.

1 byte (B) = 8 bit

1 kB = 1 B × 1024

1 MB = 1 kB × 1024

: :

Page 6: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Binary Numbers

The modern binary number system was discovered by Gottfried Leibniz in 1679 : *

* http://www.oracle.com/

Decimal notation Binary notation

0 0

1 1

2 10

3 11

4 100

5 101

6 110

7 111

8 1000

: :

Page 7: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Conversion to Binary Numbers 1

For example, 1192 :

2 ) 1192 1192 = 20 × 1192

2 ) 586…0 1192 = 21 × 586 + 20 × 0

2 ) 293…0 1192 = 22 × 293 + 21 × 0 + 20 × 0

2 ) 146…1 1192 = 23 × 146 + 22 × 1 + 21 × 0 + 20 × 0

2 ) 73…0 1192 = 24 × 73 + 23 × 0 + 22 × 1 + 21 × 0 + 20 × 0

2 ) 36…1 1192 = 25 × 36 + 24 × 1 + 23 × 0 + 22 × 1 + 21 × 0 + 20 × 0

2 ) 18…0 1192 = 26 × 18 + 25 × 0 + 24 × 1 + 23 × 0 + 22 × 1 + 21 × 0

+ 20 × 0

2 ) 9…0 1192 = 27 × 9 + 26 × 0 + 25 × 0 + 24 × 1 + 23 × 0 + 22 × 1

+ 21 × 0 + 20 × 0

2 ) 4…1 1192 = 28 × 4 + 27 × 1 + 26 × 0 + 25 × 0 + 24 × 1 + 23 × 0

+ 22 × 1 + 21 × 0 + 20 × 0

2 ) 2…0 1192 = 29 × 2 + 28 × 0 + 27 × 1 + 26 × 0 + 25 × 0 + 24 × 1

+ 23 × 0 + 22 × 1 + 21 × 0 + 20 × 0

2 ) 1…0 1192 = 210 × 1 + 29 × 0 + 28 × 0 + 27 × 1 + 26 × 0 + 25 × 0

+ 24 × 1 + 23 × 0 + 22 × 1 + 21 × 0 + 20 × 0

2 ) 0…1 1192 10 = 10010010100 2

Page 8: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Conversion to Binary Numbers 2

For example, 0.1 :

0.1 0.

0.1 × 2 = 0.2 < 1 0.0

0.2 × 2 = 0.4 < 1 0.00

0.4 × 2 = 0.8 < 1 0.000

0.8 × 2 = 1.6 > 1 0.0001

0.6 × 2 = 1.2 > 1 0.00011

0.2 × 2 = 0.4 < 1 0.000110

: :

0.1 10 = 0.00011 2

Page 9: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Why Are Binary Numbers Used ?

In order to represent a number of “1192” by ON / OFF lamps :

Binary number : 10010010100 2 (11 digits = 11 lamps)

Decimal number : 1192 10 (4 digits × 9 = 36 lamps)

Similarly, Ternary number : 1122011 3 (7 digits × 2 = 14 lamps)

1192 = 729 + 243 + 162 + 54 + 0 + 3 + 1

= 36 × 1 + 35 × 1 + 34 × 2 + 33 × 2 + 32 × 0 + 31 × 1 + 30 × 1

Quaternary number : 1122011 3 (7 digits × 2 = 14 lamps)

1192 = 1024 + 0 + 128 + 32 + 8 + 0

= 45 × 1 + 44 × 1 + 43 × 2 + 42 × 2 + 41 × 2 + 40 × 0

Binary numbers use the minimum number of lamps (devices) !

Page 10: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Mathematical Explanation

In a base-n positional notation, a number x can be described as :

x = n y (y : number of digits for a very simple case)

In order to minimise the number of devices, i.e., n × y,

ln(x) = y ln(n)

Here, ln(x) can be a constant C,

C = y ln(n)

y = C / ln(n)

By substituting this relationship into n × y,

n × y = C n / ln(n)

To find the minimum of n / ln(n),

[n / ln(n)]’ = {ln(n) – 1} / {ln(n)} 2

Here, [n / ln(n)]’ = 0 requires

ln(n) – 1 = 0

Therefore, n = e (= 2.71828…) provides the minimum number of devices.

Page 11: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Logical Conjunctions 1

AND :

Venn diagram of A∧B

Truth table

* http://www.wikipedia.org/

Input Output

A B A∧B

True (T) (1) T (1) T (1)

False (F) (0) T (1) F (0)

T (1) F (0) F (0)

F (0) F (0) F (0)

Logic circuit

A B

Page 12: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Logical Conjunctions 2

OR :

Venn diagram of A∨B

Truth table

* http://www.wikipedia.org/

Input Output

A B A∨B

T (1) T (1) T (1)

F (0) T (1) T (1)

T (1) F (0) T (1)

F (0) F (0) F (0)

Logic circuit

A B

Page 13: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Logical Conjunctions 3

NOT :

Venn diagram of ¬A (Ā)

Truth table

* http://www.wikipedia.org/

Input Output

A Ā

T (1) F (0)

F (0) T (1)

Logic circuit

A Ā

Page 14: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Additional Logical Conjunctions 1

Venn diagram of A↑B

Truth table

* http://www.wikipedia.org/

Input Output

A B A↑B

T (1) T (1) F (0)

F (0) T (1) T (1)

T (1) F (0) T (1)

F (0) F (0) T (1)

Logic circuit

A B

NAND = (NOT A) OR (NOT B) = NOT (A AND B) :

Page 15: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Additional Logical Conjunctions 2

NOR = NOT (A OR B) :

Venn diagram of AB

Truth table

* http://www.wikipedia.org/

Input Output

A B AB

T (1) T (1) F (0)

F (0) T (1) F (0)

T (1) F (0) F (0)

F (0) F (0) T (1)

Logic circuit

A B

NOR can represent all the logical conjunctions :

•NOT A = A NOR A

•A AND B = (NOT A) NOR (NOT B) = (A NOR A) NOR (B NOR B)

•A OR B = NOT (A NOR B) = (A NOR B) NOR (A NOR B)

Page 16: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Additional Logical Conjunctions 3

XOR = Exclusive OR :

Venn diagram of A⊕B

Truth table

* http://www.wikipedia.org/

Input Output

A B A⊕B

T (1) T (1) F (0)

F (0) T (1) T (1)

T (1) F (0) T (1)

F (0) F (0) F (0)

Logic circuit

A B

Page 17: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Half Adder

Simple adder for two single binary digits :

* http://www.wikipedia.org/

XOR for the sum (S)

AND for the carry (C), which represents the overflow for the next digit

Truth table

Input Output

A B S C

1 1 0 1

0 1 1 0

1 0 1 0

0 0 0 0

Page 18: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Full Adder

Adder for two single binary digits as well as values carried in (C in) :

* http://www.wikipedia.org/

2 half adders for sum (S)

Additional OR for the carry (C out),

which represents the overflow

for the next digit

Truth table

Input Output

A B C in S C out

1 1 1 1 1

0 1 1 0 1

1 0 1 0 1

0 0 1 1 0

1 1 0 0 1

0 1 0 1 0

1 0 0 1 0

0 0 0 0 0

Page 19: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Half Subtractor

Simple subtractor for two single binary digits, minuend (A) and subtrahend (B) :

* http://www.wikipedia.org/

XOR for the difference (D)

NOT and AND for the borrow (Bor), which is the borrow from the next digit

Truth table

Input Output

A B D Bor

1 1 0 0

0 1 1 1

1 0 1 0

0 0 0 0

A

BD

Bor

Page 20: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Full Subtractor

Subtractor for two single binary digits as well as borrowed values carried in (Bor in) :

* http://www.wikipedia.org/

2 half subtractor for difference (D)

Additional OR for the borrow (Bor out),

which is the borrow from the next

digit

Truth table

Input Output

A B Bor in D Bor out

1 1 1 1 1

0 1 1 0 1

1 0 1 0 0

0 0 1 1 1

1 1 0 0 0

0 1 0 1 1

1 0 0 1 0

0 0 0 0 0

Page 21: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Information Processing

For data processing, two distinct voltages are used to represent “1” and “0” :

* http://www.wikipedia.org/

Low level (1) and high level (2) voltages

Voltages used :

Devices Low voltage High voltage

Emitter-coupled logic (ECL)

- 5.2 ~ 1.175 V 0 ~ 0.75 V

Transistor-transistor logic (TTL)

0 ~ 0.8 V 2 ~ 4.75 (or 5.25) V

Complementary metal-oxide-

semiconductor (CMOS)

0 ~ V DD / 2

V DD / 2 ~ V DD

(V DD = 1.2, 1.8, 2.4, 3.3 V etc.)

Page 22: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Emitter-Coupled Logic

In 1956, Hannon S. Yourke invented an ECL at IBM : *

* http://www.wikipedia.org/

High-speed integrated circuit, differential amplifier, with bipolar transistors

Page 23: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Transistor-Transistor Logic

In 1961, James L. Buie invented a TTL at TRW : *

* http://www.wikipedia.org/

Integrated circuit, logic gate and amplifying functions with bipolar transistors

Page 24: Department of Electronics Advanced Information Storage 02 Atsufumi Hirohata 16:00 10/October/2013 Thursday (V 120)

Complementary Metal-Oxide-Semiconductor

In 1963, Frank Wanlass patented CMOS : *

* http://www.wikipedia.org/

Integrated circuit with low power consumption using complementary MOSFET