Dedicated Peripheral Interface Device (Introduction to 8255)

Dr A SahuDept of Computer Science & Engineering

IIT Guwahati

Hierarchy of I/O Control Devices8155

I/O + Timer

8255I/O

8253/54Timer

2 Port (A,B), No BidirectionalHS mode (C)4 mode timer

2 Port (A,B)A is BidirectionalHS mode (C)Extra controls

6 mode timer

8259 Interrupt controller

8237DMA controller

8251Serial I/O USART

controller

Outline• 8155 I/O Interface & Timer – Dedicated I/O interface (8255)– Dedicated Timer (8254/8253)

• 8255 Ports and mode of operations• Interfacing A/D Converter using Handshake

mode using 8255

8155 Features• IO Capability:

– 2kbits static RAM 256x8 – 2 programmable 8 bit I/O ports – 1 programmable 6 bit I/O port

• Timer Capability:– 1 programmable 14 bit binary

counter/timer – 4 Modes

RAM

PortA

PortB

PortC

TimerMSB

LSB

PA0-PA7

PB0-PB7

PC0-PC5

Timer Out

Reset inRDWR

ALE

CEIO/M

AD0-AD7

Timer CLK

Mode 00Mode 01Mode 10Mode 11

N/2 N/2

N/2 N/2 N/2N/2

N

N N

D7 D6 D5 D4 D3

D2 D1 D0

Timer Command

IEB IEA PC PB PA

ALT

D3

D2

PC5 PC4 PC3 PC2 PC1 PC0

1 0 0 IN IN IN IN IN IN

2 0 1 OUT OUT OUT OUT OUT OUT

3 1 0 OUT OUT OUT STBA BFA INTRA

4 1 1 STBB BFB INTRB STBA BFA INTRA

Expanded Block Diagram

3 to 8 Decoder

CWR

PortA

PortB

PortC

TimerMSB LSB

Latch

Clock for timer

PA0-PA7

PB0-PB7

PC0-PC5

Timer Out

A0

A1

A2ALE

AD0-AD7 A0-A7

D7-D0

012345

CEb

A2 A1 A0 Port (ALE high, AD0=A0)

0 0 0 Command/Status Register

0 0 1 PA

0 1 0 PB

0 1 1 PC

1 0 0 Timer LSB

1 0 1 Timer MSB

Group AControl

Group BControl

ReadWrite

Control Logic

DataBus

Buffer

Gr APort A

(8)

Gr APort C(H 4)

Gr BPort C(L 4)

Gr BPort B

(8)

I/O PA7-PA0

I/O PC7-PC4

I/O PC3-PC0

I/O PB7-PB0

8 bit Internal Data Bus

Bi directional Data BusD7-D0

RDb

WRb

A1A0RESET

CSb

Block Diagram of 8255CSb A1 A0 Sel0 0 0 Port A0 0 1 Port B0 1 0 Port C0 1 1 CRW

Ports & Modes in 8255

Port CD7 D6 D5 D4 D3 D2 D1 D

BSR ModeBit Set/Reset

8255

Port B

CU CL

Port A

I/O Mode

Mode 0Simple I/O for PortsA, B & C

Mode 1HS mode for Ports A and/or B

Port C bits are used for HS

Mode 2BidirectionalData mode for Port A

B can in mode 0/1

Port C bits are used for HS

BSR ModeBit Set/Reset

For Port CNo Effect on I/O Mode

0/1

Ports & Modes in 8255 : Control register

D7 D6 D5 D4 D3 D2 D1 D0

7 6 5 4 3 2 1 0

Port A – 1 Input 0 output

Mode select: 00 mode 0; 01 mode 1; 0x mode 2

1 – mode select 0 – bit set/reset

Port C(U) – 1 Input 0 output

Mode select: 0 mode 0; 1 mode 1

Port B – 1 Input 0 output

Port C(L) – 1 Input 0 output

Group A

Group B

I/O port Addressing

8255

CSb

A1A0

RDb

WRb

A7A6A5A4A3A2 A1

A0

IORb

IOWb Reset

Reset

Port A=80H

Port C=82H

Port B=81H

CSb A1 A0 HEX Address Port

A7 A6 A5 A4 A3 A2 1 0 0 0 0 0

A1 A00 0

= 80H A

0 1 =81H B

1 0 =82H C

1 1 =83H Control Register

BSR (Bit Set or Reset Mode)

• Set/Reset bit of Port C • Heavily used for HS and Interrupt mode• BSR Control word

• BSR Control word– To set PC7= 0 000 111 1 (0FH)– To reset PC7= 0 000 111 0 (0EH) – To set PC3 = 0 000 011 1 (07H)

D7 D6 D5 D4 D3 D2 D1 D0

0BSR Mode

Not used, So (000) Bit Select S/R (1/0)

Ports

• Control register controls the overall operation of 8255

• All three ports A, B and C are grouped into two

Group B

Group B

Group AGroup A

Port A Upper C Port B Lower C

Operation modes

• 8255 has three modes:- mode 0: basic input-output- mode 1: strobed input-output- mode 2: strobed bidirectinal bus I/O

• In mode 0- two 8-bit ports and two 4-bit ports- any port can be input or output- Outputs are latched, inputs are not latched

Mode 0

Port A Upper C Port B Lower C

Operation mode 1

• In mode 1: -three ports are divided into two groups-each group contains one 8-bit port and one 4-bit control/data port- 8-bit port can be either input or output and both latched- 4-bit port used for control and status of 8-bit data port

Mode 1

Group B

Group B

Group AGroup A

Port A Upper C Port B Lower C

• In mode 2- only port A is used - port A becomes an 8-bit bidiectional bus- port C acts as control port (only pins PC3-PC7 are used)

Operation mode 2

Mode 2

Group B Group B Group AGroup A

Port A C7-C3 Port B

Programming 8255 Mode 2:— Port A is programmed to be bi-directional— Port C is for handshaking— Port B can be either input or output in mode 0 or mode 1

PA[7:0]OBFAACKA

INTRA

PC4PC6PC7

STBA

IBFA

PC0

PC3PC58255

PC0PC0

PB[7:0]

In Out In OutIn Out

Mode 0

STBB OBFB IBFB ACKB

INTRB INTRB

Mode 1

Reference

• R S Gaonkar, “Microprocessor Architecture”, Chapter 15

Thanks