day 6-2 successful entrepreneurship for microsystems · customer validation ©2015 tcx inc 13 human...
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1 ©2015 TCX Inc
Successful Entrepreneurship
for Microsystems
Rakesh Kumar, Ph.D., Life Fellow IEEE
October 29, 2015
858.945.3758
Teaching Assistants:
Dharmil Chandarana [email protected]
Swetha Krishnakumar [email protected]
Course presented at UCSD CSE 190, Fall Quarter 2015
Day 6-2
3 ©2015 TCX Inc
Smartphones drive diverse technologies
User Experience
Low Cost
Battery Life Low Power
Compact
Performance Architecture, SW, Design, …
FC + WB stack
TSV + FC stack TSV system stack
More Moore
More than Moore
MEMS Sensors
Ultrabook PCs also drive diverse technologies
4 ©2015 TCX Inc
0.001
0.01
0.1
1
10
100
1000
1970 1975 1980 1985 1990 1995 2000 2005 2010
Year Source: IC Knowledge, ISSCC, TCX
Tra
nsis
tors
per
Ch
ip, M
Min
imu
m F
eatu
re S
ize, u
m
Semiconductor Industry Evolution…”More Moore” …Transistor complexities have doubled every 2 years
System Co.’s – IBM, Hitachi, Sony, Philips, Unisys,…
Semiconductor Co’s – Fairchild, T.I., Motorola, National, Intel, Toshiba, …
Fabless Co.’s
MF µP PC iNet Cellular
+43% / year
Moore’s Law 2x / 12mos…1965-70 2x / 18mos,,,1970-90’s
2x / 24mos…now
-13% / year
S’phones IoE
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Moore’s Scaling …is “forever delay” at the limit?
Ref: IMEC ITF July 2012
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ECONOMIC challenges are threatening
Increased Cost of Capital, R&D, Design
Sources: imec Sematech intel tsmc umc asml
McKinsey & Company 4
Working D
raft -Last Modified 4/18/2011 11:19:18 A
MP
rinted 10/13/2010 8:56:28 PM
|
Costs associated with node progression have been rising significantly
6,700
4,850
4,000
2,500
1,800
1,450
22nm32nm45nm65nm90nm130nm
+36% p.a.
Fab cost
$ Millions
Process development cost
$ Millions
Chip design cost including fabless
overhead costs*
$ Millions
SOURCE: Press Reports; iSuppli; ICKnowledge; GSA; WorldFabWatch; ITRS
Estimated
cost CAGR
Percent
16 18 17 21 25 25
1,300
900
600
400
310250
22nm32nm45nm65nm90nm130nm
+39% p.a.
150
100
60
34
24
15
22nm32nm45nm65nm90nm130nm
+58% p.a.
* Chip design cost includes product R&D cost (design, verification & photomask) and other fabless costs (overhead, IP licensing, etc.)
>30% ~40% ~60%
7 ©2015 TCX Inc
Number of Fabless Companies Worldwide by Year
70
207
340409
485568
650750
850950
1100
12501300 1300 1300 1300
1350
0
200
400
600
800
1000
1200
1400
1600
Be
fore
19
80
19
81
-19
90
19
91
-19
95
19
96
19
97
19
98
19
99
20
00
20
01
20
02
20
03
20
04
20
05
20
06
20
07
20
08
20
09
North America
(600)
Asia (500)
Europe (150)
Israel (50)
Source: Global Semiconductor Alliance (formerly FSA)
Fabless Industry pioneered by innovators with ideas, but without wafer fabs
Worldwide Growth of Fabless Companies
Consolidation Reduced Venture Funding
8 ©2015 TCX Inc
Top 10 Semiconductor Sales Leaders
2013
Rank
2012
Rank
2011
Rank Company HQ
2013
Revenue
($M)
2013/2
012
change
Market
Share
1 1 1 Intel Corporation U.S. $46,960 -1% 14.8%
2 2 2 Samsung Electronics Co., Ltd South Korea $33,456 +7% 10.5%
3 3 6 QUALCOMM - QCT Division U.S. $17,341 +31.6% 5.5%
4 10 9 Micron Technology, Inc. U.S. $14,168 +109% 4.5%
5 7 8 SK Hynix South Korea $13,335 +48.7% 4.2%
6 5 4 Toshiba Semiconductor Co. Japan $12,459 +11.9% 3.9%
7 4 3 Texas Instruments U.S. $11,379 -5.5% 3.6%
8 9 10 Broadcom U.S. $8,121 +3.5% 2.6%
9 8 7 STMicroelectronics Europe $8,076 -4.9% 2.9%
10 6 5 Renesas Electronics Japan $7,822 -15.3% 2.5%
Source: IHS iSuppli, Wiki, March 2014
9 ©2015 TCX Inc
Fabless Companies in Top 20 Semiconductor Revenue
2013
Rank in
Top 20
2012
Rank in
Top 20 Company Headquarters
2013
Revenue ($M)
2013/2012
Rev. Change ($M)
3 3 Qualcomm U.S. 17,341 +31.6%
8 9 Broadcom U.S. 8,121 +3.5%
12 12 AMD U.S. 5,076 -4.2%
14 18 MediaTek Taiwan 4,434 +32.1%
17 15 Nvidia U.S. 3,612 -5.6%
18 19 Marvell U.S. 3,281 +3.6%
20 23 Analog Devices U.S. 2,677 +0.2%
Source: IHS iSuppli, Wiki, March 2014
Others: SanDisk Avago Xilinx Altera
LSI Logic
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Fabless Eco-system Alignment Across Entire Value Chain is Required
Dev LC
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Methodologies
Lab
Demo
Funding Market
Customer Biz Plan
…
Model Prototype
“System”/ Produce-able
Prototype Production
1 2 4 5 7 9
Technology Release Levels, Ref. nasa.gov
Ang
el
VC
IPO
, M&
A
FF
F
IDEA
The “Productization / Commercialization” Lifecycle …Idea to High Volume Production
Biz Plan
12 ©2015 TCX Inc
Methodologies
Lab
Demo
Funding Market
Customer Biz Plan
…
Model Prototype
“System”/ Produce-able
Prototype Production
1 2 4 5 7 9
Technology Release Levels, Ref. nasa.gov
Ang
el
VC
IPO
, M&
A
FF
F
IDEA
The “Productization / Commercialization” Lifecycle …Idea to High Volume Production
Biz Plan
CANVAS CUSTOMER INTERVIEWS 1st Demo/Sample
Customer Discovery Customer Validation
13 ©2015 TCX Inc
Human Centered Design …UCSD Design Lab…Prof. Don Norman
The HCD process…solve the RIGHT PROBLEM
Meet people’s NEEDS
Product is UNDERSTANDABLE and USABLE, ACCOMPLISHES the expected TASKS
User’s EXPERIENCE is positive and enjoyable
The Design process
OBSERVE
GENERATE IDEAS (Ideation)
PROTOTYPE
TEST
Ref.: Don Norman, “The Design of Everyday Things”, Chapter 6
14 ©2015 TCX Inc
Ref.: Don Norman, “The Design of Everyday Things”, Chapter 6
Human Centered Design …UCSD Design Lab…Prof. Don Norman
15 ©2015 TCX Inc
Product Development Lifecycle
Idea / MVP
Software Product
License IP
Fabless I.C. company
Internal Development
at big Company
Existing New
Standard, Technology
Market Customer Base
OEM* Product
16 ©2015 TCX Inc
Success elements – product positioning
EXISTING
Standard, market, customer base
NEW
Standard, market, customer base
Super-Integration
Problem solutions
Evolutionary enhancements
e.g. Cost reduction
Emerging standard
New features/capabilities
New interfaces
“Revolutionary” enhancements
Will Impact Schedule, Technology Selection, Design Methodology,….
17 ©2015 TCX Inc
17
Conceptual timeline
Key: early engagement with customer to evaluate and validate the new chip.
J. Fiebiger (Board Directors Actel, Mentor, QLogic):
“The fabless company must identify the first potential customer early. It is important to have customer’s input in shaping the product requirements… Investors and suppliers will get a favorable story when they perform due diligence with the customer about the viability of the product and potential volume.”
Chip Development Market
Accept Ramp Hi Volume
Existing markets:
Chip Development 1st Customer Slow Ramp Hi Volume
Alliance / New Standard Accept
New markets:
~5 quarters
For existing markets, getting the product to market and increasing market share is important!
18 ©2015 TCX Inc
IC Design
Global Planning
IC Production
Lifecycle of a Fabless IC development – the 4 phases
IC Prototyping
Series A
Series B
30 – 50% of TT$
19 ©2015 TCX Inc
IC Design
Global Planning
IC Production
Lifecycle of a Fabless IC development – activity highlites
“System” Architecture / Design / Simulation / Verification
Reference Boards
Customer Evaluation “Proof of Concept”
Customer Samples
Reference Design
FPGA Implementation
Customer Evaluation Design Acceptance
IC Prototyping
High Level Design
Floor Planning
Chip Design
RTL NL
Physical Des
NL GDSII F A T
Prod. Ramp
IC Qualification
Hi volume Debug
Analog IP Design
Series A
Series B
30 – 50% of TT$
20 ©2015 TCX Inc
Typical ASIC Development Cycle
ASIC DESIGN Proto Prod Ramp Hi Volume
Year 0 Year 1 Year 2
Software α
Software β
Software Prod.
Initial Silicon
Initial Silicon Ramp
Initial Product Ramp
Volume Production
Start Design Tapeout ESProd
HW/SW LaunchQS
FPGA
Ref Board
SW
21 ©2015 TCX Inc
a. At the System company:
Concept HW/SW Dev Demo Qual Trial Mkt Build Hi Volume
Year 0 Year 1 Year 2
b. At the Fabless IC company:
ASIC DESIGN Proto Prod Ramp Hi Volume
Year 0 Year 1 Year 2
Software α
Software β
Software Prod.
Initial Silicon
Initial Silicon Ramp
Initial Product Ramp
Volume Production
Launch
Start Product
Design
Volume Orders
Start Design Tapeout ESProd
HW/SW LaunchQS
FPGA
Ref Board
SW
System vs. IC Development Cycle
22 ©2015 TCX Inc
Year 1 Year 2
Requirements Spec.
Design & Development
Integration α
Testing & Debug β
Preview Release/Public β Release
Final Release ∆
Iterations/Additional Releases
Typical Software Development Cycle
23 ©2015 TCX Inc
Describe an approximate Timeline/Lifecycle for your team’s Product
HW 7 – Lean Canvas …Due Thursday, 5th
24 ©2015 TCX Inc
In-class Quiz 6-2
List the 3 most important learnings from today’s lecture