General DescriptionTheMAX5054MAX5057dual,high-speedMOSFETdriverssourceandsinkupto4Apeakcurrent.Thesedevices feature a fast 20ns propagation delay and 20nsriseandfalltimeswhiledrivinga5000pFcapacitiveload. Propagation delay time is minimized and matchedbetweentheinvertingandnoninvertinginputsandbetweenchannels.Highsourcing/sinkingpeakcur-rents,lowpropagationdelay,andthermallyenhancedpackages make the MAX5054MAX5057 ideal for high-frequency and high-power circuits.The MAX5054MAX5057 operate from a 4V to 15V singlepower supply and consume 40A (typ) of supply currentwhennotswitching.Thesedeviceshaveinternallogiccircuitrythatpreventsshoot-throughduringoutputstatechangestominimizetheoperatingcurrentathighswitchingfrequency.Thelogicinputsareprotectedagainst voltage spikes up to +18V, regardless of the VDDvoltage.TheMAX5054AistheonlyversionthathasCMOS input logic levels while the MAX5054B/MAX5055/MAX5056/MAX5057 have TTL input logic levels.The MAX5055MAX5057 provide the combination of dualinverting,dualnoninverting,andinverting/noninvertinginputdrivers.TheMAX5054featurebothinvertingandnoninvertinginputsperdriverforgreaterflexibility.Theyare available in 8-pin TDFN (3mm x 3mm), standard SO,andthermallyenhancedSOpackages.Thesedevicesoperateovertheautomotivetemperaturerangeof-40Cto +125C.ApplicationsPower MOSFET Switching Motor ControlSwitch-Mode Power Supplies Power-Supply ModulesDC-DC ConvertersFeatures4V to 15V Single Power Supply4A Peak Source/Sink Drive Current20ns (typ) Propagation DelayMatching Delay Between Inverting andNoninverting InputsMatching Propagation Delay Between TwoChannelsVDD / 2 CMOS Logic Inputs (MAX5054AATA)TTL Logic Inputs(MAX5054B/MAX5055/MAX5056/MAX5057)0.1 x VDD (CMOS) and 0.3V (TTL) Logic-InputHysteresisUp to +18V Logic Inputs (Regardless of VDDVoltage)Low Input Capacitance: 2.5pF (typ)40A (typ) Quiescent Current-40C to +125C Operating Temperature Range8-Pin TDFN and SO PackagesMAX5054MAX50574A, 20ns, Dual MOSFET Drivers________________________________________________________________ Maxim Integrated Products 1Ordering InformationMAX5054INA+INA-INB+INB-OUTBOUTAVDDGNDPWM INVOUT VINTypical Operating Circuit19-3348; Rev 0; 8/04For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com.*EP = Exposed pad. Package code S8E-14.PART TEMP RANGEPIN-PACKAGETOPMARKMAX5054AATA -40C to +125C 8 TDFN-EP* AGSMAX5054BATA -40C to +125C 8 TDFN-EP* AGRMAX5055AASA -40C to +125C 8 SO-EP* MAX5055BASA -40C to +125C 8 SO MAX5056AASA -40C to +125C 8 SO-EP* MAX5056BASA -40C to +125C 8 SO MAX5057AASA -40C to +125C 8 SO-EP* MAX5057BASA -40C to +125C 8 SO SelectorGuideandPinConfigurationsappearatendofdata sheet.4A, 20ns, Dual MOSFET Drivers2 _______________________________________________________________________________________ABSOLUTE MAXIMUM RATINGSELECTRICAL CHARACTERISTICS(VDD= 4V to 15V, TA= -40C to +125C, unless otherwise noted. Typical values are at VDD= 15V and TA= +25C.) (Note 1)Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functionaloperation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure toabsolute maximum rating conditions for extended periods may affect device reliability.(Voltages referenced to GND.)VDD...............................................................................-0.3V to +18VINA+, INA-, INB+, INB- ...............................................-0.3V to +18VOUTA, OUTB...................................................-0.3V to (VDD+ 0.3V)OUTA, OUTB Short-Circuit Duration........................................10msContinuous Source/Sink Current at OUT_ (PD< PDMAX) .....200mAContinuous Power Dissipation (TA= +70C)8-Pin TDFN-EP (derate 24.4mW/C above +70C)........1951mWJunction-to-Case Thermal Resistance (JC) ......................2C/W8-Pin SO-EP (derate 19.2mW/C above +70C)........1538mWJunction-to-Case Thermal Resistance (JC) ......................6C/W8-Pin SO (derate 5.9mW/C above +70C)..................471mWJunction-to-Case Thermal Resistance (JC) ....................40C/WOperating Temperature Range..............................-40C to +125CStorage Temperature Range .................................-65C to +150CJunction Temperature...........................................................+150CLead Temperature (soldering, 10s)......................................+300CMAX5054MAX5057PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITSPOWER SUPPLYVDD Operating Range VDD4 15 VVDD Undervoltage Lockout UVLO VDD rising 3.00 3.50 3.85 VVDD Undervoltage LockoutHysteresis200 mVVDD Undervoltage Lockout toOutput DelayVDD rising 12 sVDD = 4V 28 55IDDINA- = INB- = VDD,INA+ = INB+ = 0V(not switching) VDD = 15V 40 75AVDD Supply CurrentIDD-SWINA- = 0V, INB+ = VDD = 15V,INA+ = INB- both channels switching at250kHz, CL = 01 2.4 4 mADRIVER OUTPUT (SINK)TA = +25C 1.1 1.8VDD = 15V,IOUT_ = -100mATA = +125C 1.5 2.4TA = +25C 2.2 3.3Driver Output Resistance PullingDownRON-NVDD = 4.5V,IOUT_ = -100mATA = +125C 3.0 4.5Peak Output Current (Sinking) IPK-NVDD = 15V, CL = 10,000pF 4 AVDD = 4.5V 0.45Output-Voltage Low IOUT_ = -100mAVDD = 15V 0.24VLatchup Protection ILUPReverse current IOUT_ (Note 2) 400 mADRIVER OUTPUT (SOURCE)TA = +25C 1.5 2.1VDD = 15V,IOUT_ = 100mATA = +125C 1.9 2.75TA = +25C 2.75 4Driver Output Resistance PullingUpRON-PVDD = 4.5V,IOUT_ = 100mATA = +125C 3.75 5.5Peak Output Current (Sourcing) IPK-PVDD = 15V, CL = 10,000pF 4 AMAX5054MAX50574A, 20ns, Dual MOSFET Drivers_______________________________________________________________________________________ 3ELECTRICAL CHARACTERISTICS (continued)(VDD= 4V to 15V, TA= -40C to +125C, unless otherwise noted. Typical values are at VDD= 15V and TA= +25C.) (Note 1)PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITSVDD = 4.5VVDD -0.55Output-Voltage High IOUT_ = 100mAVDD = 15VVDD -0.275VLOGIC INPUT (Note 3)MAX5054A0.7 xVDDLogic 1 Input Voltage VIHMAX5054B/MAX5055/MAX5056/MAX5057(Note 4)2.1VMAX5054A0.3 xVDD Logic 0 Input Voltage VILMAX5054B/MAX5055/MAX5056/MAX5057 0.8VMAX5054A0.1 xVDD Logic-Input Hysteresis VHYSMAX5054B/MAX5055/MAX5056/MAX5057 0.3VLogic-Input-Current Leakage INA+, INB+, INA-, INB- = 0V or VDD-1 +0.1 +1 AInput Capacitance CIN2.5 pFSWITCHING CHARACTERISTICS FOR VDD = 15V (Figure 1)CL = 1000pF 4CL = 5000pF 18 OUT_ Rise Time tRCL = 10,000pF 32nsCL = 1000pF 4CL = 5000pF 15 OUT_ Fall Time tFCL = 10,000pF 26nsTurn-On Delay Time tD-ONCL = 10,000pF (Note 2) 10 20 34 nsTurn-Off Delay Time tD-OFFCL = 10,000pF (Note 2) 10 20 34 nsSWITCHING CHARACTERISTICS FOR VDD = 4.5V (Figure 1)CL = 1000pF 7CL = 5000pF 37 OUT_ Rise Time tRCL = 10,000pF 85nsCL = 1000pF 7CL = 5000pF 30 OUT_ Fall Time tFCL = 10,000pF 75nsTurn-On Delay Time tD-ONCL = 10,000pF (Note 2) 18 35 70 nsTurn-Off Delay Time tD-OFFCL = 10,000pF (Note 2) 18 35 70 nsMAX5054MAX50574A, 20ns, Dual MOSFET Drivers4 _______________________________________________________________________________________ELECTRICAL CHARACTERISTICS (continued)(VDD= 4V to 15V, TA= -40C to +125C, unless otherwise noted. Typical values are at VDD= 15V and TA= +25C.) (Note 1)PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITSMATCHING CHARACTERISTICSVDD = 15V, CL = 10,000pF 2 Mismatch Propagation Delays fromInverting and Noninverting Inputsto OutputtON-OFFVDD = 4.5V, CL = 10,000pF 4nsVDD = 15V, CL = 10,000pF 1Mismatch Propagation DelaysBetween Channel A and Channel BtA-BVDD = 4.5V, CL = 10,000pF 2nsNote 1: All devices are 100% tested at TA= +25C. Specifications over -40C to +125C are guaranteed by design.Note 2: Limits are guaranteed by design, not production tested.Note 3: The logic-input thresholds are tested at VDD= 4V and VDD= 15V.Note 4: TTL compatible with reduced noise immunity.RISE TIME vs. SUPPLY VOLTAGE(CL = 5000pF)MAX5054 toc01SUPPLY VOLTAGE (V)RISE TIME (ns)14 12 10 8 610203040506004 16TA = +125CTA = +25CTA = -40CFALL TIME vs. SUPPLY VOLTAGE(CL = 5000pF)MAX5054 toc02TA = +125CTA = +25CTA = -40CFALL TIME (ns)1020304050600SUPPLY VOLTAGE (V)14 12 10 8 6 4 16PROPAGATION DELAY TIME,LOW-TO-HIGH vs. SUPPLY VOLTAGE(CL = 5000pF)MAX5054 toc03TA = +125CTA = +25CTA = -40CPROPAGATION DELAY (ns)1020304050600SUPPLY VOLTAGE (V)14 12 10 8 6 4 16MAX5054 toc04PROPAGATION DELAY TIME,HIGH-TO-LOW vs. SUPPLY VOLTAGE(CL = 5000pF)TA = +125CTA = +25CTA = -40CPROPAGATION DELAY (ns)1020304050600SUPPLY VOLTAGE (V)14 12 10 8 6 4 16IDD-SW SUPPLY CURRENTvs. SUPPLY VOLTAGEMAX5054 toc05SUPPLY VOLTAGE (V)IDD-SW SUPPLY CURRENT (mA)14 12 10 8 612345604 16DUTY CYCLE = 50%VDD = 15V, CL = 01 CHANNEL SWITCHING1MHz50kHz100kHz500kHzSUPPLY CURRENT vs. SUPPLY VOLTAGEMAX5054 toc06SUPPLY VOLTAGE (V)SUPPLY CURRENT (mA)14 12 10 8 610203040506070809010004 16DUTY CYCLE = 50%VDD = 15V, CL = 4700pF1 CHANNEL SWITCHING1MHz50kHz 100kHz500kHzTypical Operating Characteristics(TA = +25C, unless otherwise noted.)MAX5054MAX50574A, 20ns, Dual MOSFET Drivers_______________________________________________________________________________________ 5MAX5054 toc07TEMPERATURE (C)SUPPLY CURRENT (mA)100 75 50 25 0 -251.52.02.53.03.54.01.0-50 125IDD-SW SUPPLY CURRENTvs. TEMPERATUREVDD = 15V, f = 250kHz, CL = 0DUTY CYCLE = 50%BOTH CHANNELS SWITCHINGINPUT THRESHOLD VOLTAGEvs. SUPPLY VOLTAGEMAX5054 toc08SUPPLY VOLTAGE (V)INPUT THRESHOLD VOLTAGE (V)14 12 10 8 61234567891004 16MAX5054AATA(CMOS INPUT)VIN RISINGVIN FALLINGMAX5054 toc09SUPPLY VOLTAGE (V)INPUT THRESHOLD VOLTAGE (V)14 12 10 8 60.51.01.52.02.53.004 16INPUT THRESHOLD VOLTAGEvs. SUPPLY VOLTAGEVIN RISINGVIN FALLINGTTL INPUT VERSIONSSUPPLY CURRENT vs. LOGIC-INPUTVOLTAGE (INPUT LOW-TO-HIGH)MAX5054 toc10LOGIC-INPUT VOLTAGE (V)SUPPLY CURRENT (A)14 12 10 8 6 4 210020030040050000 16TTL INPUT VERSIONSVDD = 15VMAX5054 toc11LOGIC-INPUT VOLTAGE (V)SUPPLY CURRENT (A)14 12 10 8 6 4 210020030040050000 16SUPPLY CURRENT vs. LOGIC-INPUTVOLTAGE (INPUT HIGH-TO-LOW)TTL INPUT VERSIONSVDD = 15VMAX5054 toc12LOGIC-INPUT VOLTAGE (V)SUPPLY CURRENT (mA)14 12 10 8 6 4 21234500 16SUPPLY CURRENT vs. LOGIC-INPUTVOLTAGE (INPUT LOW-TO-HIGH)MAX5054AATA (CMOS INPUT)VDD = 15VMAX5054 toc13LOGIC-INPUT VOLTAGE (V)SUPPLY CURRENT (mA)14 12 10 8 6 4 21234500 16SUPPLY CURRENT vs. LOGIC-INPUTVOLTAGE (INPUT HIGH-TO-LOW)MAX5054AATA (CMOS INPUT)VDD = +15VDELAY MISMATCH BETWEEN IN_+AND IN_- TO OUT_ vs. TEMPERATUREMAX5054 toc14TEMPERATURE (C)DELAY MISMATCH (ns)100 75 50 25 0 -25-4-20246-6-50 125OUTPUT FALLINGOUTPUT RISINGMAX5054AATA (CMOS INPUT)VDD = 4.5V, CL = 10,000pFMAX5054 toc15TEMPERATURE (C)DELAY MISMATCH (ns)100 75 50 25 0 -25-4-20246-6-50 125DELAY MISMATCH BETWEEN IN_+AND IN_- TO OUT_ vs. TEMPERATUREOUTPUT FALLINGOUTPUT RISINGMAX5054AATA (CMOS INPUT)VDD = 15V, CL = 10,000pFTypical Operating Characteristics (continued)(TA = +25C, unless otherwise noted.)MAX5054MAX50574A, 20ns, Dual MOSFET Drivers6 _______________________________________________________________________________________Typical Operating Characteristics (continued)(TA = +25C, unless otherwise noted.)MAX5054 toc16TEMPERATURE (C)DELAY MISMATCH (ns)100 75 -25 0 25 50-3-2-101234-4-50 125DELAY MISMATCH BETWEEN 2 CHANNELS vs. TEMPERATUREVDD = 4.5V, CL = 10,000pFOUTPUT RISINGOUTPUT FALLINGMAX5054 toc17TEMPERATURE (C)DELAY MISMATCH (ns)100 75 -25 0 25 50-3-2-101234-4-50 125DELAY MISMATCH BETWEEN 2 CHANNELS vs. TEMPERATUREVDD = 15V, CL = 10,000pFOUTPUT RISINGOUTPUT FALLINGLOGIC-INPUT VOLTAGE vs. OUTPUT VOLTAGE(VDD = 4V, CL = 5000pF)MAX5054 toc18IN_-2V/div20ns/divOUT_2V/divMAX5055 (TTL INPUT)MAX5054 toc1940ns/divLOGIC-INPUT VOLTAGE vs. OUTPUT VOLTAGE(VDD = 4V, CL = 10,000pF)IN_-2V/divOUT_2V/divMAX5055 (TTL INPUT)MAX5054 toc2020ns/divLOGIC-INPUT VOLTAGE vs. OUTPUT VOLTAGE(VDD = 4V, CL = 5000pF)IN_-2V/divOUT_2V/divMAX5055 (TTL INPUT)MAX5054 toc2140ns/divLOGIC-INPUT VOLTAGE vs. OUTPUT VOLTAGE(VDD = 4V, CL = 10,000pF)IN_-2V/divOUT_2V/divMAX5055 (TTL INPUT)MAX5054MAX50574A, 20ns, Dual MOSFET Drivers_______________________________________________________________________________________ 7MAX5054 toc2220ns/divLOGIC-INPUT VOLTAGE vs. OUTPUT VOLTAGE(VDD = 15V, CL = 5000pF)IN_-2V/divOUT_5V/divMAX5055MAX5054 toc2340ns/divLOGIC-INPUT VOLTAGE vs. OUTPUT VOLTAGE(VDD = 15V, CL = 10,000pF)IN_-2V/divOUT_5V/divMAX5055MAX5054 toc2420ns/divLOGIC-INPUT VOLTAGE vs. OUTPUT VOLTAGE(VDD = 15V, CL = 5000pF)IN_-2V/divOUT_5V/divMAX5055MAX5054 toc2540ns/divLOGIC-INPUT VOLTAGE vs. OUTPUT VOLTAGE(VDD = 15V, CL = 10,000pF)MAX5055IN_-2V/divOUT_5V/divVDD vs. OUTPUT VOLTAGEMAX5054 toc262ms/divMAX5055INA- = INB- = GNDCLA = CLB = 10,000pFVDD5V/divOUTB5V/divOUTA5V/divMAX5054 toc272ms/divVDD vs. OUTPUT VOLTAGEMAX5055INA- = INB- = GNDCLA = CLB = 10,000pFVDD5V/divOUTB5V/divOUTA5V/divTypical Operating Characteristics (continued)(TA = +25C, unless otherwise noted.)MAX5054MAX50574A, 20ns, Dual MOSFET Drivers8 _______________________________________________________________________________________Pin DescriptionsPIN NAME FUNCTION1 INA- Inverting Logic-Input Terminal for Driver A. Connect to GND when not used.2 INB- Inverting Logic-Input Terminal for Driver B. Connect to GND when not used.3 GND Ground4 OUTB Driver B Output. Sources or sinks current for channel B to turn the external MOSFET on or off.5 VDDPower Supply. Bypass to GND with one or more 0.1F ceramic capacitors.6 OUTA Driver A Output. Sources or sinks current for channel A to turn the external MOSFET on or off.7 INB+ Noninverting Logic-Input Terminal for Driver B. Connect to VDD when not used.8 INA+ Noninverting Logic-Input Terminal for Driver A. Connect to VDD when not used. EPExposed Pad. Internally connected to GND. Do not use the exposed pad as the only electricalground connection.PINMAX5055 MAX5056 MAX5057NAME FUNCTION1, 8 1, 8 1, 8 N.C. No Connection. Not internally connected.2 2 INA- Inverting Logic-Input Terminal for Driver A. Connect to GND if not used.3 3 3 GND Ground4 INB- Inverting Logic-Input Terminal for Driver B. Connect to GND if not used.5 5 5 OUTBDriver B Output. Sources or sinks current for channel B to turn the externalMOSFET on or off.6 6 6 VDDPower Supply. Bypass to GND with one or more 0.1F ceramic capacitors.7 7 7 OUTADriver A Output. Sources or sinks current for channel A to turn the externalMOSFET on or off. 4 4 INB+ Noninverting Logic-Input Terminal for Driver B. Connect to VDD if not used. 2 INA+ Noninverting Logic-Input Terminal for Driver A. Connect to VDD if not used. EPExposed Pad. Internally connected to GND. Do not use the exposed pad asthe only electrical ground connection.MAX5054MAX5055/MAX5056/MAX5057Detailed DescriptionVDDUndervoltage Lockout (UVLO)TheMAX5054MAX5057haveinternalundervoltagelockoutforVDD.WhenVDDisbelowtheUVLOthresh-old, OUT_ is low, independent of the state of the inputs.Theundervoltagelockoutistypically3.5Vwith200mVtypicalhysteresistoavoidchattering.WhenVDDrisesabovetheUVLOthreshold,theoutputsgohighorlowdependinguponthelogic-inputlevels.BypassVDDusing low-ESR ceramic capacitors for proper operation(see the Applications Information section).Logic InputsTheMAX5054BMAX5057haveTTL-compatiblelogicinputs,whiletheMAX5054AisaCMOSlogic-inputdri-ver.Thelogic-inputsignalscanbeindependentoftheVDDvoltage.Forexample,thedevicecanbepoweredby a 5V supply while the logic inputs are provided fromCMOS logic. Also, the logic inputs are protected againstthe voltage spikes up to 18V, regardless of the VDDvolt-age.TheTTLandCMOSlogicinputshave300mVand0.1 x VDDhysteresis, respectively, to avoid possible dou-ble pulsing during transition. The low 2.5pF input capaci-tance reduces loading and increases switching speed.MAX5054MAX50574A, 20ns, Dual MOSFET Drivers_______________________________________________________________________________________ 9VIHVIL90%10%VIHVILtRtFtD-OFF1tD-ON1tD-OFF2tD-ON2IN_+OUT_IN_-RISING MISMATCH = tD-ON2 - tD-ON1FALLING MISMATCH = tD-OFF2 - tD-OFF1Figure 1. Timing DiagramPNMAX5054BREAK-BEFORE-MAKECONTROLVDDOUT_GNDIN_-IN_+Figure 2. MAX5054 Block Diagram (1 Driver)PNMAX5055MAX5056MAX5057BREAK-BEFORE-MAKECONTROLVDDOUT_GNDIN_+NONINVERTING INPUT DRIVERPNMAX5055MAX5056MAX5057BREAK-BEFORE-MAKECONTROLVDDOUT_GNDIN_-INVERTING INPUT DRIVERFigure 3. MAX5055/MAX5056/MAX5057 Functional Diagrams(1 Driver)MAX5054MAX5057The logic inputs are high impedance and must not be leftfloating.Iftheinputsareleftopen,OUT_cangotoanundefinedstateassoonasVDDrisesabovetheUVLOthreshold.Therefore,thePWMoutputfromthecontrollermust assume proper state when powering up the device.TheMAX5054hastwologicinputsperdriverprovidinggreater flexibility in controlling the MOSFET. Use IN_+ fornoninvertinglogicandIN_-forinvertinglogicoperation.ConnectIN_+toVDDandIN_-toGNDifnotused.Alternatively,theunusedinputcanbeusedasanON/OFF function. Use IN_+ for active-low shutdown logicandIN_-foractive-highshutdownlogic(seeFigure4).See Table 1 for all possible input combinations.Driver OutputTheMAX5054MAX5057havelowRDS(ON)p-channelandn-channeldevices(totempole)intheoutputstageforthefastturn-onandturn-offhighgate-chargeswitch-ing MOSFETs. The peak source or sink current is typically4A.TheOUT_voltageisapproximatelyequaltoVDDwhen in high state and is ground when in low state. ThedriverRDS(ON)islowerathigherVDD,thushigher source-/sink-currentcapabilityandfasterswitchingspeeds.Thepropagationdelaysfromthenoninvertingand inverting logic inputs to outputs are matched to 2ns.Thebreak-before-makelogicavoidsanycross-conduc-tionbetweentheinternalp-andn-channeldevices,andeliminates shoot-through currents reducing the quiescentsupply current.Applications InformationRLC Series CircuitThedriversRDS(ON)(RON),internalbondandleadinductance (LP), trace inductance (LS), gate inductance(LG),andgatecapacitance(CG)formaseriesRLC circuitwithasecond-ordercharacteristicequation.TheseriesRLCcircuithasanundampednaturalfrequency(0) and a damping ratio () where:The damping ratio needs to be greater than 0.5 (ideally 1)toavoidringing.Addasmallresistor(RGATE)inserieswiththegatewhendrivingaverylowgate-charge MOSFET,orwhenthedriverisplacedawayfromtheMOSFET.Usethefollowingequationtocalculatetheseries resistor:LPcanbeapproximatedas3nHand2nHforSOandTDFNpackages,respectively.LSisontheorderof20nH/in. Verify LGwith the MOSFET vendor.RL L LCRGATEP S GGON+ +( )012=+ + =+ +( ) ( )L L L CRL L LCP S G GONP S GG4A, 20ns, Dual MOSFET Drivers10 ______________________________________________________________________________________MAX5054AVDDGNDINA-INA+ OUTAPWMINPUTONOFFFigure 4. Unused Input as an ON/OFF Function (1/2 MAX5054A)Table 1. MAX5054 Truth TableINA+/INB+ INA-/INB- OUTA/OUTBLow Low LowLow High LowHigh Low HighHigh High LowTable 2. MAX5055/MAX5056/MAX5057Truth TableNONINVERTINGIN_+ OUT_Low LowHigh HighINVERTINGIN_- OUT_Low HighHigh LowSupply Bypassing and GroundingPayextraattentiontobypassingandgroundingtheMAX5054MAX5057.Peaksupplyandoutputcurrentsmayexceed8Awhenbothdriversdrivelargeexternalcapacitiveloadsinphase.Supplyvoltagedropsandgroundshiftscreateformsofnegativefeedbackforinverters and may degrade the delay and transition times.GroundshiftsduetoinsufficientdevicegroundingmayalsodisturbothercircuitssharingthesameACgroundreturnpath.AnyseriesinductanceintheVDD,OUT_,and/or GND paths can cause oscillations due to the veryhighdi/dtwhenswitchingtheMAX5054MAX5057withanycapacitiveload.Placeoneormore0.1Fceramiccapacitors in parallel as close to the device as possible tobypassVDDtoGND.Useagroundplanetominimizegroundreturnresistanceandseriesinductance.PlacetheexternalMOSFETascloseaspossibletotheMAX5054MAX5057tofurtherminimizeboardinduc-tance and AC path impedance.Power DissipationPowerdissipationoftheMAX5054MAX5057consistsof three components: caused by the quiescent current,capacitive charge/discharge of internal nodes, and theoutputcurrent(eithercapacitiveorresistiveload).Maintain the sum of these components below the maxi-mum power dissipation limit.The current required to charge and discharge the internalnodesisfrequencydependent(seetheSupplyCurrentvs.SupplyVoltagegraphintheTypicalOperatingCharacteristics).Thepowerdissipation(PQ) duetothequiescentswitchingsupplycurrent(IDD-SW)perdrivercan be calculated as:PQ= VDDx IDD-SWFor capacitive loads, use the following equation to esti-mate the power dissipation per driver:PCLOAD= CLOADx (VDD)2x fSWwhere CLOADis the capacitive load, VDDis the supplyvoltage, and fSWis the switching frequency.Calculatethetotalpowerdissipation(PT)perdriverasfollows:PT= PQ+ PCLOADUsethefollowingequationtoestimatetheMAX5054MAX5057 total power dissipation per driver when drivinga ground-referenced resistive load:PT= PQ+ PRLOADPRLOAD= D x RON(MAX)x ILOAD2whereD(dutycycle)isthefractionoftheperiodtheMAX5054MAX5057soutputpullshighdutycycle,RON(MAX)isthemaximumon-resistanceofthedevicewith the output high, and ILOADis the output load currentof the MAX5054MAX5057.Layout InformationTheMAX5054MAX5057MOSFETdriverssourceandsinklargecurrentstocreateveryfastrisingandfallingedgesatthegateoftheswitchingMOSFET.Thehighdi/dtcancauseunacceptableringingifthetracelengths and impedances are not well controlled. Use thefollowingPCboardlayoutguidelineswhendesigningwith the MAX5054MAX5057: Pl aceoneormore0.1Fdecoupl i ngcerami ccapacitors from VDDto GND as close to the deviceas possible. Connect VDDand GND to large copperareas.Placeonebulkcapacitorof10F(min)onthe PC board with a low resistance path to the VDDinput and GND of the MAX5054MAX5057. TwoACcurrentloopsformbetweenthedeviceandthegateofthedrivenMOSFET.TheMOSFETlookslike a large capacitance from gate to source when thegatepullslow.TheactivecurrentloopisfromtheMOSFET gate to OUT_ of the MAX5054MAX5057, toGND of the MAX5054MAX5057, and to the source oftheMOSFET.WhenthegateoftheMOSFETpullshigh, the active current is from the VDDterminal of thedecouplingcapacitor,toVDDoftheMAX5054MAX5057, to OUT_ of the MAX5054MAX5057, to theMOSFETgate,totheMOSFETsource,andtothenegativeterminalofthedecouplingcapacitor.Bothchargingcurrentanddischargingcurrentloopsareimportant.Minimizethephysicaldistanceandtheimpedance in these AC current paths. Keep the device as close to the MOSFET as possible. InamultilayerPCboard,theinnerlayersshouldconsistofaGNDplanecontainingthedischargingand charging current loops. Payextraattentiontothegroundloopandusealow-impedancesourcewhenusingaTTLlogic-input device. Fast fall time at OUT_ may corrupt theinput during transition.MAX5054MAX50574A, 20ns, Dual MOSFET Drivers______________________________________________________________________________________ 11MAX5054MAX5057Exposed PadBoththeSO-EPandTDFN-EPpackageshaveanexposedpadonthebottomoftheirpackage.ThesepadsareinternallyconnectedtoGND.Forthebestthermalconductivity,soldertheexposedpadtotheground plane to dissipate 1.5W and 1.9W in SO-EP andTDFN-EPpackages,respectively.Donotusetheground-connectedpadsastheonlyelectricalgroundconnectionorgroundreturn.UseGND(pin3)astheprimary electrical ground connection.4A, 20ns, Dual MOSFET Drivers12 ______________________________________________________________________________________Additional Application CircuitsMAX5054INA+INA-INB+INB-OUTBOUTAVDDGNDVDDPWM INPWM INMAX5054INA+INA-INB+INB-OUTBOUTAVDDGNDPWM INVOUTVINFigure 5. Push-Pull Converter with Synchronous Rectification Drive Using MAX5054MAX5054MAX50574A, 20ns, Dual MOSFET Drivers______________________________________________________________________________________ 13REG5R2124.9k1%C1100pF1RCOSC+VINTP1R25100kC2390pF3RCFF5CSS4COM6COMP7FB8REG52SYNCOUTC54700pFD821R1531.6k1%R1610.5k1%C44.7FREG5REG59REG9C34.7FREG910PVINC60.1FPVIN11STT12LXVDD13LXHC181000pFR2710C191FLXHTP314LXLR32.2kR11360C170.33FC241000pF4312U2R200R19475R12100k1%C270.15FC360.22FC280.047FR111.5k1%R22.55k1%VOUTR2310TRIMSENSE (+)SENSE (-)R2410352 1 4OUTINPGNDGNDFBU3REG9C260.1FC222200pF2kVSYNCIN28GND24AVIN23BST22DRVH21XFRMRH20UVLO25FLTINT27STARTUPON/OFF26R41M1%R61M1%C70.22F+VIN+VINREG9+VINR538.3k1%D1R70R88.22C84.7FXFRMRHDRVB19DRVDD18PGND17DRVL16CS15IC_PADDLEDRVBREG9C91FR14270R98.2C20220pFD31265412378N2R170.0271%C214.7F80VR184.7PVIN+VINR2215k1 216D54TR1347C34330pF258TD712321456678N3 D4123214578N4R1020C231000pF8102TT1L12.4HU55VC310.1F54312VCCOUTGNDU1: MAX5051U2: PS2913-1-MU3: MAX8515U4: MAX5054U5: MAX5023MU6: PS9715N1, N2: SI4486N3, N4: SI4864N5: BSS123ANCAU6LXHR26560R282kC13270F4VC14270F4VC15270F4VC331F10VVOUTVOUTSGND5V+VINC163.3F21D6C351FC321F12348765INOUTWDIN.C.ENGNDRESETHOLD21D2N132187654XFRMRHXFRMRHC100.47F100VC110.47F100VC121F100VC250.047F100V-VIN+VINN5 321R291XFRMRHDRVBMAX5051U1REG5VOUTVOUTMAX5054U4+5V+5VC300.1F6471INA+INB-VDDGNDOUTAOUTBINB+INA-825329Figure 6. Schematic of a 48V Input, 3.3V at 15A Output Synchronously Rectified, Isolated Power SupplyMAX5054MAX50574A, 20ns, Dual MOSFET Drivers14 ______________________________________________________________________________________Chip InformationTRANSISTOR COUNT: 258PROCESS: CMOSOUTAVDDOUTB1287INA+INB+ INB-GNDINA-TDFN-EPTOP VIEW3465MAX5054VDDOUTB INB-1287N.C.OUTA INA-GNDN.C.SO/SO-EP3465MAX5055VDDOUTB INB+1287N.C.OUTA INA+GNDN.C.SO/SO-EP3465MAX5056VDDOUTB INB+1287N.C.OUTA INA-GNDN.C.SO/SO-EP3465MAX5057Pin ConfigurationsSelector GuidePARTPIN-PACKAGELOGIC INPUTMAX5054AATA 8 TDFN-EP*VDD / 2 CMOS Dual Invertingand Dual Noninverting InputsMAX5054BATA 8 TDFN-EP*TTL Dual Inverting and DualNoninverting InputsMAX5055AASA 8 SO-EP* TTL Dual Inverting InputsMAX5055BASA 8 SO TTL Dual Inverting InputsMAX5056AASA 8 SO-EP* TTL Dual Noninverting InputsMAX5056BASA 8 SO TTL Dual Noninverting InputsMAX5057AASA 8 SO-EP*TTL Inverting andNoninverting InputsMAX5057BASA 8 SOTTL Inverting andNoninverting Inputs*EP = Exposed pad.MAX5054MAX50574A, 20ns, Dual MOSFET Drivers______________________________________________________________________________________ 15Package Information(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline informationgo to www.maxim-ic.com/packages.)SOICN .EPSPACKAGE OUTLINE, .150" SOIC1121-0041 BREV. DOCUMENT CONTROL NO. APPROVALPROPRIETARY INFORMATIONTITLE:TOP VIEWFRONT VIEWMAX0.0100.0690.0190.1570.010INCHES0.1500.007ECDIM0.0140.004BA1MIN0.053 A0.193.80 4.000.25MILLIMETERS0.100.351.35MIN0.490.25MAX1.750.050 0.016 L 0.40 1.270.394 0.386 DDMIN DIMDINCHESMAX9.80 10.00MILLIMETERSMIN MAX16 AC0.337 0.344 AB 8.75 8.55 140.189 0.197 AA 5.00 4.80 8N MS012NSIDE VIEWH 0.244 0.228 5.80 6.20e 0.050 BSC 1.27 BSCCH EeBA1AD0-8L1VARIATIONS:MAX5054MAX50574A, 20ns, Dual MOSFET Drivers16 ______________________________________________________________________________________Package Information (continued)(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline informationgo to www.maxim-ic.com/packages.)8L, SOIC EXP. PAD.EPSB1121-0111PACKAGE OUTLINE8L SOIC, .150" EXPOSED PADMAX5054MAX50574A, 20ns, Dual MOSFET DriversMaximcannotassumeresponsibilityforuseofanycircuitryotherthancircuitryentirelyembodiedinaMaximproduct.Nocircuitpatentlicensesareimplied. Maxim reserves the right to change the circuitry and specifications without notice at any time.Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA94086 408-737-7600____________________ 17 2004 Maxim Integrated ProductsPrinted USA is a registered trademark of Maxim Integrated Products.Package Information (continued)(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline informationgo to www.maxim-ic.com/packages.)6, 8, &10L, DFN THIN.EPSLCLCPIN 1INDEX AREADELeLAeNUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLYE2DETAIL ANF12 21-0137PACKAGE OUTLINE, 6, 8, 10 & 14L,TDFN, EXPOSED PAD, 3x3x0.80 mmCOMMON DIMENSIONSSYMBOL MIN. MAX.A 0.70 0.80D 2.90 3.10E 2.90 3.10A1 0.00 0.05L 0.20 0.40PKG. CODE N D2 E2 e JEDEC SPEC b [(N/2)-1] x ePACKAGE VARIATIONS0.25 MIN. kA2 0.20 REF.2.300.10 1.500.10 6 T633-1 0.95 BSC MO229 / WEEA 1.90 REFF22 21-0137PACKAGE OUTLINE, 6, 8, 10 & 14L,TDFN, EXPOSED PAD, 3x3x0.80 mm0.400.051.95 REF 0.300.05 0.65 BSC 2.300.10 8 T833-12.00 REF 0.250.05 0.50 BSC 2.300.10 10 T1033-12.40 REF 0.200.03 - - - -0.40 BSC 1.700.10 2.300.10 14 T1433-11.500.101.500.10MO229 / WEECMO229 / WEED-30.40 BSC - - - -0.200.03 2.40 REF T1433-2 14 2.300.10 1.700.10