dac 2012
TRANSCRIPT
www.kit.edu
Simplify: an abstract MPSoC platform framework for enabling fast functional/behavioral simulation
Gabriel Marchesan Almeida, Oliver Bellaver Longhi, Michael Hübner, Fabiano Hessel and Jürgen Becker
Institut für Technik der Informationsverarbeitung (ITIV)2 11.04.2023 Dr. Michael Hübner
Motivation
Multiprocessor Systems-on-Chips (MPSoCs): popular solution that combines flexibility of software along with potentially significant speedups;
They integrate few mid-range microprocessors for which applications are usually statically mapped at design-time;
Those applications however tend to increase in complexity and often exhibit time-changing workloads which makes mapping decisions sub-optimal in a number of scenarios;
Offline approaches are no longer sufficient as application mapping paradigms, because they do not allow coping with time changing workloads;
Institut für Technik der Informationsverarbeitung (ITIV)3 11.04.2023 Dr. Michael Hübner
FlexTiles project (Tool-Flow Overview)
FP7 – FPT ICT – 288248
Virtu
alisation
Layer
Kern
el
Reso
urce M
on
itorin
g
& A
llocatio
n
Tile
Tile
Tile
Tile
Tile
Tile
Virtu
al C
od
e g
eneratio
n
Virtu
al B
itstream
gen
eration
Co
mp
ilation
VH
DL
S
ynth
esisP
&R
Parallelisatio
n
Ap
plicatio
n
Reco
nfig
urab
le area
Tool Flow Virtualisation Layers Manycore
Context
Institut für Technik der Informationsverarbeitung (ITIV)4 11.04.2023 Dr. Michael Hübner
DYNAMIC VOLTAGE AND FREQUENCY SCALING
ARCHITECTURE LEVEL
SYSTEM LEVEL
DYNAMIC MAPPING
TASK MIGRATION
ADAPTATION
An adaptive system is an open system that is able to fit its changing according to changes in its environment or in parts of the system itself
ADAPT AS FAST AS POSSIBLE
IMPROVE OVERALLPERFORMANCE
Definitions
Institut für Technik der Informationsverarbeitung (ITIV)5 11.04.2023 Dr. Michael Hübner
Multiprocessor System-on-Chip Architecture
PE
PE PE PE
PE PE
PE PE PE
PROCESSOR
FREQUENCY SCALING
RAM
RouterNoC
NETWORK PROCESSING UNIT (NPU)
R
R R R
R R
R R R
RTOS
TASK1
TASK2
TASKN
RAM
PE
R
PE
R
PE
R
PE
R
PE
R
PE
R
PE MIPS
PE µ-Blaze
PE ARM
PE openRISC
Institut für Technik der Informationsverarbeitung (ITIV)6 11.04.2023 Dr. Michael Hübner
Simplify - FW
Version 1.0 Processors:
MIPS;
µ-Blaze;
ARM7;
openRISC;
Interconnect:Bus;
No OS Support;
Mono task – 1 application per processor;
No communication API for applications;
Web framework:Architecture Modeling;
Processing Element Configuration;
Application Description;
Application Compilation and Execution;
Execution Reports;
Automatic Generation of OVP* Platforms;
* OVP (Open Virtual Platform)
Version 2.0 OS support:
Round-robin scheduler;
Semaphores;
Mutexes;
Multi-task;
Communication API for applications;
Web framework:New design;
Improved Performance;
Code optimization;
Institut für Technik der Informationsverarbeitung (ITIV)7 11.04.2023 Dr. Michael Hübner
Simplify - FW
http://simplify.itiv.kit.edu/simplify/wordpress/pub/simplify-FW.swf
Institut für Technik der Informationsverarbeitung (ITIV)8 11.04.2023 Dr. Michael Hübner
Experiments
OVPsim Performance for Different Applications
Institut für Technik der Informationsverarbeitung (ITIV)9 11.04.2023 Dr. Michael Hübner
Experiments
N CORES MIPS PER CORE SIM. TIME (s) SIM. INSTR.
4 210.60 4.62 3,892,315,516
8 107.40 9.07 7,792,631,032
16 53.60 18.14 15,585,262,071
32 27.00 36.04 31,170,524,129
64 13.50 72.08 62,341,048,257
Scalability of OVPsim Inside Simplify Framework
Institut für Technik der Informationsverarbeitung (ITIV)10 11.04.2023 Dr. Michael Hübner
Conclusions
Simplify - FW is an OVP front-end which enables:Easy modeling of MPSoCs architectures;
Fast functional/behavioral simulation;
On-line design, simulation, and debug;
Off-line simulation and debug;
Embedded Operating System debugging;
Functional test of embedded applications;
Give it and try:
http://simplify.itiv.kit.edu
Institut für Technik der Informationsverarbeitung (ITIV)11 11.04.2023 Dr. Michael Hübner
Thank you for your [email protected]
Give it and try! http://simplify.itiv.kit.edu