cse245: computer-aided circuit simulation and verification spring 2006 chung-kuan cheng

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CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

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Page 1: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

CSE245: Computer-Aided Circuit Simulation and Verification

Spring 2006

Chung-Kuan Cheng

Page 2: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Administration• CK Cheng, CSE 2130, tel. 534-6184, [email protected]• Lectures: 9:30am ~ 10:50am TTH U413A 2• Office Hours: 11:00am ~ 11:50am TTH CSE2130• Textbooks

Electronic Circuit and System Simulation Methods T.L. Pillage, R.A. Rohrer, C. Visweswariah, McGraw-Hill Interconnect Analysis and Synthesis CK Cheng, J. Lillis, S. Lin, N. Chang, John Wiley & Sons• TA: Vincent Peng ([email protected]), Rui Shi

([email protected])

Page 3: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Outlines

1. Formulation (2-3 lectures)

2. Linear System (3-4 lectures)

3. Matrix Solver (3-4 lectures)

4. Integration (3-4 lectures)

5. Non-linear System (2-3 lectures)

6. Transmission Lines, S Parameters (2-3 lectures)

7. Sensitivity

8. Mechanical, Thermal, Bio Analysis

Page 4: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Grading

• Homeworks and Projects: 60

• Project Presentation: 20%

• Final Report: 20%

Page 5: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Motivation

• Why– Whole Circuit Analysis, Interconnect Dominance

• What– Power, Clock, Interconnect Coupling

• Where– Matrix Solvers, Integration Methods– RLC Reduction, Transmission Lines, S Parameters– Parallel Processing– Thermal, Mechanical, Biological Analysis

Page 6: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Circuit Simulation

Simulator:Solve CdX/dt=f(X) numerically

Input and setup Circuit

Output

Types of analysis:– DC Analysis– DC Transfer curves– Transient Analysis– AC Analysis, Noise, Distortions, Sensitivity

CdX(t)/dt=GX(t)+BU(t)Y=DX(t)+FU(t)

Page 7: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Program Structure (a closer look)

Numerical Techniques:–Formulation of circuit equations

–Solution of ordinary differential equations

–Solution of nonlinear equations

–Solution of linear equations

Input and setup Models

Output

Page 8: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

CSE245: Course Outline• Formulation

– RLC Linear, Nonlinear Components,Transistors, Diodes– Incident Matrix– Nodal Analysis, Modified Nodal Analysis– K Matrix

• Linear System– S domain analysis, Impulse Response – Taylor’s expansion– Moments, Passivity, Stability, Realizability – Symbolic analysis, Y-Delta, BDD analysis

• Matrix Solver – LU, KLU, reordering– Mutigrid, PCG, GMRES

Page 9: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

CSE245: Course Outline (Cont’)• Integration

– Forward Euler, Backward Euler, Trapezoidal Rule– Explicit and Implicit Method, Prediction and Correction– Equivalent Circuit– Errors: Local error, Local Truncation Error, Global Error– A-Stable– Alternating Direction Implicit Method

• Nonlinear System– Newton Raphson, Line Search

• Transmission Line, S-Parameter– FDTD: equivalent circuit, convolution– Frequency dependent components

• Sensitivity• Mechanical, Thermal, Bio Analysis

Page 10: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Lecture 1: Formulation

• KCL/KVL

• Sparse Tableau Analysis

• Nodal Analysis, Modified Nodal Analysis

*some slides borrowed from Berkeley EE219 Course

Page 11: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Formulation of Circuit Equations

• Unknowns– B branch currents (i)– N node voltages (e)– B branch voltages (v)

• Equations– N+B Conservation Laws – B Constitutive Equations

Page 12: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Branch Constitutive Equations (BCE)

Ideal elementsElement Branch Eqn

Resistor v = R·i

Capacitor i = C·dv/dt

Inductor v = L·di/dt

Voltage Source v = vs, i = ?

Current Source i = is, v = ?

VCVS vs = AV · vc, i = ?

VCCS is = GT · vc, v = ?

CCVS vs = RT · ic, i = ?

CCCS is = AI · ic, v = ?

Page 13: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Conservation Laws

• Determined by the topology of the circuit• Kirchhoff’s Voltage Law (KVL): Every circuit

node has a unique voltage with respect to the reference node. The voltage across a branch eb is equal to the difference between the positive and negative referenced voltages of the nodes on which it is incident– No voltage source loop

• Kirchhoff’s Current Law (KCL): The algebraic sum of all the currents flowing out of (or into) any circuit node is zero.– No Current Source Cut

Page 14: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Equation Formulation - KCL

0

1 2

R1G2v3

R3

R4Is5

0

0

11100

00111

5

4

3

2

1

i

i

i

i

i

A i = 0

Kirchhoff’s Current Law (KCL)

N equations

Page 15: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Equation Formulation - KVL

0

1 2

R1G2v3

R3

R4Is5

0

0

0

0

0

10

10

11

01

01

2

1

5

4

3

2

1

e

e

v

v

v

v

v

v - AT e = 0

Kirchhoff’s Voltage Law (KVL)

B equations

Page 16: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Equation Formulation - BCE

0

1 2

R1G2v3

R3

R4Is5

55

4

3

2

1

5

4

3

2

1

4

3

2

1

0

0

0

0

00000

01

000

001

00

0000

00001

sii

i

i

i

i

v

v

v

v

v

R

R

GR

Kvv + i = is B equations

Page 17: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Equation FormulationNode-Branch Incidence Matrix

1 2 3 j B

12

i

N

branches

nodes (+1, -1, 0)

{Aij = +1 if node i is terminal + of branch j-1 if node i is terminal - of branch j0 if node i is not connected to branch j

Page 18: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Equation Assembly (Stamping Procedures)

• Different ways of combining Conservation Laws and Constitutive Equations– Sparse Table Analysis (STA)– Modified Nodal Analysis (MNA)

Page 19: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Sparse Tableau Analysis (STA)

1. Write KCL: Ai=0 (N eqns)

2. Write KVL: v -ATe=0 (B eqns)

3. Write BCE: Kii + Kvv=S (B eqns)

Se

v

i

KK

AI

A

vi

T 0

0

0

0

00N+2B eqnsN+2B unknowns

N = # nodesB = # branches

Sparse Tableau

Page 20: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Sparse Tableau Analysis (STA)

Advantages• It can be applied to any circuit• Eqns can be assembled directly from input

data• Coefficient Matrix is very sparse

ProblemSophisticated programming techniques and datastructures are required for time and memoryefficiency

Page 21: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Nodal Analysis (NA)

1. Write KCL

A·i=0 (N eqns, B unknowns)

2. Use BCE to relate branch currents to branch voltages

i=f(v) (B unknowns B unknowns)

3. Use KVL to relate branch voltages to node voltages

4. v=h(e) (B unknowns N unknowns)

Yne=ins

N eqnsN unknowns

N = # nodesNodal Matrix

Page 22: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Nodal Analysis - ExampleR3

0

1 2

R1G2v3

R4Is5

1. KCL: Ai=02. BCE: Kvv + i = is i = is - Kvv A Kvv = A is

3. KVL: v = ATe A KvATe = A is

Yne = ins

52

1

433

32

32

10

111

111

sie

e

RRR

RG

RG

R

Page 23: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Nodal Analysis

• Example shows NA may be derived from STA

• Better: Yn may be obtained by direct inspection (stamping procedure)– Each element has an associated stamp

– Yn is the composition of all the elements’ stamps

Page 24: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Spice input format: Rk N+ N- Rkvalue

Nodal Analysis – Resistor “Stamp”

kk

kk

RR

RR11

11N+ N-

N+

N-

N+

N-

iRk

sNNk

others

sNNk

others

ieeR

i

ieeR

i

1

1KCL at node N+

KCL at node N-

What if a resistor is connected to ground?

….Only contributes to the

diagonal

Page 25: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Spice input format: Gk N+ N- NC+ NC- Gkvalue

Nodal Analysis – VCCS “Stamp”

kk

kk

GG

GGNC+ NC-

N+

N-

N+

N-

Gkvc

NC+

NC-

+

vc

-

sNCNCkothers

sNCNCkothers

ieeGi

ieeGi KCL at node N+

KCL at node N-

Page 26: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Spice input format: Ik N+ N- Ikvalue

Nodal Analysis – Current source “Stamp”

k

k

I

IN+ N-

N+

N-

N+

N-

Ik

Page 27: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Nodal Analysis (NA)

Advantages• Yn is often diagonally dominant and symmetric• Eqns can be assembled directly from input data• Yn has non-zero diagonal entries• Yn is sparse (not as sparse as STA) and smaller than

STA: NxN compared to (N+2B)x(N+2B)

Limitations• Conserved quantity must be a function of node variable

– Cannot handle floating voltage sources, VCVS, CCCS, CCVS

Page 28: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Modified Nodal Analysis (MNA)

• ikl cannot be explicitly expressed in terms of node voltages it has to be added as unknown (new column)

• ek and el are not independent variables anymore a constraint has to be added (new row)

How do we deal with independent voltage sources?

ikl

k l

+ -Ekl

klkl

l

k

Ei

e

e

011

1

1k

l

Page 29: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

MNA – Voltage Source “Stamp”

N+

ik

N-

+ -Ek

Spice input format: Vk N+ N- Ekvalue

kE

0

00 0 1

0 0 -1

1 -1 0

N+

N-

Branch k

N+ N- ik RHS

Page 30: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Modified Nodal Analysis (MNA)

How do we deal with independent voltage sources?

Augmented nodal matrix

MSi

e

C

BYn

0

Some branch currents

MSi

e

DC

BYn

In general:

Page 31: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

MNA – General rules

• A branch current is always introduced as and additional variable for a voltage source or an inductor

• For current sources, resistors, conductors and capacitors, the branch current is introduced only if:– Any circuit element depends on that branch current– That branch current is requested as output

Page 32: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

MNA – CCCS and CCVS “Stamp”

Page 33: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

MNA – An example

Step 1: Write KCLi1 + i2 + i3 = 0 (1)-i3 + i4 - i5 - i6 = 0 (2)i6 + i8 = 0 (3)i7 – i8 = 0 (4)

0

1 2

G2v3

R4Is5R1

ES6- +

R8

3

E7v3

- +4

+ v3 -R3

Page 34: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

MNA – An exampleStep 2: Use branch equations to eliminate as many branch currents as possible1/R1·v1 + G2 ·v3 + 1/R3·v3 = 0 (1)- 1/R3·v3 + 1/R4·v4 - i6 = is5

(2)i6 + 1/R8·v8 = 0 (3)i7 – 1/R8·v8 = 0 (4)

Step 3: Write down unused branch equationsv6 = ES6 (b6)v7 – E7·v3 = 0

(b7)

Page 35: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

MNA – An exampleStep 4: Use KVL to eliminate branch voltages from previous equations1/R1·e1 + G2·(e1-e2) + 1/R3·(e1-e2) = 0 (1)- 1/R3·(e1-e2) + 1/R4·e2 - i6 = is5 (2)i6 + 1/R8·(e3-e4) = 0 (3)i7 – 1/R8·(e3-e4) = 0 (4)(e3-e2) = ES6 (b6)e4 – E7·(e1-e2) = 0 (b7)

Page 36: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

MNA – An example

0

6

0

0

0

001077

000110

1011

00

0111

00

0100111

0000111

5

7

6

4

3

2

1

88

88

433

32

32

1

ES

i

i

i

e

e

e

e

EE

RR

RR

RRR

RG

RG

R

s

MSi

e

C

BYn

0

Page 37: CSE245: Computer-Aided Circuit Simulation and Verification Spring 2006 Chung-Kuan Cheng

Modified Nodal Analysis (MNA)

Advantages

• MNA can be applied to any circuit

• Eqns can be assembled directly from input data

• MNA matrix is close to Yn

Limitations

• Sometimes we have zeros on the main diagonal