EMU: Motivation and Scenarios of Early (Phase I) Upgrades

CSC: Motivation and Scenarios of Early (Phase I) Upgrades Alexei Safonov (Texas A&M University)For the EMU communityScope of Proposed UpgradesImprove redundancyAdd station ME-4/2 covering h=1.1-1.8Critical for momentum resolutionUpgrade electronics to sustain higher ratesNew DCFEB boards for station ME-1/1 Also a must for increased latencyForces upgrade of downstream EMU electronicsParticularly TMB and DMBUpgrade MPC and CSCTF to handle higher stub rateExtend CSC Efficiency into h=2.1-2.4 regionRobust operation requires TMB upgrade, unganging strips in ME-1a, new DCFEBs, upgrade CSCTF+MPCPossibly not all at the same timeNotes:Points (2) and (3) are achieved simultaneouslySmooth transition to Phase II (no re-upgrades)DisclaimerAlthough hands down the best in CMS, our SLHC simulation has shortcomings:No neutron backgroundsNo beam backgroundsThese can be large effects:Note 2002/007: at LHC Lumi neutron rate is +25% of promptCould be +250% at SLHC (assuming every neutron gives 2-3 hits, quadratic dependence - ask D. Acosta for details)To offset this shortcomings, I use prompt-only rates from simulation w/ 400 PU as a conservative (?) estimate for prompt+non-prompt rates with ~100PU

ME4/2 upgradeR-Z cross-section

Empty YE3 disk ready for ME4/25ME4/2 Upgrade

Efficiency gaps for good quality CSC TF tracks disappear with addition of ME4/2

ME4/2 Upgrade MotivationTriggering with & without the ME4/2 upgrade:Level 1 trigger threshold is reduced from 48 18 GeV/cTarget Rate 5 kHz

Ingo Bloch, Norbert Neumeister, Rick Wilkinson EMU Electronics Upgrades

CFEB Board UpgradeCurrent CFEBs: Self-triggers (pre-LCT) and awaits L1 AcceptSCA: analog charge storage96 capacitors per channel - bottleneckSLHC: 10% of the time SCA overusedPure electronics limitation:ME-1/1 highest rate, needs to be replaced in Phase I

ME-1/1: New Digital (D)CFEBReplace Conventional ADC and SCA storage with Flash ADC and Digital Storage

Deadtimeless, no rate worriesSimilar cost to old systemFairly radical design, i.e. couldnt build 8 years ago

Complex board: analog and digital in one (noise!)Output: skewclear (CFEB) fiber (DCFEB)DCFEB upgrade forces upgrade of TMB and DMBTrigger in High EtaMomentum resolution determined by nearest stationTrigger stub finding efficiency:Green default CSC triggerRed tune current TMB to include high eta

At higher rate pulls down efficiency in the bulk (ME-1b)Independent of DCFEB issue, TMB mezzanine needs replacementCurrent FPGA fullHigh Eta: ME1/1 UngangingHigh-h section of ME1/1Cathode strips are currently ganged 3:1

Challenge for CSC TF:Even with a new TMB a triple ambiguityIncreased combinatorics, larger rate if try all threeNeed to ungang ME-1aCouple with CFEB upgrade: 5 CFEBs 7 DCFEBsChannel 16ElectronicsChannel 1Strips: 1 16 17 32 33 48

MPC and CSCTFMain challenge is higher rate of stubs at higher luminosityCSCTF: needs more power and more links to handle higher rate of input stubs

MPC: remove a bottleneck limit on the number of LCTs (now 3)

Think of lepton jets from dark photons or NMSSM Higgs

N(stubs) in ME1Prob for 2m+PU315%43%Falls under the trigger group roof, but important for this discussionBringing Everything Together#UpgradeMotivationConstraints1Station ME-4/2Trigger rate control in h=1.1-1.8May or may not require a shutdown, requires electronics (new or from ME-1/1)2Digital CFEBs: ME-1/1Old CFEBs cant handle the rateShutdown for installation, finalized DCFEB version3Ungang strips: ME-1aReduce ambiguity (and rate) for CSCTF, improve efficiency in h=2.1-2.4Shutdown, DCFEBs on hand4TMB (mezzanine)Required for triggering h=2.1-2.4, compatibility with DCFEBs Anytime if backwards compatible5DMBCompatibility with DCFEBsAnytime if backwards compatible6MPC and CSC TFHandle high rates of trigger stubAnytime if compatible with TMBQ: Is the specific ordering important? Bringing the Team TogetherVery productive meeting at Ohio State last week:Focus on electronics related issuesA detailed plan developed including a schedule of first prototypesE.g. DCFEB in Fall (OSU), TMB this Summer (TAMU)Loopback , fiber, memory testing (Rice, UCLA, OSU, TAMU) Division of labor:Radiation hardness tests for SEUs (NEU, UF)Interesting possibilities for new groups coming onboard, as well as backup scenarios planning

Schedule Scenario I Now 2012Work on prototypes for DCFEB, TMB, DMBRadiation hardness studiesSetup a facility for ME4/2 chamber production2012 ShutdownInstall mature electronics prototypes on ME-4/2Rigorous testing and commissioning2013-2015Production of ME-4/2 chambers and electronics for ME-1/12015 ShutdownInstall ME-4/2 and upgraded electronics (DCFEB, DMB, TMB) on ME-1/1, old ME-1/1 electronics goes onto ME-4/2MPC and CSC TF upgrade2015-2019Enjoy the rich physics at Phase-I luminosityProduction of electronics for Phase-IIIn this scenario, bulk of the upgrades in 2015Can we do better physics sooner? MaybeAlternative ScenariosNow 2012Work on prototypes for DCFEB, TMB, DMBRadiation hardness studiesSetup a facility for ME4/2 chamber production2012 ShutdownInstall mature electronics prototypes on ME-4/2Rigorous testing and commissioning2013-2015Production of ME-4/2 chambers and electronics for ME-1/1Install new ME-1/1 TMBs during 12 shutdown or soon afterAlso install new MPC and CSCTF?2015 ShutdownInstall ME-4/2 and upgraded electronics (DCFEB, DMB, TMB) on ME-1/1, old ME-1/1 electronics goes onto ME-4/2MPC and CSC TF upgrade2015-2019Enjoy the rich physics at Phase-I luminosityProduction of electronics for Phase-IIQ: What does it give us?Benefits of Early TMB UpgradeRobust LCT triggering up to h=2.4Remember: current TMB was never designed to go beyond 2.1 even for LHC luminosityContinuing triggering at high eta will cause large inefficiency in h=1.6 to 2.4Could be 5% (using prompt-only PU50 as an estimate), could be to more (50% for prompt PU400)17

No reason not to upgrade MPC and CSC TF at the same timeRequirementsBackwards compatibilityCopper connections for old CFEBsFiber inputs available for new dCFEBsEasy upgrade installationSwap mezzanine cardsReplace TMB front panelsNew panel allows dCFEB fiber connectorCan install one crate (9 boards) at a time, ~2 crates per day Forward compatibility:New DCFEBs: plug in fibers and update the TMB firmware

Ongoing Feasibility StudiesFeasibility studies by no means complete yetWorking on new mezzanine prototype (J. Gilmore)Schematic and layout work in progressA prototype planned to be made this summerSNAP-12 fiber components on orderAll other parts (FPGAs, etc) are in handUse Xilinx XC6VLX195T-2FFG1156CESStart backward compatibility tests Current firmware being ported to Virtex-6 by UCLANew firmware soon, TAMU is documenting the algorithm

Technical issues being studied:Heat distribution (regulator test board) Power (e.g. LV could need modifications), radiation hardness tests laterProduction costs are estimated at $400kCredits for Stolen SlidesJ. Hauser et al (UCLA)D. Acosta, I. Furic, A. Madorsky (Florida)B. Bylsma, S. Durkin (OSU)P. Padley, M. Matveev (Rice)J. Gilmore, V. Khotilovich, I. Suarez (TAMU)SummaryPlan of CSC upgrades well established:Shortcomings of the current system are well understood and have been studied in detail using simulationSolutions has been proposed and tested in simulationSchedule has been re-synced with the machine plans and better analysis of available resourcesAdditional resources are being identified including via new institutions coming onboard Planning includes more efficient separation of labor and closer collaboration on common tasksNew options are being considered aiming at improving detector and quality of data well before 2015