cs 61c: great ideas in computer architecture (machine …cs61c/fa17/lec/24/l24 io,dma,disks,… ·...
TRANSCRIPT
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CS61C:GreatIdeasinComputerArchitecture(MachineStructures)
Lecture24:MoreI/O:DMA,Disks,Networking
Instructors:Krste Asanović &RandyH.Katzhttp://inst.eecs.berkeley.edu/~cs61c/fa17
11/21/17 Fall2017 -- Lecture#24 1
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Review:AddressTranslationandProtection
• Every instruction and data access needs address translation and protection checks
Good VM design should be fast (~one cycle) and space efficient
Physical Address
Virtual Address
AddressTranslation
Virtual Page No. (VPN) offset
Physical Page No. (PPN) offset
ProtectionCheck
Exception?
Kernel/User Mode
Read/WriteMiss
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Review:HierarchicalPageTables
Level 1 Page TablePage size 10b à1024 x 4096B Level 2
Page Tables12b à 4096B
Data Pages
page in primary memory page in secondary memory
Root of the CurrentPage Table
p1
p2
Virtual Address
(ProcessorRegister)
PTE of a nonexistent page
p1 p2 offset01112212231
10-bitL1 index
10-bit L2 index
Phys
ical
Mem
ory
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Review:TranslationLookasideBuffers(TLB)Address translation is very expensive!
In a two-level page table, each reference becomes three memory accesses
Solution: Cache some translations in TLBTLB hit Þ Single-Cycle TranslationTLB miss Þ Page-Table Walk to refill
VPN offset
V D tag PPN
physical address PPN offset
virtual address
hit?
(VPN = virtual page number)
(PPN = physical page number)
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VM-relatedEventsinPipeline
• HandlingaTLBmissneedsahw orsw mechanismtorefillTLB– Usuallydoneinhardware
• Handlingapagefault(e.g.,pageisondisk)needsprecise trapsosoftwarehandlercaneasilyresumeafterretrievingpage
• Protectionviolationmayabortprocess
PCInst TLB
Inst. Cache D Decode E M
Data TLB
Data Cache W+
TLB miss? Page Fault?Protection violation?
TLB miss? Page Fault?Protection violation?
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AddressTranslation:PuttingitallTogetherVirtual Address
TLBLookup
Page TableWalk
Update TLBPage Fault(OS loads page)
ProtectionCheck
PhysicalAddress(to cache)
miss hit
the page is Ïmemory Îmemory denied permitted
ProtectionFault
hardwarehardware or softwaresoftware
SEGFAULTWhere?6Fall2017-- Lecture#2411/21/17
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Review:I/O
• “MemorymappedI/O”:Devicecontrol/dataregistersmappedtoCPUaddressspace
• CPUsynchronizeswithI/Odevice:– Polling– Interrupts
• “ProgrammedI/O”:– CPUexecslw/sw instructionsforalldatamovementto/fromdevices– CPUspendstimedoingtwothings:
1. Gettingdatafromdevicetomainmemory2. Usingdatatocompute
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RealityCheck!
• “MemorymappedI/O”:Devicecontrol/dataregistersmappedtoCPUaddressspace
• CPUsynchronizeswithI/Odevice:– Polling– Interrupts
• “ProgrammedI/O”: DMA– CPUexecslw/sw instructionsforalldatamovementto/fromdevices– CPUspendstimedoing2 things:
1. Gettingdatafromdevicetomainmemory2. Usingdatatocompute
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Outline
• DirectMemoryAccess• Review:Disks• Networking• StorageAttachmentEvolution• RackScaleMemory• AndinConclusion…
11/21/17 Fall2017 – Lecture#24 9
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Outline
• DirectMemoryAccess• Disks• Networking• StorageAttachmentEvolution• RackScaleMemory• AndinConclusion…
11/21/17 Fall2017 – Lecture#24 10
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What’sWrongwithProgrammedI/O?
• Notidealbecause…1. CPUhastoexecutealltransfers,couldbedoingotherwork2. Devicespeedsdon’talignwellwithCPUspeeds3. Energycostofusingbeefygeneral-purposeCPUwheresimpler
hardwarewouldsuffice• UntilnowCPUhassolecontrolofmainmemory• 5%ofCPUcyclesonGoogleServersspentinmemcpy()andmemmove()libraryroutines!**Kanev etal.,“Profilingawarehouse-scalecomputer,”ICSA2015,(June2015),Portland,OR.
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PIOvs.DMA
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DirectMemoryAccess(DMA)
• AllowsI/Odevicestodirectlyread/writemainmemory• NewHardware:theDMAEngine• DMAenginecontainsregisterswrittenbyCPU:
– Memoryaddresstoplacedata– #ofbytes– I/Odevice#,directionoftransfer– unitoftransfer,amounttotransferperburst
11/21/17 Fall2017 -- Lecture#24 13
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OperationofaDMATransfer
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[FromSection5.1.4DirectMemoryAccessinModernOperatingSystemsbyAndrewS.Tanenbaum,HerbertBos,2014]
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DMA:IncomingData
1. Receiveinterruptfromdevice2. CPUtakesinterrupt,beginstransfer
– InstructsDMAengine/devicetoplacedata@certainaddress
3. Device/DMAenginehandlethetransfer– CPUisfreetoexecuteotherthings
4. Uponcompletion,Device/DMAengineinterrupttheCPUagain
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DMA:OutgoingData
1. CPUdecidestoinitiatetransfer,confirmsthatexternaldeviceisready
2. CPUbeginstransfer– InstructsDMAengine/devicethatdataisavailable@certainaddress
3. Device/DMAenginehandlethetransfer– CPUisfreetoexecuteotherthings
4. Device/DMAengineinterrupttheCPUagaintosignalcompletion
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DMA:SomeNewProblems
• WhereinthememoryhierarchydoweplugintheDMAengine?Twoextremes:– BetweenL1$andCPU:
• Pro:Freecoherency• Con:TrashtheCPU’sworkingsetwithtransferreddata
– BetweenLast-levelcacheandmainmemory:• Pro:Don’tmesswithcaches• Con:Needtoexplicitlymanagecoherency
11/21/17 Fall2017 -- Lecture#24 17
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Outline
• DirectMemoryAccess• Disks• Networking• AndinConclusion…
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ComputerMemoryHierarchyOneofour“GreatIdeas”
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RackScaleMemory/Storage
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Storage-CentricViewoftheMemoryHierarchy
FileSystemCache
StorageController
CacheEmbedded DiskController Cache
Magnetic Disk StorageDisk Array
Optical Disk Jukebox
Magnetic or Optical Tape Library
Shelved Magnetic or Optical Tape
Solid State Disk
RAM
On-Line
Near-Line
Off-Line
FileSystemCache
StorageController
CacheEmbedded DiskController Cache
Magnetic Disk StorageDisk Array
Optical Disk Jukebox
Magnetic or Optical Tape Library
Shelved Magnetic or Optical Tape
Solid State Disk
RAM
On-Line
Near-Line
Off-Line
11/21/17 Fall2017 -- Lecture#24 20
PreviousSlide!
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21
DRAM
FlashDisk
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DiskDevicePerformance(1/2)
• DiskAccessTime=SeekTime+RotationTime+TransferTime+ControllerOverhead– SeekTime=timetopositiontheheadassemblyatthepropercylinder– RotationTime=timeforthedisktorotatetothepointwherethefirstsectorsoftheblockto
accessreachthehead– TransferTime=timetakenbythesectorsoftheblockandanygapsbetweenthemtorotatepast
thehead
Platter
Arm
Actuator
HeadSectorInnerTrack
OuterTrack
ControllerSpindle
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DiskDevicePerformance(2/2)
• Averagevaluestoplugintotheformula:• RotationTime:Averagedistanceofsectorfromhead?
– 1/2timeofarotation• 7200RevolutionsPerMinuteÞ 120Rev/sec• 1revolution=1/120secÞ 8.33milliseconds• 1/2rotation(revolution)Þ 4.17ms
• Seektime:Averageno.trackstomovearm?– Numberoftracks/3(seeCS186forthemath)– Then,seektime=numberoftracksmoved× timetomoveacrossonetrack
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Butwait!
• Performanceestimatesaredifferentinpractice• Moderndiskshaveon-diskcaches,whicharehiddenfromtheoutsideworld– Generally,whatlimitsrealperformanceistheon-diskcacheaccesstime
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FlashMemory/SSDTechnology
• NMOStransistorwithanadditionalconductorbetweengateandsource/drainwhich“traps”electrons.Thepresence/absenceisa1or0
• Memorycellscanwithstandalimitednumberofprogram-erasecycles.ControllersuseatechniquecalledwearlevelingtodistributewritesasevenlyaspossibleacrossalltheflashblocksintheSSD.
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Administrivia (1/2)• Project3.2(PerformanceContest)hasbeenreleased
– Upto5extracreditpointsforthehighestspeedups• Finalexam:
– 14December,7-10PM@TBA– ContactheadTA(StevenHo)aboutconflictsifyouhaven’tbeencontactedyet
– ReviewLecturesandBookwitheyeontheimportantconceptsofthecourse
• ReviewSessionFriDec8,5-8PM@TBA• ElectronicCourseEvaluationsstartingthisweek!Seehttps://course-evaluations.berkeley.edu
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Administrivia (2/2)• HW6party tonightnight (Nov21)inthe Woz from 5-8PM
• Nodiscussionsorlabsthisweek!– LabsresumeMondayafterThanksgiving
• Lab11dueinanylabbeforeDecember1• Lab13dueinanyOHbeforeDecember8
• Homework6duetomorrownight• Project4tobereleasedFridaylatest• Homework7tobereleasedMondayafterbreak11/21/17 Fall2017 -- Lecture#24 27
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WinnersoftheProject3PerformanceCompetition!
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HappyBirthdayRAID:11/20/87
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RAID(RedundantArraysofInexpensiveDisks)coveredinnextTuesday’slecture!
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HappyBirthdayInternet!11/21/69
30
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CS61cintheNews:Supercomputerina
FileDrawer“TheRaspberryPimodulesletdevelopersfigureouthowtowritethissoftwareandgetittoworkreliablywithouthavingadedicatedtestbedofthesamesize,whichwouldcostaquarterbilliondollarsanduse25megawattsofelectricity.”
GaryGrider,leaderoftheHighPerformanceComputingDivision
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3211/21/17 Fall2017 - Lecture#24
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PeerInstructionQuestion• Wehavethefollowingdisk:
– 15000Cylinders,1ms tocross1000Cylinders– 15000RPM=4ms perrotation– Wanttocopy1MB,transferrateof1000MB/s– 1ms controllerprocessingtime
• Whatistheaccesstimeusingourmodel?
DiskAccessTime=SeekTime+RotationTime+TransferTime+ControllerProcessingTime
A B C D
10.5 ms 9 ms 8.5ms 11.5ms
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Outline
• DirectMemoryAccess• Disks• Networking• StorageAttachmentEvolution• RackScaleMemory• AndinConclusion…
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Networks:TalkingtotheOutsideWorld
• OriginallysharingI/Odevicesbetweencomputers– E.g.,printers
• Thencommunicatingbetweencomputers– E.g.,filetransferprotocol
• Thencommunicatingbetweenpeople– E.g.,e-mail
• Thencommunicatingbetweennetworksofcomputers– E.g.,filesharing,www,…
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• History– 1963:JCRLicklider,whileatDoD’s ARPA,writesamemodescribingdesiretoconnectthecomputersatvariousresearchuniversities:Stanford,Berkeley,UCLA,...
– 1969:ARPAdeploys4“nodes”@UCLA,SRI,Utah,&UCSB
– 1973RobertKahn&Vint CerfinventTCP,nowpartoftheInternetProtocolSuite
• Internetgrowthrates– Exponentialsincestart!
TheInternet(1962)www.computerhistory.org/internet_history
www.greatachievements.org/?id=3736en.wikipedia.org/wiki/Internet_Protocol_Suite
“Lick”
Vint Cerf“Revolutions like this don't
come along very often”
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• “SystemofinterlinkedhypertextdocumentsontheInternet”
• History– 1945:Vannevar Bushdescribeshypertextsystemcalled“memex”inarticle
– 1989:SirTimBerners-LeeproposedandimplementedthefirstsuccessfulcommunicationbetweenaHypertextTransferProtocol(HTTP)clientandserverusingtheinternet.
– ~2000Dot-comentrepreneursrushedin,2001bubbleburst
• Today:Accessanywhere!
TheWorldWideWeb(1989)en.wikipedia.org/wiki/History_of_the_World_Wide_Web
Tim Berners-LeeWorld’s First web
server in 1990
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Sharedvs.Switch-BasedNetworks
• Sharedvs.Switched:• Shared:1atatime(CSMA/CD)• Switched: pairs(“point-to-point”connections)communicateatsametime
• Aggregatebandwidth(BW)inswitchednetworkismanytimesthatofshared:• Point-to-pointfastersincenoarbitration,simplerinterface
Node Node Node
Shared
CrossbarSwitch
Node
Node
Node
Node
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WhatMakesNetworksWork?• Links connectingswitchesand/orrouters toeachotherandtocomputersordevices
Computer
networkinterface
switch
switch
switch
• Abilitytonamethecomponentsandtoroutepacketsofinformation-messages- fromasourcetoadestination
• Layering,redundancy,protocols,andencapsulationasmeansofabstraction(61Cbigidea)
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SoftwareProtocoltoSendandReceive• SWSendsteps
1:ApplicationcopiesdatatoOSbuffer2:OScalculateschecksum,startstimer3:OSsendsdatatonetworkinterfaceHWandsaysstart
• SWReceivesteps3:OScopiesdatafromnetworkinterfaceHWtoOSbuffer2:OScalculateschecksum,ifOK,sendACK;ifnot,deletemessage (senderresendswhentimerexpires)
1:IfOK,OScopiesdatatouseraddressspace,&signalsapplicationtocontinue
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Header Payload
Checksum
TrailerCMD/Address/DataNetID NetID Len ACK
INFO
Dest Src
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NetworksarelikeOgres
https://www.youtube.com/watch?v=_bMcXVe8zIs
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Protocols for Networks of Networks?Whatdoesittaketosendpacketsacrosstheglobe?• Bitsonwireorair• Packetsonwireorair• Deliverypacketswithinasinglephysicalnetwork• Deliverpacketsacrossmultiplenetworks• Ensurethedestinationreceivedthedata• Createdataatthesenderandmakeuseofthedataatthereceiver
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Lotstodoandatmultiplelevels!
Useabstraction tocopewithcomplexityofcommunication
•Networksarelikeogres onions•Hierarchyoflayers:
- Application(chatclient,game,etc.)- Transport(TCP,UDP)- Network(IP)- DataLinkLayer(ethernet)- PhysicalLink(copper,wireless,etc.)
ProtocolforNetworksofNetworks?
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ProtocolFamilyConcept• Protocol:packetstructureandcontrolcommandstomanagecommunication
• Protocolfamilies(suites):asetofcooperatingprotocolsthatimplementthenetworkstack
• Keytoprotocolfamilies isthatcommunicationoccurslogically atthesameleveloftheprotocol,calledpeer-to-peer…
…butisimplementedviaservicesatthenextlowerlevel• Encapsulation:carryhigherlevelinformationwithinlowerlevel“envelope”
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Dear Bill,
Your days are numbered.
--Steve
• CEO A writes letter to CEO B– Folds letter and hands it to assistant
• Assistant:– Puts letter in envelope with CEO B’s full name– Takes to FedEx
• FedEx Office– Puts letter in larger envelope– Puts name and street address on FedEx envelope– Puts package on FedEx delivery truck
• FedEx delivers to other company
Inspiration …
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CEO
Aide
FedEx
CEO
Aide
FedExLocationFedex Envelope(FE)
The Path of the Letter
Letter
Envelope
SemanticContent
Identity
“Peers”oneachsideunderstandthesamethingsNooneelseneedsto
Lowestlevelhasmostpackaging
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ProtocolFamilyConcept
Message Message
TH Message TH Message TH TH
Actual Actual
Physical
Message TH Message THActual Actual
Logical
Logical
Eachlowerlevelofstack“encapsulates”informationfromlayerabovebyaddingheaderandtrailer
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MostPopularProtocolforNetworkofNetworks
• TransmissionControlProtocol/InternetProtocol(TCP/IP)• ThisprotocolfamilyisthebasisoftheInternet,aWAN(wideareanetwork)protocol– IPmakesbestefforttodeliver– Packetscanbelost,corrupted– TCPguaranteesdelivery– TCP/IPsopopularitisusedevenwhencommunicatinglocally:evenacrosshomogeneousLAN(localareanetwork)
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Message
TCP/IPPacket,EthernetPacket,Protocols
• Applicationsendsmessage
TCP data
TCP HeaderIP Header
IP DataEH
Ethernet Hdr
Ethernet Hdr• TCPbreaksinto64KiBsegments,adds20Bheader
• IPadds20Bheader,sendstonetwork
• IfEthernet,brokeninto1500Bpacketswithheaders,trailers
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5011/21/17 Fall2017 - Lecture#20
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Outline
• DirectMemoryAccess• Disks• Networking• StorageAttachmentEvolution• RackScaleMemory• AndinConclusion…
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StorageAttachmentEvolution
Host
OS
Disk Interface (DI)
AllocationTable
Disk, Cylinder,Track,
Sector
LAN
Host
Host
HostNetwork
FileServer
OS
NetworkInterface
(NI)
NetworkInterface
(NI)
NetworkInterface
(NI)
File Name, Offset, LengthDirectAttachment
NetworkServerAttachment
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StorageAttachmentEvolution
DiskStorage
Subsystem
WorkStation
MainFrame
MainFrame
ChannelInterface
OSOSLUN,
Offset,Length
LUNToPHY
LAN
Host
Host
Host
NetworkFile
Server
OS
NetworkInterface
(NI)
NetworkInterface
(NI)
NetworkInterface (NI)
Network-attachedStorage (NAS)
OSOS
File Name, Offset, Length
Disk, Cylinder,Track, Sector
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NetworkAttached
ChannelAttached
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OpticalDisk
StorageSubsystem
SAN
MainFrame
DiskStorage
Subsystem
TapeStorage
Subsystem
ChannelInterface
LAN
Host
Host
Host
NetworkInterface
(NI)
NetworkInterface
(NI)
NetworkInterface
(NI)
File Name, Offset, Length
FileServer
FileServer
FileServer
CI
LUN,Offset,Length
Gateway
WAN
Gateway
LAN SAN
MainFrame
FS DSS
Remote SAN
CI
CI
CI
LUN,Offset, Length
PHY Device,Cyl, Trk, Sector
StorageAttachmentEvolution
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StorageAreaNetworks(SAN)
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Outline
• DirectMemoryAccess• Disks• Networking• StorageAttachmentEvolution• RackScaleMemory• AndinConclusion…
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StorageClassMemoryakaRack-ScaleMemory
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StorageClassMemoryakaRack-ScaleMemory
• Highbandwidthandlowlatencythroughasimplifiedinterfacebasedonmemorysemantics(i.e.,ld/st),scalablefromtenstoseveralhundredGB/secofbandwidth,withsub-100nanosecs load-to-usememorylatency
• Supportsscalablememorypoolsandresourcesforreal-timeanalyticsandin-memoryapplications(i.e.,map-reduce)
• Highlysoftwarecompatiblewithnorequiredchangestotheoperatingsystem
• Scalesfromsimple,lowcostconnectivitytohighlycapable,rackscaleinterconnect
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StorageClassMemoryakaRack-ScaleMemory
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CheaperthanDRAMMoreexpensivethandiskNon-Volatileandfasterthandisk
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StorageClassMemoryakaRackScaleMemory
• Systemmemoryisflatorshrinking– Memorybandwidthpercorecontinuestodecrease– Memorycapacitypercoreisgenerallyflat– MemoryischangingonadifferentcadencecomparedtotheCPU
• Dataisgrowing– Datathatrequiresreal-timeanalysisisgrowingexponentially– Thevalueoftheanalysisdecreasesifittakestoolongtoprovideinsights
• Industryneedsanopenarchitecturetosolvetheproblems– Memorytierswillbecomeincreasinglyimportant– Rack-scalecomposability requiresahighbandwidth,lowlatencyfabric– MustseamlesslyplugintoexistingecosystemswithoutrequiringOSchanges
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RemoteDirectMemoryAccess
60
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RemoteDirectMemoryAccess
61
ConventionalNetworking
Cut-throughMemoryaccessOvernetwork
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Outline
• DirectMemoryAccess• Disks• Networking• RackScaleMemory• And,inConclusion…
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“And,inConclusion…”
• I/Ogivescomputerstheir5senses• I/Ospeedrangeis100-milliontoone• DMAtoavoidwastingCPUtimeondatatransfers• Disksforpersistentstorage,beingreplacedbyflashandemerging“storageclassmemory”
• Networks:computer-to-computerI/O– Protocolsuitesallownetworkingofheterogeneouscomponents.GreatIdea:LayersandAbstraction
– Emergingclass:Rack-scale/Storage-classMemoryaccessibleoverRDMAorothernetworkinterconnect
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