cs 333 introduction to operating systems class 9 - memory management
DESCRIPTION
Jonathan Walpole Computer Science Portland State University. CS 333 Introduction to Operating Systems Class 9 - Memory Management. Memory management. Memory – a linear array of bytes Holds O.S. and programs (processes) Each memory cell is named by a unique memory address - PowerPoint PPT PresentationTRANSCRIPT
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CS 333Introduction to Operating Systems
Class 9 - Memory Management
Jonathan WalpoleComputer Science
Portland State University
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Memory management
Memory – a linear array of bytes Holds O.S. and programs (processes) Each memory cell is named by a unique memory
address Recall, processes are defined by an address
space, consisting of text, data, and stack regions Process execution
CPU fetches instructions from the text region according to the value of the program counter (PC)
Each instruction may request additional operands from the data or stack region
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Addressing memory
Cannot know ahead of time where in memory a program will be loaded!
Compiler produces code containing embedded addresses
these addresses can’t be absolute ( physical addresses)
Linker combines pieces of the program Assumes the program will be loaded at address 0
We need to bind the compiler/linker generated addresses to the actual memory locations
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Relocatable address generation
Prog P : : foo() : :End P
P: : push ... jmp _foo :
foo: ...
P: : push ... jmp 75 :
foo: ...
0
75
P: : push ... jmp 175 :
foo: ...
0
100
175
LibraryRoutines
P: : push ... jmp 1175 :
foo: ...
1000
1100
1175
LibraryRoutines
Compilation Assembly Linking Loading
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Address binding
Address binding fixing a physical address to the logical address of a
process’ address space
Compile time binding if program location is fixed and known ahead of time
Load time binding if program location in memory is unknown until run-time
AND location is fixed
Execution time binding if processes can be moved in memory during execution Requires hardware support!
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P: : push ... jmp 175 :
foo: ...
0
100
175
LibraryRoutines
P: : push ... jmp 1175 :
foo: ...
1000
1100
1175
LibraryRoutines
P: : push ... jmp 1175 :
foo: ...
1000
1100
1175
LibraryRoutines
P: : push ... jmp 175 :
foo: ...
0
100
175
LibraryRoutines
1000
Base register
Execution Time Address
Binding
Load Time Address Binding
Compile Time Address Binding
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Runtime binding – base & limit registers
Simple runtime relocation scheme Use 2 registers to describe a partition
For every address generated, at runtime... Compare to the limit register (& abort if larger) Add to the base register to give physical memory
address
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Dynamic relocation with a base register
Memory Management Unit (MMU) - dynamically converts logical addresses into physical address
MMU contains base address register for running process
process i
Operatingsystem
Max addr
0
Max Mem
0
Physical memory address
Relocation register for process i
1000
+MMU
Program generated address
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Protection using base & limit registers
Memory protection Base register gives starting address for process Limit register limits the offset accessible from the
relocation register
base
+
Physicaladdress memory
register
<
limitregister
yes
no
addressing error
logicaladdress
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Multiprogramming with base and limit registers
Multiprogramming: a separate partition per process
What happens on a context switch? Store process A’s base and limit register values Load new values into base and limit registers for
process B
OSPartition A
Partition B
Partition C
Partition D
Partition E
base
limit
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Swapping
When a program is running... The entire program must be in memory Each program is put into a single partition
When the program is not running... May remain resident in memory May get “swapped” out to disk
Over time... Programs come into memory when they get swapped
in Programs leave memory when they get swapped out
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Basics - swapping
Benefits of swapping: Allows multiple programs to be run concurrently … more than will fit in memory at once
Max mem
0
Operatingsystem
Process j
Process i
Process m
Process k
Swap in
Swap out
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Swapping can lead to fragmentation
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Dealing with fragmentation
Compaction – from time to time shift processes around to collect all free space into one contiguous block
Placement algorithms: First-fit, best-fit, worst-fit
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Influence of allocation policy
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BEST-FIT
FIRST-FIT
O.S.O.S.O.S.O.S.O.S.O.S.
O.S.O.S.O.S.O.S.O.S.
1. Scan2. Compact
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How big should partitions be?
Programs may want to grow during execution More room for stack, heap allocation, etc
Problem: If the partition is too small programs must be moved Requires modification of base and limit regs Why not make the partitions a little larger than
necessary to accommodate “some” growth?
Fragmentation: External fragmentation = unused space between
partitions Internal fragmentation = unused space within partitions
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Allocating extra space within partitions
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Managing memory
Each chunk of memory is either Used by some process or unused (“free”)
Operations Allocate a chunk of unused memory big enough to
hold a new process Free a chunk of memory by returning it to the free
pool after a process terminates or is swapped out
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Managing memory with bit maps
Problem - how to keep track of used and unused memory?
Technique 1 - Bit Maps A long bit string One bit for every chunk of memory
1 = in use0 = free
Size of allocation unit influences space required• Example: unit size = 32 bits
– overhead for bit map: 1/33 = 3%• Example: unit size = 4Kbytes
– overhead for bit map: 1/32,769
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Managing memory with bit maps
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Managing memory with linked lists
Technique 2 - Linked List
Keep a list of elements Each element describes one unit of memory
Free / in-use Bit (“P=process, H=hole”) Starting address Length Pointer to next element
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Managing memory with linked lists
0
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Merging holes
Whenever a unit of memory is freed we want to merge adjacent holes!
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Merging holes
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Merging holes
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Merging holes
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Merging holes
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Managing memory with linked lists
Searching the list for space for a new process First Fit Next Fit
• Start from current location in the list• Not as good as first fit
Best Fit• Find the smallest hole that will work• Tends to create lots of little holes
Worst Fit• Find the largest hole• Remainder will be big
Quick Fit• Keep separate lists for common sizes
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Fragmentation
Memory is divided into partitions Each partition has a different size Processes are allocated space and later freed After a while memory will be full of small holes!
No free space large enough for a new process even though there is enough free memory in total
This is external fragmentation If we allow free space within a partition we have
internal fragmentation
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Solution to fragmentation?
Allocate memory in equal fixed size units? Reduces external fragmentation problems But what about wasted space inside a unit due to
internal fragmentation?
How big should the units be? The smaller the better for internal fragmentation The larger the better for management overhead
Can we use a unit size smaller than the memory needed by a process?
Ie, allocate non-contiguous units to the same process? … but how would the base and limit registers work?
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Using pages for non-contiguous allocation
Memory divided into fixed size page frames Page frame size = 2n bytes Lowest n bits of an address specify byte offset in page
But how do we associate page frames with processes?
And how do we map memory addresses within a process to the correct memory byte in a page frame?
Solution Processes use virtual addresses CPU uses physical addresses hardware support for virtual to physical address
translation
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Virtual addresses
Virtual memory addresses (what the process uses)
Page number plus byte offset in page Low order n bits are the byte offset Remaining high order bits are the page number
bit 0bit n-1bit 31
20 bits 12 bits
offsetpage number
Example: 32 bit virtual addressPage size = 212 = 4KBAddress space size = 232 bytes = 4GB
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Physical addresses
Physical memory addresses (what the CPU uses) Page frame number plus byte offset in page Low order n bits are the byte offset Remaining high order bits are the page frame
number
bit 0bit n-1bit 24
12 bits 12 bits
offsetPage frame number
Example: 24 bit physical addressPage frame size = 212 = 4KBMax physical memory size = 224 bytes = 16MB
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Address translation
Hardware maps page numbers to page frame numbers
Memory management unit (MMU) has multiple registers for multiple pages
Like a base register except its value is substituted for the page number rather than added to it
Why don’t we need a limit register for each page?
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Memory Management Unit (MMU)
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Virtual address spaces
Here is the virtual address space (as seen by the process)
Lowest address
Highest address
Virtual Addr Space
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Virtual address spaces
The address space is divided into “pages” In SPANK, the page size is 8K
Page 0
Page N
Page 1
Virtual Addr Space
01234567
N
A Page
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Virtual address spaces
In reality, only some of the pages are used
Virtual Addr Space
01234567
N
Unused
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Physical memory
Physical memory is divided into “page frames” (Page size = frame size)
Physical memoryVirtual Addr Space
01234567
N
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Virtual and physical address spaces
Some page frames are used to hold the pages of this process
These framesare used forthis process
Virtual Addr Space Physical memory
01234567
N
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Virtual and physical address spaces
Some page frames are used for other processes
Used byother processes
Virtual Addr Space Physical memory
01234567
N
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Virtual address spaces
Address mappings say which frame has which page
Virtual Addr Space Physical memory
01234567
N
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Page tables
Virtual Addr Space Physical memory
01234567
N
Address mappings are stored in a page table in memory
One page table entry per page... Is this page in memory? If so, which frame is it in?
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Address mappings and translation
Address mappings are stored in a page table in memory
Typically one page table for each process
Address translation is done by hardware (ie the MMU)
How does the MMU get the address mappings? Either the MMU holds the entire page table (too
expensive) Or the MMU holds a portion of the page table
• MMU caches page table entries• called a translation look-aside buffer (TLB)
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Address mappings and translation
What if the TLB needs a mapping it doesn’t have?
Software managed TLB it generates a TLB-miss fault which is handled by the
operating system (like interrupt or trap handling) The operating system looks in the page tables, gets
the mapping from the right entry, and puts it in the TLB
Hardware managed TLB it looks in a pre-specified memory location for the
appropriate entry in the page table The hardware architecture defines where page
tables must be stored in memory
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The SPANK architecture
Page size 8 Kbytes
Virtual addresses (“logical addresses”) 24 bits --> 16 Mbyte virtual address space 2K Pages --> 11 bits for page number
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The SPANK architecture
Page size 8 Kbytes
Virtual addresses (“logical addresses”) 24 bits --> 16 Mbyte virtual address space 2K Pages --> 11 bits for page number
An address:
012132311 bits 13 bits
offsetpage number
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The SPANK architecture
Physical addresses 32 bits --> 4 Gbyte installed memory (max) 512K Frames --> 19 bits for frame number
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The SPANK architecture
Physical addresses 32 bits --> 4 Gbyte installed memory (max) 512K Frames --> 19 bits for frame number
012133119 bits 13 bits
offsetframe number
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The SPANK architecture
The page table mapping: Page --> Frame
Virtual Address:
Physical Address:
012132311 bits
012133119 bits
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The SPANK page table
An array of “page table entries” Kept in memory
2K pages in a virtual address space? ---> 2K entries in the table
Each entry is 4 bytes long 19 bits The Frame Number 1 bit Valid Bit 1 bit Writable Bit 1 bit Dirty Bit 1 bit Referenced Bit 9 bits Unused (and available for OS algorithms)
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Example from the textbook
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The SPANK page table
Two page table related registers in the CPU Page Table Base Register Page Table Length Register
These define the “current” page table. Must be saved and restored on context switch
Bits in the CPU “status register”“System Mode”“Interrupts Enabled”“Paging Enabled”
1 = Perform page table translation for every memory access
0 = Do not do translation
![Page 63: CS 333 Introduction to Operating Systems Class 9 - Memory Management](https://reader036.vdocuments.us/reader036/viewer/2022062719/568132a8550346895d994b68/html5/thumbnails/63.jpg)
The SPANK page table
0121331frame number D R W Vunused
dirty bit
referenced bit
writable bit
valid bit
19 bits
![Page 64: CS 333 Introduction to Operating Systems Class 9 - Memory Management](https://reader036.vdocuments.us/reader036/viewer/2022062719/568132a8550346895d994b68/html5/thumbnails/64.jpg)
The SPANK page table
0121331frame number D R W Vunused
frame number D R W Vunused
frame number D R W Vunused
frame number D R W Vunused
frame number D R W Vunused
01
2
2K
page table base register
Indexed by the page frame number
![Page 65: CS 333 Introduction to Operating Systems Class 9 - Memory Management](https://reader036.vdocuments.us/reader036/viewer/2022062719/568132a8550346895d994b68/html5/thumbnails/65.jpg)
The SPANK page table
0121323page number offset
0121331frame number D R W Vunused
frame number D R W Vunused
frame number D R W Vunused
frame number D R W Vunused
frame number D R W Vunused
01
2
2K
page table base registervirtual address
![Page 66: CS 333 Introduction to Operating Systems Class 9 - Memory Management](https://reader036.vdocuments.us/reader036/viewer/2022062719/568132a8550346895d994b68/html5/thumbnails/66.jpg)
The SPANK page table
0121323page number offset
031
0121331frame number D R W Vunused
frame number D R W Vunused
frame number D R W Vunused
frame number D R W Vunused
frame number D R W Vunused
01
2
2K
page table base registervirtual address
physical address
![Page 67: CS 333 Introduction to Operating Systems Class 9 - Memory Management](https://reader036.vdocuments.us/reader036/viewer/2022062719/568132a8550346895d994b68/html5/thumbnails/67.jpg)
The SPANK page table
0121323page number offset
0121331offset
0121331frame number D R W Vunused
frame number D R W Vunused
frame number D R W Vunused
frame number D R W Vunused
frame number D R W Vunused
01
2
2K
page table base registervirtual address
physical address
![Page 68: CS 333 Introduction to Operating Systems Class 9 - Memory Management](https://reader036.vdocuments.us/reader036/viewer/2022062719/568132a8550346895d994b68/html5/thumbnails/68.jpg)
The SPANK page table
0121323page number offset
0121331offset
0121331frame number D R W Vunused
frame number D R W Vunused
frame number D R W Vunused
frame number D R W Vunused
frame number D R W Vunused
01
2
2K
page table base register virtual address
physical address
![Page 69: CS 333 Introduction to Operating Systems Class 9 - Memory Management](https://reader036.vdocuments.us/reader036/viewer/2022062719/568132a8550346895d994b68/html5/thumbnails/69.jpg)
The SPANK page table
0121323page number offset
0121331offset
0121331frame number D R W Vunused
frame number D R W Vunused
frame number D R W Vunused
frame number D R W Vunused
frame number D R W Vunused
01
2
2K
page table base register virtual address
physical address
frame number
![Page 70: CS 333 Introduction to Operating Systems Class 9 - Memory Management](https://reader036.vdocuments.us/reader036/viewer/2022062719/568132a8550346895d994b68/html5/thumbnails/70.jpg)
Quiz
What is the difference between a virtual and a physical address?
What is address binding? Why are programs not usually written using
physical addresses? Why is hardware support required for dynamic
address translation? What is a page table used for? What is a TLB used for? How many address bits are used for the page
offset in a system with 2KB page size?
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Spare Slides
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Making systems more usable
Dynamic Loading - load only those routines that are accessed while running +) Does not load unused routines
Dynamic Linking - link shared code such as system libraries and window code until run-time
+) More efficient use of disk space
Overlays - allows procedures to “overlay” each other to decrease the memory size required to run the program
+) Allows more programs to be run+) Programs can be larger than memory
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Basics - overlays
Overlays - allow different parts of the same program to “overlay” each other in memory to reduce the memory requirements
Example - scanner program
140 k
Image editing code
120 k
Capture code
100k window init, data structures
20 k overlay driver
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Memory management architectures
Fixed size allocation Memory is divided into fixed partitions Fixed Partitioning (partition > proc. size)
• Different constant size partitions Paging (partition < proc. size)
• Constant size partitions
Dynamically sized allocation Memory allocated to fit processes exactly
• Dynamic Partitioning (partition > proc. size)• Segmentation
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O.S.
Job Queues
0
500k
1200k
2800k
5000kMEMORY
P1
P2
P3
Multiprogramming with fixed partitions
Memory is divided into fixed size partitions Processes loaded into partitions of equal or
greater size
Internal Fragmentation
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Multiprogramming with fixed partitions
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Dynamic partitioning
Allocate contiguous memory equal to the process size
Corresponds to one job queue for memory
O.S.
Job Queue
0
500k
5000kMEMORY
P1
P2
P3
P4
External Fragmentation