cs 325: cs hardware and software organization and architecture
DESCRIPTION
CS 325: CS Hardware and Software Organization and Architecture. Integers and Arithmetic Part 3. Outline. 2’s Complement Binary Addition 2’s Complement Binary Subtraction Binary Multiplication Unsigned 2’s Complement Multiplication Booth’s Algorithm Binary Division Unsigned - PowerPoint PPT PresentationTRANSCRIPT
+Outline
2’s Complement Binary Addition
2’s Complement Binary Subtraction
Binary Multiplication Unsigned 2’s Complement Multiplication Booth’s Algorithm
Binary Division Unsigned 2’s Complement Division
+2’s Complement Binary Addition
-39 + 92 = 53
1 1 1 1
1 1 0 1 1 0 1 1
+0 1 0 1 1 1 0 0
0 0 1 1 0 1 0 1
Carryout without overflow. Sum is correct.
+2’s Complement Binary Addition
104 + 45 = 149
1 1 1
0 1 1 0 1 0 0 0
+0 0 1 0 1 1 0 1
1 0 0 1 0 1 0 1
No carryout, Overflow. Sum is not correct.
+2’s Complement Binary Addition
-75 + 59 = -16
1 1 1 1 1 1
1 0 1 1 0 1 0 1
+0 0 1 1 1 0 1 1
1 1 1 1 0 0 0 0
No carryout, no overflow. Sum is correct.
+2’s Complement Binary Addition
127 + 1 = 128
1 1 1 1 1 1 1
0 1 1 1 1 1 1 1
+0 0 0 0 0 0 0 1
1 0 0 0 0 0 0 0
No carryout, overflow. Sum is not correct.
+2’s Complement Binary Subtraction
Subtraction Rule: To subtract one number, S, from another number,
M, take the 2’s complement of the number S and add it to the number M.
Example: 11 – 4, we will negate 5 using 8-bit 2’s comp and
add11: 0000 1011 4: 0000 0100 1111 1100 (negate 4) and add 1 1 1 1 0 0 0 0 1 0 1 1 +1 1 1 1 1 1 0 0 0 0 0 0 0 1 1 1 +710
+2’s Complement Binary Subtraction
Example: Subtract 7 from 2 (2 – 7):
Convert to 4-bit 2s comp: 7 0111 2 0010
Perform 2s comp on 7: 0111 1001
Now add: 0 0 1 0
+1 0 0 1 1 0 1 1
The value 1011 represented in 2’s comp converts to -510
+2’s Complement Binary Subtraction
Another Example:-23 – 6, we will negate 6 using 8-bit
2’s comp and add-23: 1110 1001 6: 0000 0110 1111 1010 (negate 6) and add 1 1 1 1 1 1 1 0 1 0 0 1 +1 1 1 1 1 0 1 0 1 1 1 0 0 0 1 1 -2910
+2’s Complement Binary Subtraction
Try:17 – (-6), we will negate 6 using 8-bit
2’s comp and add17: 0001 0001 -6: 1111 1010 0000 0110 (negate 6) and add 0 0 0 1 0 0 0 1 +0 0 0 0 0 1 1 0 0 0 0 1 0 1 1 1 +2310
+2’s Complement Binary Subtraction
Another Example: 12 – 123, we will negate 123 using 8-bit 2’s
comp and add12: 0000 1100 123: 0111 1011 1000 0101 (negate 123) and add
0 0 0 0 1 1 0 0 +1 0 0 0 0 1 0 1 1 0 0 1 0 0 0 1 +11110
No Carry, with overflow. Difference is not correct.
+Unsigned Binary Multiplication
Quite Easy. Rules to remember:
0 * 1 = 0 1 * 1 = 1
Same as logical “and” operation
Multiplying an m-bit number by and n-bit number results in an n+m-bit number. This n+m-bit width ensures overflow cannot occur.
Simple Example: m = n = 2
2x3 = 6 102 x 112 = 1102
Largest 2-bit value: 11 or 310
112 x 112 = 10012 or 910
+Unsigned Binary Multiplication
Example:
1 0 1 0
x0 1 1 0
0 0 0 0
1 0 1 0
1 0 1 0
+0 0 0 0______
0 1 1 1 1 0 0
+2’s Complement Binary Multiplication
Still Easy:Only difference between 2’s comp multiply and unsigned multiply:Sign extend both values to twice as many bits.Ex: 1 1 0 0 1 1 1 1 1 1 0 0
x0 1 0 1 x0 0 0 0 0 1 0 0
The result will be stored in m+n least significant bits.
+2’s Complement Binary Multiplication
Example:
1 1 1 0 1 1 1 1 1 1 1 0
0 0 1 1 x0 0 0 0 0 0 1 1
1 1 1 1 1 1 1 0
+ 1 1 1 1 1 1 1 0__
0 1 1 1 1 1 0 1 0
Result located in m+n (4+4) least significant bits.
1 1 1 1 1 0 1 0 -610
+2’s Complement Binary Multiplication
Efficiency of this method?To perform a multiply instruction, product bit-width needs to be 2N when using N-bit values.
Multiply instruction?Requires more complex hardware with signed values.
Better way?
+2’s Complement Binary Multiplication – Booth’s Algorithm Multiplication by bit shifting and addition.
Removes the need for multiply circuit Requires:
A way to compute 2’s Complement Available as fast hardware instructions
X86 assembly instruction: NEG A way to compare two values for equality
How to do this quickly?Exclusive Not OR (NXOR) Gate
Compare all sequential bits of bit string A and bit string B. Values are equal if the comparison process produces all 1s.
A way to shift bit strings. Arithmetic bit shift, which preserves the sign bit when
shifting to the right.10110110 arithmetic shift right 11011011
x86 assembly instruction: SAR
A B A NXOR B
0 0 1
0 1 0
1 0 0
1 1 1
+2’s Complement Binary Multiplication – Booth’s Algorithm Example: 5 x -3
First, convert to Bin: 5 = 0101 -3 = 1101
If we add 0 to the right of both values, there are 4 0-1 or 1-0 switches in 0101, and 3 in 1101. Pick 1101 as X value, and 0101 as Y value
Next, 2s Comp of Y: 1011
Next, set 2 registers, U and V, to 0. Make a table using U, V, and 2 additional registers X, and X-1.
+2’s Complement Binary Multiplication – Booth’s Algorithm Register X is set to the predetermined value of x, and X-1 is
set to 0
Rules: Look at the LSB of X and the number in the X-1 register.
If the LSB of X is 1, and X-1 is 0, we subtract Y from U. If LSB of X is 0, and X-1 is 1, then we add Y to U. If both LSB of X and X-1 are equal, do nothing and skip to shifting
stage.
U V X X-1
0000 0000 1101 0