NIRT: Computing with quantum dots, nanowires and nanodiodes (CCF 0506710) S. Bandyopadhyay1, W. Lu2 and K. L. Wang3

1Virginia Commonwealth University, Richmond, VA2University of Michigan, Ann-Arbor, MI

3University of California, Los Angeles, CA

The objective of this research is to develop a quantum neuromorphic network (QNN) that is capable of memory and logic functions, as well as signal processing.

The basic architecture can be implemented with an array of metallic nanoparticles intergrated with underlying nanowires that exhibit negative differential resistance.

Each nanowire is resistively and capacitively coupled to its nearest neighbors. The coupling elements determine the speed and power. Speed and power figures exceed the SIA roadmap for 2015 when calculated with experimentally measured coupling resistances and capacitances.

This architecture is capable of performing associative memory, Boolean logic and image processing functions.

References:

1.V. P. Roychowdhury, et al, IEEE Trans. Elec. Dev., 43, 1688 91996).

2.V. P. Roychowdhury, et al., Proc. IEEE, 85, 574 (1997)

3.K. Karahaliloglu, et al., IEEE Trans. Elec. Dev., 50, 1610 (2003).

4.S. Bandyopadhyay, et al., IEE Proc. Circuits, Dev. Syst., 152, 85 (2005).

Fabrication approach at UCLA: An array of buried quantum dots that are resistively and capcitively coupled to nearest neighbors. The conduction characteristics are expected to display negative differential resistance (NDR).

Fabrication approach at VCU: A nanoporous ceramic matrix is self assembled by anodizing aluminum in 0.3M oxalic acid. This results in the formation of a porous alumina film on the surface containing a hexagonal close packed array of 50-nm diameter pores (AFM shown). The pores are filled up with a semiconductor to produce nanowires that are isolated from each other by the intervening alumina. The measured coupling resistances are about 640 k and the coupling capacitance is about 5 aF.

Cross-section SEM showing buried nanowires in the ceramic matrix.

Measured S-type non-linearity in self assembled nanowires showing NDR with a peak-to-valley ratio of 19;1 at room temperature.

Example of grey-scale image processing. Pixel brightness is converted to voltage levels across a nanowire (1 nanowire = 1 pixel) and the system is allowed to relax. The steady state response corresponds to edge enhancement detection.

Multiple NDR peaks in a different set of nanowires at room temperature. Application in color image processing.

Color smoothing: The difference between black and white is gradually diminishing. Requires multiple NDR peaks.