critical design review cpsc 483 – computer system design coff-e-mail critical design review march...

16
Critical Design Review CPSC 483 – Computer System Design Coff-e-mail Critical Design Review March 10, 2004 Don McGee Eric Peden Payton Quackenbush Zack Roman

Post on 22-Dec-2015

216 views

Category:

Documents


0 download

TRANSCRIPT

Critical Design Review

CPSC 483 – Computer System Design

Coff-e-mail Critical Design ReviewMarch 10, 2004

Don McGeeEric Peden

Payton QuackenbushZack Roman

Critical Design Review

Review of ProblemNeeds

• Department wants convenient way to keep tabs on the coffee pot.

• Department wants easy way to remotely check level of coffee in the pot.

Critical Design Review

Review of Problem Goals and Objectives

Goals– Design a complete embedded network

system– Build complex analog-digital interfaces

(advanced sensors, web cam)

Objectives – Unobtrusive footprint– Current coffee status– Statistics and mug shots– Remote notification

Critical Design Review

Design

• Snap TiltKit microcontroller – server• FPGA, CMUcam – image processing• PIC, A/D converter – sensor

processing

Critical Design Review

System Block Diagram

Critical Design Review

Server

• User interface to coffee machine

• Event notifications• Statistics• Mug shots

Critical Design Review

Server (cont.)

• Completed tasks– Software architecture– 50% of Java code written

• Remaining tasks– Approve network access– Remaining code

Critical Design Review

Server (cont.)

• Testing procedures– Unit tests– Command-line event simulator– Load tolerance

Critical Design Review

Sensors

• PIC polls sensors for data

• Processes signal data for use by server

• Controls camera module and passes compressed images to server

• Controls output of LCD

Critical Design Review

Sensors (cont.)

• Completed tasks– Validated sensor data– I/O Protocols / LCD Interface– Pinouts

• Remaining tasks– Breadboard prototype– Sensor mounting– Programming

Critical Design Review

Sensors (cont.)

• Testing procedures– Verify sensor values from LCD– Basic I/O to server to verify serial

protocol• Data verification will be done server-side

Critical Design Review

Camera

• Separate camera module needed– PIC too slow for JPEG compression– Standalone module alleviates

synchronization issues

• Design revision: FPGA for camera input/image processing

Critical Design Review

Camera (cont.)

• Completed tasks– Camera output protocol– Camera color spaces– Sample JPEG compression

implementation

• Remaining tasks– Modify JPEG code– Select FPGA– CameraSensor module protocol

Critical Design Review

Camera (cont.)

• Test procedures– Test camera output with small image

window and LCD• Cover camera with solid color cards

– Software simulation of FPGA• Input pre-built RAW image data• Output JPEG data to file

Critical Design Review

Parts ListItem Description Cost

SNAP TiltKit Java-based microcontroller with on-board 10/100BaseT ethernet

$167.00

CMUcam Web cam $55.00

Jameco 176882 PIC 16F877 Microcontroller $9.49

Jameco 10188 ADC0809 (Analog to Digital Converter) $2.95

FPGA Xilinx XC2S200E FPGA $35.00

LCD 20 x 4 character-based LCD for debugging and system status

$33.00

Jameco 150551 Flex resistor (Quantity: 2) $25.90

RadioShack 276-142

Infra-red LED/photo-transistors (Quantity: 5)

$14.95

Shipping $60.00

Total $403.29

Critical Design Review

Conclusion

Questions?