contents of the lecture
DESCRIPTION
Contents of the Lecture. 1. Introduction 2. Methods for I/O Operations 3. Buses 4. Liquid Crystal Displays 5 . Other Types of Displays 6 . Graphics Adapters 7 . Optical Discs. 2. Methods for I/O Operations. Programmed I/O Interrupt-Driven I/O Direct Memory Access (DMA) - PowerPoint PPT PresentationTRANSCRIPT
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Contents of the Lecture
1. Introduction2. Methods for I/O Operations3. Buses4. Liquid Crystal Displays5. Other Types of Displays6. Graphics Adapters7. Optical Discs
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2. Methods for I/O Operations
Programmed I/OInterrupt-Driven I/O Direct Memory Access (DMA)I/O Processors
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Programmed I/O
Principle of Programmed I/OI/O Device AddressingI/O InstructionsDisadvantages of Programmed I/O
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Principle of Programmed I/O (1)
Data are transferred between the CPU and I/O module under direct control of the CPU
Each transfer operation requires the execution of an instruction sequence by the CPU The transfer is carried out between a CPU register and a register of the I/O device The I/O device does not have direct access to main memory
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Principle of Programmed I/O (2)
Execution of an I/O operation:The CPU sends a command to the I/O moduleThe I/O module performs the requested action and sets the appropriate bits in the status registerThe CPU must check periodically the status of the I/O module to detect that the operation is complete
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Programmed I/O
Principle of Programmed I/OI/O Device AddressingI/O InstructionsDisadvantages of Programmed I/O
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I/O Device Addressing (1)
The CPU, memory, and I/O devices usually communicate via the system busAn I/O device is connected to the bus via an I/O port addressable registerWhen the CPU, main memory, and I/O system share a common bus, two addressing techniques are possible:
Memory-mapped addressing Isolated addressing
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I/O Device Addressing (2)
Memory-mapped addressingThere is a single address space for memory locations and I/O devices The CPU treats the status and data registers of I/O modules as memory locations
The same instructions are used to access both memory and I/O devices No special I/O instructions are needed memory load and store instructions
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I/O Device Addressing (3)
The RD and WR control lines are used to initiate either a memory access cycle or an I/O transfer
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I/O Device Addressing (4)
Isolated AddressingThe I/O address space is isolated from that for memoryThe bus must contain:
Read and write lines for the memoryCommand lines for input and output
A memory-referencing instruction asserts the MRD or MWR control lineThe CPU must execute separate I/O instructions to assert the IORD and IOWR lines
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I/O Device Addressing (5)
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Programmed I/O
Principle of Programmed I/OI/O Device AddressingI/O InstructionsDisadvantages of Programmed I/O
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I/O Instructions (1)
Programmed I/O can be implemented by at least two I/O instructions
IN, OUT (Intel)To prevent the loss of information or an indefinite execution time, the CPU must test the status of the I/O device To execute an I/O instruction, the CPU sends:
An address: the I/O module and the external deviceAn I/O command
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I/O Instructions (2)
Types of I/O commandsControl: used to activate a peripheral and to specify the operation to be executed Test: used to test status conditions associated with an I/O module and its peripherals Read: used to obtain a byte or word from the peripheralWrite: used to send a byte or word to the peripheral
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I/O Instructions (3)
Reading a block of data from a peripheral device into memory For each word that is read in, the CPU must remain in a cycle to test the status
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I/O Instructions (4)
The programmer’s interface for a terminal keyboardExemplifying the programmed I/O for memory-mapped addressing and isolated addressing
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I/O Instructions (5)
Memory-mapped addressing 512 memory locations (0-1FFh) 512 I/O addresses (200h-3FFh)Reading a byte from the keyboard
LD AC, 1 ST 301h, AC ; start keyboard read
WAIT: LD AC, 301h ; read status byte AND AC, 80h ; isolate bit 7 BZ WAIT ; wait for the byteLD AC, 300h ; read data byte
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I/O Instructions (6)
Isolated addressing The I/O ports have the same addresses as in the previous exampleReading a byte from the keyboard
LD AC, 1 OUT 301h, AC ; start keyboard read
WAIT: IN AC, 301h ; read status byteAND AC, 80h ; isolate bit 7 BZ WAIT ; wait for the byteIN AC, 300h ; read data byte
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Programmed I/O
Principle of Programmed I/OI/O Device AddressingI/O InstructionsDisadvantages of Programmed I/O
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Disadvantages of Programmed I/O
Performance of the system is significantly reduced, because:
The CPU has to wait until the peripheral becomes available, and then to execute the transfer by a program sequenceThe transfer rate is limited by the speed with which the CPU can test and serve the I/O devices
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Summary
Programmed I/O: the CPU executes a sequence of instructions for each transferAddressing techniques
Memory-mapped addressing: the registers of I/O modules are treated as memory locationsIsolated addressing: the registers of I/O modules have addresses in an address space separated from that of the memory
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Concepts, Knowledge
Principle of programmed I/OExecution of an I/O operationI/O portMemory-mapped addressingIsolated addressingDisadvantages of programmed I/O
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Questions
1. How is an I/O operation executed with programmed I/O?
2. What are the differences between memory-mapped addressing and isolated addressing?
3. What are the disadvantages of programmed I/O?
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