PRESENTATION

TOPICS :

1. COMPUTER INSTRUCTIONS.2.TIMING & CONTROL.3. INSTRUCTION CYCLE.

BY :- PAAWAN GUPTA

109-38126

B.SC.(C.SCIENCE)2ND YEAR

COMPUTER INSTRUCTIONSThe basic computer has three instruction code formats which are :-

MEMORY- REFERENCE INSTRUCTION

A memory – reference instruction uses 12 bits to specify an address and 1 bit to specify the addressing mode I. I is equal to 0 for direct address and to 1 for indirect address

REGISTER- REFERENCE INSTRUCTION

A register reference instruction specifies an operation on or a test of the AC register .An operand from the memory is not needed therefore the other 12 bits are used to specify the operation to be executed.

INPUT-OUTPUT INSTRUCTION

An input-output instruction does not need a reference to memory and is recognized by operational code 111 with a 1 in the left most bit of the instruction the remaining 12 bits are used to specify the type of input output operation or test performed.

Basic Computer Instruction Format

15 14 12 11 0

I Opcode Address

Memory-Reference Instructions (OP-code = 000 ~ 110)

Register-Reference Instructions (OP-code = 111, I = 0)

Input-Output Instructions (OP-code =111, I = 1)

15 12 11 0Register operation0 1 1 1

15 12 11 0I/O operation1 1 1 1

3 Instruction Code Formats :

Memory-reference instruction

Register-reference instruction

Input-Output instruction

I Opcode Address

15 14 12 11 0I=0 : Direct, I=1 : Indirect

0 1 1 1 Register Operation

15 14 12 11 0

1 1 1 1 I/O Operation

15 14 12 11 0

Hex CodeSymbol I = 0 I = 1 DescriptionAND 0xxx 8xxx And memory word to ACADD 1xxx 9xxx Add memory word to ACLDA 2xxx Axxx Load memory word to ACSTA 3xxx Bxxx Store content of AC in memoryBUN 4xxx Cxxx Branch unconditionallyBSA 5xxx Dxxx Branch and Save return addressISZ 6xxx Exxx Increment and skip if zeroCLA 7800 Clear ACCLE 7400 Clear ECMS 7200 Complement ACCME 7100 Comp le m e nt ECIR 7080 Circulate right AC and ECIL 7040 Circulate left AC and EINC 7020 Increment ACSPA 7010 Skip next instruction if AC positiveSNA 7008 Skip next instruction if AC negativeSZA 7004 Skip next instruction if AC zeroSZE 7002 Skip next instruction if E is 0HLT 7001 Halt computerINP F800 Input character to ACOUT F400 Output character from ACSKI F200 Skip on input flagSKO F100 Skip on output flagION F080 Interrup t O nIOF F040 Inter ru p t O ff

BASIC COMPUTER INSTRUCTION

INSTRUCTION SET COMPLETENESS

• Instruction Types :-

A computer should have a set of instructions so that the user can construct machine language programs to evaluate any function that is known to be computable.

Functional Instructions - Arithmetic, logic, and shift instructions - ADD, CMA, INC, CIR, CIL, AND, CLA

Transfer Instructions - Data transfers between the main memory

and the processor registers - LDA, STA

Control Instructions - Program sequencing and control - BUN, BSA, ISZ

Input/Output Instructions - Input and output - INP, OUT

TIMING AND CONTROLThe timing for all register in basic computer is controlled by a master clock generator.

Clock pulses – The clock pulses are applied to all flip-flops and registers in the system , including the flip-flops in the control unit . The clock pulses do not change the state of a register unless the register is unable by a control signal.

There are two types of control organisations :-

1. Hardwired control – In hardwired organization, the control logic is implemented with gates , flip-flops , decoders , and other digital circuits. It has the advantage that it can be optimized to produce a fast mode of operation.

2. Microprogramme control – The control information is stored in the control memory . The control memory is programmed to initiate the required sequence of microperations.

TIMING AND CONTROL

Control unit of Basic Computer

Instruction register (IR)15 14 13 12 11 - 0

3 x 8decoder

7 6 5 4 3 2 1 0

ID0

15 14 . . . . 2 1 04 x 16

decoder

4-bitsequence

counter(SC)

Increment (INR)Clear (CLR)

Clock

Other inputs

Controlsignals

D

T

T

7

15

0

CombinationalControl

logic

INSTRUCTION CYCLE

In basic computer each instruction cycle consist of following phases:-

1. Fetch an instruction from the memory.

2. Decode the instruction.

3. Read the effective address from the memory if the instruction has an indirect address.

4. Execute the instruction. Fetch & decode ->Initially, the PC is loaded with the

address of the first incrementer in the program.

The SC(sequence counter) is cleared to 0,providing a decoded time signal T0.After each clock pulse ,SC is incremented by1 so that the timing go through a sequenceT0,T1,T3 and so on . The microperations for fetch & decode phases are:-

T0: AR<-PC

T1: IR<-M[AR],PC<-PC+1

T2: D0…..,D7<-Decode IR(12-14),AR<-IR(0-11),I<-IR(15)

FETCH AND DECODE

• Fetch and Decode T0: AR PC (S0S1S2=010, T0=1)T1: IR M [AR], PC PC + 1 (S0S1S2=111, T1=1)T2: D0, . . . , D7 Decode IR(12-14), AR IR(0-11), I IR(15)

S2

S1

S0

Bus

7Memory

unitAddress

Read

AR

LD

PC

INR

IR

LD Clock

1

2

5

Common bus

T1

T0

REGISTER REFERENCE INSTRUCTIONS

r = D7 IT3 => Register Reference InstructionBi = IR(i) , i=0,1,2,...,11

- D7 = 1, I = 0- Register Ref. Instr. is specified in b0 ~ b11 of IR- Execution starts with timing signal T3

Register Reference Instructions are identified when

r: SC 0CLA rB11: AC 0CLE rB10: E 0CMA rB9: AC AC’CME rB8: E E’CIR rB7: AC shr AC, AC(15) E, E AC(0)CIL rB6: AC shl AC, AC(0) E, E AC(15)INC rB5: AC AC + 1SPA rB4: if (AC(15) = 0) then (PC PC+1)SNA rB3: if (AC(15) = 1) then (PC PC+1)SZA rB2: if (AC = 0) then (PC PC+1)SZE rB1: if (E = 0) then (PC PC+1)HLT rB0: S 0 (S is a start-stop flip-flop)

THANK YOU…….