computer architecture test 2

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Test 2 CS 270 Spring 07 Wilson Student name No calculators, closed book, closed notes and closed friends. 1. Consider the following code sequence: lw $1, 8($2) ; $1 = $R2 + 8 addi $2, $1, 1 ; $2 = $1 + 1 sw $2, 12($3) ; Memory [ $3 + 12] = $2 Identify the data dependencies in this code and display these dependencies in a figure similar to the sample. Which dependencies are data hazards that can be resolved by forwarding? Which dependencies will cause a stall and how many stall cycles will be required for each stall? The first figure is the sample. You may want to start your answer by adding to the following figure. Your solution will require only three rows, labeled by the code above (ie the first row is labeled with the lw statement etc.).

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Computer Architecture with MIPs

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Page 1: Computer Architecture Test 2

Test 2 CS 270 Spring 07 Wilson

Student name

No calculators, closed book, closed notes and closed friends.

1. Consider the following code sequence:

lw $1, 8($2) ; $1 = $R2 + 8addi $2, $1, 1 ; $2 = $1 + 1sw $2, 12($3) ; Memory [ $3 + 12] = $2

Identify the data dependencies in this code and display these dependencies in a figure similar to the sample. Which dependencies are data hazards that can be resolved by forwarding? Which dependencies will cause a stall and how many stall cycles will be required for each stall?

The first figure is the sample.

You may want to start your answer by adding to the following figure. Your solution will require only three rows, labeled by the code above (ie the first row is labeled with the lw statement etc.).

Page 2: Computer Architecture Test 2

2. Consider an instruction sequence used for a memory-to-memory copy:

lw $2, 100($5)sw $2, 200($6)

a. Explain and show the necessary additions to the datapath of figure below to allow this code to run without any stall cycles. b. Provide forwarding logic (sample below) for the control signals to any new or modified multiplexors. (Use back of previous page if your answer will not fit on this page.)

Sample of forwarding logic:

Page 3: Computer Architecture Test 2

64 138 102 693. We have a test program of 103 instructions with the following pattern “lw, add, lw, add, lw, add, …”. Each add instruction depends (and only depends) on the lw instruction right before it. Each lw instruction depends (and only depends) on the add instruction right before it. If the program is executed to assess the performance of the pipelined datapath below:

a. What would be the actual CPI (cycles per instruction)?

b. Without forwarding what would be the actual CPI?

Page 4: Computer Architecture Test 2

4.

Consider this pipelined datapath. We want to know how many bits are stored in each of the four pipeline regsisters and what their purpose is. I will make it easy for you by doing the IF/ID register.

IF/ID register has 64 bits, 32 of those bits contain the instruction to be executed and the other 32 contain the PC + 4 value after incrementing the PC.

For each of the other three pipeline registers, identify the total number of bits in that register and also break that number down to tell me what the various bits represent and where they came from.

Page 5: Computer Architecture Test 2