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ZZZ1 PJP1 PJP1

PCB 14W_DCIN14W_45@1

15W_DCIN15W_45@1

12/21 Add PJP1 for DCIN Cable on 45 Level One for 14W DCIN , PN: DC301001Y00 Another for 15W DCIN , PN: DC301001V00

Compal Confidential2

JHXXX Schematics DocumentIntel Penryn Processor with Cantiga + DDRII + ICH9M (With nVIDIA MXM/B)

2

2008-04-24 REV: 0.43 3

4

4

Security ClassificationIssued Date

Compal Secret Data2007/08/18Deciphered Date

Compal Electronics, Inc.2008/8/18Title

Date:

Thursday, April 24, 2008E

he x

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.A B C D

Cover PageSize B Document Number Sheet

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Compal ConfidentialModel Name : JHXXX File Name : LA-4241P1

Fan Control

Intel Penryn ProcessoruPGA-478 Packagepage 4,5,6

Thermal SensorADT7421page 4

Clock GeneratorICS9LPRS387page 161

page 4

H_A#(3..35)

FSB 667/800MHz

H_D#(0..63)

LCD Conn.page 18

LVDS

HDMIpage 25

Intel CantigaCRTpage 19

Memory BUS(DDRII)Dual Channel1.8V DDRII 533/667

200pin DDRII-SO-DIMM X2BANK 0, 1, 2, 3page 14,15

uFCBGA-1329 PCI-Expresspage 7,8,9,10,11,12,13

MXM II VGA/Bpage 172

DMI X4 mode PCI-Express

USB conn x3 TO I/O/Bpage3.3V 48MHz

35

Bluetooth Conn page

CMOS Camera34 page 40

Finger Print Conn page 402

Intel ICH9-MBGA-676page 20,21,22,23

USB HD Audio

3.3V 24.576MHz/48Mhz

S-ATA

New Card MINI Card x3 WLAN, Socketpage 31

LAN(GbE)RTL8111C/8102Epage 28

port 0

GMCH HDApage 8

TV-Tuner Robson

Card ReaderJMB385page 26

MDC 1.5 Conn 40 page

HDA CodecALC268page 36

page 30

S-ATA HDD Conn. page 24 LPC BUS

S-ATA ODD Conn. page 24 Audio AMPpage 373

RJ453

3 in 1 socketpage 26

page 29

RTC CKT.page 21

Power On/Off CKT.page 35

Function/B Power USB/Bpage 33

ENE KB926page 32

Touch Pad USB I/O Conn. CIR LID SW Debug portpage 35

Int.KBDpage 33

page 34

DC/DC Interface CKT.page 41

BIOSpage 34

SCREW

page 39

Power Circuit DC/DC4

page 41,42,43,45 46,47,48

4

CHARGER

page 44

TPM LED

page 40

Security ClassificationIssued Date

Compal Secret Data2007/08/18Deciphered Date

Compal Electronics, Inc.2008/8/18Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.A B C D

Block DiagramsSize B Date: Document Number

JHXXX M/B LA-4241P SchematicFriday, April 11, 2008E

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Voltage RailsPower Plane VIN B+1

Description Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU 0.9V switched power rail for DDR terminator 1.05V switched power rail 1.5V switched power rail 1.8V power rail for DDR 1.8V switched power rail 3.3V always on power rail 3.3V switched power rail 5V always on power rail 5V switched power rail VSB always on power rail RTC power

S1 N/A N/A ON ON ON ON ON ON ON ON ON ON ON ON

S3 N/A N/A OFF ON OFF OFF ON OFF ON OFF ON OFF ON ON

S5 N/A N/A OFF OFF OFF OFF OFF OFF ON* OFF ON* OFF ON* ON1

+CPU_CORE +0.9VS ( Actual +0.9V ) +1.05VS +1.5VS +1.8V +1.8VS +3VALW +3VS +5VALW +5VS +VSB +RTCVCC

EC SM Bus1 addressDeviceSmart Battery EEPROM(24C16/02)

EC SM Bus2 addressDeviceADI ADM1032 NVIDIA NB8X

Address0001 011X b 1010 000X b

Address1001 100X b

ICH9M SM Bus address2 2

STATE Full ON

SIGNAL

Device

Address1101 001Xb 1010 000Xb 1010 010XbR472 R472 R472 R472 R472

SLP_S1# SLP_S3# SLP_S4# SLP_S5# HIGH LOW LOW LOW LOW HIGH HIGH LOW LOW LOW HIGH HIGH HIGH LOW LOW HIGH HIGH HIGH HIGH LOW

+VALW ON ON ON ON ON

+V ON ON ON OFF OFF

+VS ON ON OFF OFF OFF

Clock ON LOW OFF OFF OFF

Clock Generator (ICS9LPRS325AKLFT_MLF72) DDR DIMM0 DDR DIMM1

S1(Power On Suspend) S3 (Suspend to RAM) S4 (Suspend to Disk) S5 (Soft OFF)

SKU ID TableVcc Rb Rb~ R470 Ra~ R472 3.3V +/- 5% 47K +/- 5%

4.7K_0402_5% H_14_C@ R472

10K_0402_5% H_14_MP@ R472

18K_0402_5% H_15_B@ R472

27K_0402_5% H_15_C@ R472

39K_0402_5% H_15_MP@ R472

PROJECT ID Table3

56K_0402_5% L_14_B@

82K_0402_5% L_14_C@

120K_0402_5% L_14_MP@

220K_0402_5% L_15_B@

470K_0402_5% L_15_C@

ID1 JHT00 ( 00@ ) JHT01 ( 01@ ) JHL90 ( 10@ ) JHL91 ( 11@ ) R361 R361 R360 R360

ID0 R357 R355 R357 R355

Board ID

MIC ID TableR R585 Single MIC R583 Array MIC Structure SINGLE@ DUAL@

1 2 3 4 5 6 7 8 9 10 11 12

Rb NA 47K(RB@) 47K(RB@) 47K(RB@) 47K(RB@) 47K(RB@) 47K(RB@) 47K(RB@) 47K(RB@) 47K(RB@) 47K(RB@) 47K(RB@)

Ra 4.7K +/- 5% 4.7K +/- 5% 10K +/- 5% 18K +/- 5% 27K +/- 5% 39K +/- 5% 56K +/- 5% 82K +/- 5% 120K +/- 5% 220K +/- 5% 470K +/- 5% NA

V AD_BID min 0 V 0.274 V 0.553V 0.849V 1.129 V 1.415 V 1.712 V 2.020V 2.303 V 2.670 V 2.972 V 3.135 V

V AD_BID typ 0 V 0.300 V 0.578 V 0.913V 1.204 V 1.496 V 1.794 V 2.097 V 2.371 V 2.719 V 3.000 V 3.300 V

V AD_BID max 0 V 0.328 V 0.628 V 0.981 V 1.282 V 1.579 V 1.876 V 2.173 V 2.437 V 2.765 V 3.026 V 3.465 V

Ra BOM Structure H_14_B@ H_14_C@ H_14_MP@ H_15_B@ H_15_C@ H_15_MP@ L_14_B@ L_14_C@ L_14_MP@ L_15_B@ L_15_C@ NA for L_15_MP

3

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Security ClassificationIssued Date

Compal Secret Data2007/08/18Deciphered Date

Compal Electronics, Inc.2008/8/18Title

Date:

Thursday, April 24, 2008E

he x

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.A B C D

Notes ListSize B Document Number Sheet

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Place close to CPU with stub length