comp arch elevator
DESCRIPTION
VHDL codeTRANSCRIPT
Top Level Entity (Xilinx ISE VHDL Code):------------------------------------------------------------------------------------ Company: -- Engineer: -- -- Create Date:11:1:!" "!#$#$"1! -- De%ign &ame: -- 'od(le &ame:top)level - *e+avioral -- ,ro-e.t &ame: -- Target Devi.e%: -- Tool ver%ion%: -- De%.ription: ---- Dependen.ie%: ---- /evi%ion: -- /evi%ion "0"1 - 1ile Created-- 2dditional Comment%: ------------------------------------------------------------------------------------li3rary IEEE4(%e IEEE0STD)L56IC)117!02LL4-- 8n.omment t+e 9ollo:ing li3rary de.laration i9 (%ing-- arit+meti. 9(n.tion% :it+ Signed or 8n%igned val(e%--(%e IEEE0&8'E/IC)STD02LL4-- 8n.omment t+e 9ollo:ing li3rary de.laration i9 in%tantiating-- any Xilinx primitive% in t+i% .ode0--li3rary 8&ISI'4--(%e 8&ISI'0VComponent%0all4entity top)level i%,ort ( .l; : inSTD)L56IC4 C,S'? (al:ay% (%e t+i% de.laration to .all -- (p ,i.o*la@e .ore) .omponent ;.p%m? port (addre%% : o(t %td)logi.)ve.tor(A do:nto ")4 in%tr(.tion : in %td)logi.)ve.tor(1= do:nto ")4 port)id : o(t %td)logi.)ve.tor(= do:nto ")4 :rite)%tro3e : o(t %td)logi.4 o(t)port : o(t %td)logi.)ve.tor(= do:nto ")4 read)%tro3e : o(t %td)logi.4 in)port : in %td)logi.)ve.tor(= do:nto ")4 interr(pt : in %td)logi.4 interr(pt)a.; : o(t %td)logi.4 re%et : in %td)logi.4 .l; : in %td)logi.)4 end .omponent4 ------------------------------------------------------------------------- -- de.laration o9 program memory (+ere yo( :ill %pe.i9y t+e entity name -- a% yo(r 0p%m preBx name) .omponent ele port (addre%% : in %td)logi.)ve.tor(A do:nto ")4 in%tr(.tion : o(t %td)logi.)ve.tor(1= do:nto ")4 .l; : in %td)logi.)4 end .omponent4 ------------------------------------------------------------------------- -- Signal% (%ed to .onne.t ,i.o*la@e .ore to program memory and I#5 logi. %ignal addre%% : %td)logi.)ve.tor(A do:nto ")4 %ignal in%tr(.tion : %td)logi.)ve.tor(1= do:nto ")4 %ignal port)id : %td)logi.)ve.tor(= do:nto ")4 %ignal o(t)port : %td)logi.)ve.tor(= do:nto ")4 %ignal in)port : %td)logi.)ve.tor(= do:nto ")4%ignal t1 : %td)logi.)ve.tor(= do:nto ")4 %ignal :rite)%tro3e : %td)logi.4 %ignal read)%tro3e : %td)logi.4 %ignal interr(pt)a.; : %td)logi.4 %ignal re%et : %td)logi.4 -- t+e 9ollo:ing inp(t i% a%%igned an ina.tive val(e %in.e it i% -- (n(%ed in t+i% example %ignal interr(pt : %td)logi. :CD"D4 ------------------------------------------------------------------------- -- Start o9 .ir.(it de%.ription 3egin -- In%tantiating t+e ,i.o*la@e .ore pro.e%%or: ;.p%m? port map (addre%% CE addre%%F in%tr(.tion CE in%tr(.tionF port)id CE port)idF :rite)%tro3e CE :rite)%tro3eF o(t)port CE o(t)portF read)%tro3e CE read)%tro3eF in)port CE in)portF interr(pt CE interr(ptF interr(pt)a.; CE interr(pt)a.;F re%et CE re%etF .l; CE .l;)4 -- In%tantiating t+e program memory program: ele port map (addre%% CE addre%%F in%tr(.tion CE in%tr(.tionF .l; CE .l;)4 -- Conne.t I#5 o9 ,i.o*la@e ----------------------------------------------------------------------------- >C,S'? DeBne inp(t port% ------------------------------------------------------------------------ -- T+e inp(t% .onne.t via a pipelined m(ltiplexer inp(t)port%: pro.e%%(.l;) 3egini9(port)idCG""""""""G) t+eni9 (