communication - university of washington · 2012-10-23 · cse 466 communication 31 01 01 0 011 0...
TRANSCRIPT
Communication
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The space of digital communication methods
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Unmodulated orbaseband
Modulated or passband
Wired RS-232, I2C, SPI10BASET-Ethernet, USB, Firewire, DVI, HDMI
Cable TV
Wireless Avalanche beepers [analog]?
WiFi, Bluetooth, GSM, LTE, IrDA
Could add analog / digital as another axis
What determines how much info we can transmit?
Shannon’s noisy channel coding theorem Says you can achieve error-free communicate at any
rate up to the channel capacity, and can’t do any better C: channel capacity, in bits / s W: bandwidth amount of frequency “real estate”,
in Hz (cycles / s) S: Signal power N: Noise power
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2 2log log 1S N SC W WN N
Capacity of Additive White Gaussian Noise (AWGN) Channel
“Proof” of AWGN Channel Capacity formula
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2 2log log
Number of distintguishable states per second is
2
W
WC
S N S NC WN N
S NN
The formula counts the number ofdistinguishable states
SN
f1 f2 f6…
Hand-waving
Units of bandwidth (cycles per sec) ultimately determines frequency bin width…This subtlety is where the simple “proof” is lacking
This formula is why the term “bandwidth” is used as shorthand to mean “communication rate”
Why may need modulation to use all the bandwidth (frequencies) that the channel has
Signal
Modulation Technique WaveformNo modulation (Baseband)
On-Off Keying (OOK)
Amplitude Modulation
Frequency Shift Keying (FSK)
Binary Phase Shift Keying (BPSK)
Direct Sequence Spread Spectrum (DSSS), etc
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Communication methods Media and signaling conventions used to transmit data between digital
devices Different physical layers methods including:
wires, radio frequency (RF), optical (IR) Different encoding schemes including:
amplitude, frequency, and pulse-width modulation
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Communication methods
Dimensions to consider bandwidth – number of wires – serial/parallel speed – bits/bytes/words per second timing methodology – synchronous or asynchronous number of destinations/sources arbitration scheme – daisy-chain, centralized, distributed protocols – provide some guarantees as to correct communication
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Bandwidth Serial
Single wire or channel to transmit information one bit at a time Requires synchronization between sender and receiver Sometimes includes extra wires for clock and/or handshaking Good for inexpensive connections (e.g., terminals) Good for long-distance connections (e.g., LANs) Examples: RS-232, Ethernet, I2C, IrDA, USB, Firewire, Bluetooth, DVI,
HDMI, PCIe Parallel
Multiple wires to transmit information one byte or word at a time Good for high-bandwidth requirements (CPU to disk) More expensive wiring/connectors/current requirements Examples: SCSI-2, PCI bus (PC), PCMCIA (Compact Flash)
Issues Encoding, data transfer rates, cost of connectors and wires, modularity,
error detection and/or correction
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Speed
Question: how does speed relate to bandwidth?If you’ve studied Fourier methods, dredge them up now…
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Speed
Serial low-speed, cheap connections
RS-232 1K–20K bits/sec, copper wire medium-speed efficient connections
I2C 10K-400K bits/sec, board traces IrDA 9.6K-4M bits/sec, line-of-sight, 0.5-6.0m
high-speed, expensive connections USB 1.5M & 12 M bytes/sec; USB2 480M bytes/sec; USB3 5Gbits / s Ethernet 1.5M-1G bits/sec, twisted-pair or co-axial Firewire 12.5-50M bytes/sec DVI (single link) ~4Gb / s; HDMI 10Gb / s PCIe v3.0 1GB / s per lane; 16 lane slot = 16GB/s
Each PCIe lane is 2 differential pairs, one pair for each direction (4 wires total) Full duplex bidirectional link
Parallel low-speed, not too wide
SCSI-2 10M bytes/sec, 8 bits wide PCI bus, 250M bytes/sec, 32 bits wide PCMCIA (CF+), 9-10M bytes/sec, 16 bits wide
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Speed
Issues length of the wires (attenuation, noise, capacitance)
other factors affecting bandwidth, i.e. highest freq that wire will pass
connectors (conductors and/or transducers)
environment (RF/IR interference, noise)
current switching (spikes on supply voltages)
number and types of wires (cost of connectors, cross-talk)
flow-control (if communicating device can’t keep up)
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Timing methodology
Asynchronous fewer wires (no clock) no skew concerns synchronization overhead appropriate for loosely-coupled systems (CPU and peripherals) common in serial schemes
Synchronous clock wires and skew concerns no synchronization overhead can be high-speed if delays are small and can be controlled appropriate for tightly-couple systems (CPU and memory/disk) common in parallel schemes
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Timing methodology
Issues clock period and wire delay
synchronization and skew
encoding of timing and data information
handshaking
flow-control
power consumption
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Number of devices communicating
Single source – single destination point-to-point cheap connections, no tri-stating necessary
Single source – multiple destination fanout limitations addressing scheme to direct data to one destination
Multiple source – multiple destination arbitration between senders tri-stating capability is necessary collision detection addressing scheme priority scheme fairness considerations
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Arbitration schemes Daisy-chain or token passing
devices either act or pass to next fixed priority order as many wires as devices fairness issues
Centralized request to central arbiter central arbiter implements priority scheme wires from/to each device can be costly can be dynamically changing priority/fairness
Distributed no central arbiter common set of wires (or ether) observed by all devices fixed priority/fairness scheme
Wired communication
Today we’re focusing on wired communication We talked about RS-232 earlier because it was needed
for the lab…now we’ll look at other wired communication schemes
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Serial communication schemes
RS-232 (IEEE standard) serial protocol for point-to-point, low-cost, low-speed applications for PCs
I2C (Philips) TWI (Atmel) up to 400Kbits/sec, serial bus for connecting multiple components
Ethernet (popularized by Xerox) most popular local area network protocol with distributed arbitration
IrDA (Infrared Data Association) up to 115kbps wireless serial (Fast IrDA up to 4Mbs)
Firewire (Apple – now IEEE1394) 12.5-50Mbytes/sec, consumer electronics (video cameras, TVs, audio, etc.)
SPI (Motorola) 10Mbits/sec, commonly used for microcontroller to peripheral connections
USB (Intel – followed by USB2.0 and USB3.0) 12-480Mbits/sec, isochronous transfer, desktop devices
Bluetooth (Ericsson – cable replacement) 700Kbits/sec, multiple portable devices, special support for audio
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Serial Peripheral Interface
Common serial interface on many microcontrollers
Simple 8-bit exchange between two devices Master initiates transfer and generates clock signal
Slave device selected by master
One-byte at a time transfer Data protocols are defined by application
Must be in agreement across devices
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SPI Block Diagram 8-bits transferred in each direction every time Master generates clock MOSI: “Master Out Slave In”; MISO: “Master In Slave Out”
Connect MOSI to MOSI and MISO to MISO Very clean terminology, unlike “TX” and “RX” which are easy to confuse
Slave Select (SS) used to select one of many slaves Terminology varies:
Instead of SS, “Chip Select” (CS) Instead of MOSI and MISO, SIMOD and SOMI
SPI: point to point and daisy chain
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End of lecture
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Configuration details to watch out for CPHA (Clock PHase) aka ~CKPH (MSP430 terminology)
= 0 or =1, determines when data goes on bus relative to clock
CPOL (Clock POLarity) aka CKPL (MSP430) =0 clock idles low between transfers =1 clock idles high between transfers
This leads to 4 SPI clock modes
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Mode CPOL/CKPL CPHA/ ~CKPH0 0 01 0 12 1 03 1 1
NB: on this slide,~ means negation,i.e. same as overbar
Takeaway message: make sure master and slave are configured thesame way!
SPI properties Pros
Simplest way to connect 1 peripheral to a micro Fast (10s of Mbits/s, not on MSP) because all lines
actively driven, unlike I2C Clock does not need to be precise Nice for connecting 1 slave
Cons No built-in acknowledgement of data Not very good for multiple slaves Requires 4 wires
3 wire variants exist…some get rid of full duplex and share a data line, some get rid of slave select
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Inter-Integrated Circuit Bus (I2C)
Supports data transfers 10 kbit / s slow mode 100 kbit / s standard mode 400 kbit / s fast mode 1 Mbit /s fast mode plus 3.4Mbit / s high speed mode
Philips (and others) provide many devices microcontrollers with built-in interface A/D and D/A converters parallel I/O ports memory modules LCD drivers real-time clock/calendars DTMF decoders frequency synthesizers video/audio processors
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+Vcc
device1
device2
devicen
SCL
SDA
Inter-Integrated Circuit Bus (I2C) Modular connections on a printed circuit board Multi-point connections (needs addressing) Synchronous transfer (but adapts to slowest device) Similar to TWI (Two-Wire Interface) on Atmegas Pull up resistors pull lines high Devices on bus go from “high impedance” to ground to generate a low on bus 1 Master (generates clock, initiates communication) Up to 112 slaves (7 bit IDs, 16 reserved)
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SDA
SCL
START STOP
Serial data format
SDA going low while SCL high signals start of data SDA going high while SCL high signals end of data SDA can change when SCL low SCL high (after start and before end) signals that a data bit can be read
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SDA
SCL
1 3 4 5 6 7 8 ack2
Byte transfer
Byte followed by a 1 bit acknowledge from receiver Open-collector (open drain) wires
sender allows SDA to rise receiver pulls low to acknowledge after 8 bits
Multi-byte transfers first byte contains address of receiver all devices check address to determine if following data is for them second byte usually contains address of sender
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Ethernet
Inspired by early wireless network: “Aloha” network from U. Hawaii Local area network
“Classic”: 10Mbps serially on shielded co-axial cable “Switched”: 100Mbps, 1000Mbps, 10,000Mbps
Developed by Xerox in late 70s still most common LAN
High-level protocols to ensure reliable data transmission CSMA-CD: carrier sense multiple access with collision detection
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Ethernet
RJ-45
BNCBayonetNavyConnector
10: 10 Mbps100: 100 MbpsBASE: Baseband signaling
(not modulated RF, like the 100s MHz signals on your TV cable)5: 500m max range2: 200m max rangeT: Twisted pair
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0 1 0 1 0 01 1 0
Serial data format
Manchester encoding signal and clock on one wire (XORed together) "0" = low-going transition "1" = high-going transition
preamble at beginning of data packet contains alternating 1s and 0s 10MHz square wave for 6.4us….allows rcv to synch clock to tx preamble is 64 bits long: 10101. . . 01011
Extra 1 signals Start Of Frame (SOF)
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preamble 8 bytes: 7x10101010 + 10101011
destination address (6 bytes)
source address (6 bytes)
Type/length (2 bytes)
data (46-1500 bytes)
Checksum [CRC!] (4 bytes) computed from data
Ethernet packet
Packet size: 64 bytes (min!) to 1518 bytes + 8 bytes of preamble
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Arbitration
CSMA/CD “Carrier Sense Multiple Access with Collision Detection”
Wait for line to be quiet for a while then transmit detect collision average value on wire should be exactly between 1 and 0 if not, then two transmitters are trying to transmit data
If collision, stop transmitting wait a random amount of time and try again if collide again, pick a random number
from a larger range (2x) and try again Exponential backoff on collision detection
“Random exponential backoff” or “binary exponential backoff” Key innovation in Ethernet…Bob Metcalf’s thesis at Harvard
Try up to 16 times before reporting failure
CANBus
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CANBus
Controller Area Network Developed by Bosch in 1983 Common in cars, robots, etc Multi-master broadcast serial bus Not full duplex Differential physical layer Non-Return to Zero (NRZ) line coding Bit rates to 1Mb / s for cables < 40m Longer cables can be used at lower data rates
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http://en.wikipedia.org/w/index.php?title=File:CAN-Bus_Elektrische_Zweidrahtleitung.svg&page=1
From http://marco.guardigli.it/2010/10/hacking-your-car.htmlAnd http://www.picoauto.com/automotivetopics/canbus.html
What is NRZ?
Because of NRZ, CAN uses “bit stuffing”: inserts a bit of opposite polarity after 5 consecutive identical bits
000000 and 111111 are errors
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RZSelf-clocking
http://en.wikipedia.org/wiki/File:RZcode.png
NRZNot self-clockingNo “rest” state
http://en.wikipedia.org/wiki/File:RZcode.png
“Open collector” connections to bus
Output goes between Hi-Z and ground Need an external pull up resistor Unlike a tristate-able output, this can sink current but not source current Good for connecting devices with different voltages Good for making busses (OK to connect multiple open collector outputs to
the same wire)
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http://en.wikipedia.org/wiki/File:OpencollectorV3.png
CANBus Each message includes
a message ID that encodes priority Msg ID must be unique!! Type of data + sending node Including message deadline leads to higher bus utilization
up to 8 data bytes If two devices transmit simultaneously, message with more dominant
ID (more zeros) overwrites less dominant IDs: “priority-based bus arbitration”
“Wired AND” bus (0 is “dominant,” 1 is “recessive”) If bit a node writes is different than bit it reads collision
CSMA/BA Carrier Sense Multiple Access / Bitwise Arbitration Prioritized arbitration Delay-free for highest priority node Good for real-time prioritized systems
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CANBusEach CAN node includes Host processor (interprets messages, decides what to send, …) CAN Controller (HW w/ synchronous clock)
Collects received data in a buffer, generates interrupt for his processor Transmits bits from host processor onto bus
Transceiver Adapts between differential bus signals and single-ended signals used by CAN
controller
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http://ww1.microchip.com/downloads/en/devicedoc/21801e.pdf
EtherCAT
“Ethernet for Control Automation Technology” Targeted at same apps as CANBus Ethernet with
Short update times (cycle times) Low communication jitter Low hardware costs
Not currently very well-known, but Used in Willow Garage PR2 robot!
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EtherCAT based!
How it works Master/Slave, Master/Master, and Slave/Slave (via Master)
supported Master side: conventional Ethernet MAC HW
i.e., plug an EtherCAT network into the back of your laptop! Need alternate driver SW
Slave side: custom hardware Ethernet packets ingested & regenerated by slaves
(This would not be possible in classic bus-style Ethernet)
Slave can extract or insert “EtherCAT datagrams” into the data portion of the Ethernet packet
Slave has to replace Ethernet CRC if it adds an EtherCAT datagram to the Ethernet Frame
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Master:
How it works To master, it looks like there is just one Ethernet device out there (even if
there are multiple EtherCAT slaves) In each slave, processing is done by dedicated hardware
Ensures fast, real-time behavior “Telegrams” processed directly “on the fly”
Many EtherCAT datagrams fit in a single Ethernet packet Many devices can be addresses in a single EtherCAT datagram Frame overhead is amortized over many messages, improving net efficiency
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Slaves:
EtherCAT Datagrams
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Research examples using these commsschemes---Pretouch sensing
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Seashell Effect Pretouch
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Moviesshown here
HW ArchitectureIntegrating w/ Willow Garage PR2 Motor Control Board
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EtherCATASIC
FPGA
Our sensor HW: mic, op-amp, micro w/ ADC, SPI interfaceTo integrate our new sensor into PR2 robot, replace PPS sensor, use SPIPicoBlaze soft microcontroller implemented in FPGAProgram PicoBlaze in Pico asm to talk to our new sensor over SPI
even though byte-level SPI is standard, at a higher level our dataformat is different, so we need to reprogram the SPI masterto change from PPS sensor to our mic sensor
PicoBlazeSoft processor from XilinxWhat is it? Configuration of FPGA gates to implement a microcontroller within FPGA fabricSpecs 8 bit SPI master peripheral 2x 8bit timers to allow easy comms timing 512 byte double-buffer for sending sensor data to computerWhy soft processor? Easier to program than FPGA Faster to reprogram: seconds vs minutes Safe: cannot brick the MCB with a bad PicoBlaze program…can easily brick MCB
with bad FPGA codeWhy PicoBlaze? Free license from Xilinx to use on Xilinx FPGAs Very small Simple, predictable timing (2 clock cycles per instruction)
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End
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Universal Serial Bus Connecting peripherals to PCs
Ease-of-use Low-cost Up to 127 devices Bus provides power (500mA @ 5V = 2.5W) Max transfer rates: 12Mb/s (USB 1.0), 480 Mb/s (USB 2.0),
5Gb/s (USB 3.0) Variable speeds and packet sizes Full support for real-time data for voice, audio, and video Protocol flexibility for mixed-mode isochronous data transfers
and asynchronous messaging PC manages bus and allocates slots (host controller)
Can have multiple host controllers on one PC Support more devices than 127
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USB Peripherals
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USB
Tree of devices– one root controller
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USB Data Transfer
Data transfer speeds Low is <0.8v, high is >2.0v differential 480Mb/sec, 12Mb/sec, 1.5Mb/sec Data is NRZI encoded (data and clock on one wire) SYNC at beginning of every packet
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NRZI Encoding
NRZI – Non-return to zero inverted Toggles signal to transmit a “0” and leaves the signal unchanged
for a “1” Also called transition encoding Long string of 0s generates a regular waveform with a frequency
half the bit rate Long string of 1s generates a flat waveform – bit stuff a 0 every 6
consecutive 1s to guarantee activity on waveform
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NRZI Encoding (cont’d)
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USB Data Transfer Types
Control Transfers: Used to configure a device at attach time and can be used for
other device-specific purposes, including control of other pipes on the device.
Bulk Data Transfers: Generated or consumed in relatively large and bursty quantities
and have wide dynamic latitude in transmission constraints. Interrupt Data Transfers:
Used for timely but reliable delivery of data, for example, characters or coordinates with human-perceptible echo or feedback response characteristics.
Isochronous Data Transfers: Occupy a prenegotiated amount of USB bandwidth with a
prenegotiated delivery latency. (Also called streaming real time transfers)
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USB Packet Format
Sync + PID + data + CRC PID; Packet IDentifier
Handshake packets Token packets Data packets
Sync: 8 bits (00000001) PID: 8 bits (packet id – type) Data: 8-8192 bits (1K bytes)
CRC: 16 bits (cyclic redundancy check sum)
Other data packets vary in size May be as short as only 8 bits of PID
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USB Protocol Stack
FTDIUSB chipimplementsright side
Communicatesto physicaldevicethrough SPI
Extensions
USB to go Allows hand held device to be a USB master
USB 2.0 USB 3.0
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End of lecture
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