CO5023

Latches, Flip-Flops and Decoders

Sequential Circuit

• What does this do?

The OUTPUT of a sequential circuit is determined by the current output values from a previous operation. In other words the output is a part of the input.

In other words the inputs are not fixed like they are for combinational circuits.

An SR Latch (Set – Reset Latch)

• Set up the circuit in logic gate simulator and see what happens…

• Try inputs (SR) of 10, 01 and 11• What do you notice which is unusual

about the 11 input • Could you draw a truth table for it?

• Amazingly, it is not possible to draw a truth table for this circuit• The output for 11 is dependent on the

previous state of the circuit. In fact, whenever the inputs 11 are used, the previous state of the circuit is preserved

• So if Q is 1 and S and R both become 1, Q remains 1

• And if Q is 0 and S and R both become 1, Q remains 0

• What do you think this might be used for?

• In effect, whenever the 11 input signal is present, the circuit remembers the previous state for Q

Memory

• When the SR inputs are 11, the circuit remembers its previous state• So this is the ‘normal’ state of the latch,

when used as memory• If you send a short 0 pulse to the S input,

the value of Q becomes 1• So S is called the set input

• If you send a short 0 pulse to the R input, the value of Q becomes 0• R is the reset input

Combinational and Sequential Circuits

• The SR latch is quite unlike the circuits we have seen up until now because its outputs do not depend solely on the current state of its inputs• Output also depends on previous inputs• This is know as a sequential circuit• Sequential circuits use feedback loops to

send output values back to their inputs

• The alternative we have already seen, and is called a combinational circuit (like an adder, for example) • A combinational circuit always produces

the same output, given a particular set of inputs

Combinational

Sequential

Write Enabling

• With latches, we generally only want to be able to write to the memory at certain times.• The simplest version of this introduces an

input for the system clock• Now it is only possible to write to the

memory when the clock is 0

• Try to make a clocked latch with nor gates• What gates do you use for the clock

signal?• What clock value enables writing now?

D latches

• A D Latch is a little simpler than and SR Latch, in that it has just one input (the value of the bit to be stored) rather than two for set and reset• These two D latches are adaptations of

the NOR and NAND SR Latches• The NAND latch writes when the clock is

0, whereas the NOR latch writes when the clock is 1

• D Latches only work when a clock is used

Edge Triggered Flip Flops

• A Latch is not the most reliable type of semiconductor memory.• If the signals change at any point in the

write part of the clock cycle, the stored value changes

• An edge triggered flip flop only writes at the precise instant when the clock changes from 1 to 0 (or 0 to 1)• It can be implemented with two latches,

sometimes called a master and a slave• The master and slave write on opposite

clock pulses (master 1, slave 0 in the diagram)

• The slave stores the data, and is only written to when clock becomes 0• Cant write to master once clock is 0, can’t

write to slave while clock is 1

Decoders and read/write• When dealing with larger amounts of memory,

we usually want to select a particular location to access using an address bus.• An address bus comprises several wires which

carry a binary representation of the word to be accessed in memory

• Also, we want to indicate (using a single wire), whether we want to read or write.• Any flip flops should only be enabled when their

address is selected and a write operation is signalled by the read/write line.

• Otherwise, you might write the same data to an entire block at once!!!

• So for each register, word in cache or memory, we need a circuit which will decode the address and select the correct enable line for writing• This is called a decoder

• Build this as an exercise in class (if time) or for h/w